This change will remove unused register name macro NAND_DEV1_ECC_CFG.
Since this register was only available in QPIC version 1.4.20 ipq40xx
and it was not used. In QPIC version 1.5 on wards this register got
removed.In QPIC version 2.0 0x2c offset is updated with register
NAND_AUTO_STATUS_EN So adding this register macro NAND_AUTO_STATUS_EN
with offset 0x2c.
Signed-off-by: Md Sadre Alam <[email protected]>
---
drivers/mtd/nand/raw/qcom_nandc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/raw/qcom_nandc.c b/drivers/mtd/nand/raw/qcom_nandc.c
index 9484be8..c238a35 100644
--- a/drivers/mtd/nand/raw/qcom_nandc.c
+++ b/drivers/mtd/nand/raw/qcom_nandc.c
@@ -27,7 +27,7 @@
#define NAND_DEV0_CFG0 0x20
#define NAND_DEV0_CFG1 0x24
#define NAND_DEV0_ECC_CFG 0x28
-#define NAND_DEV1_ECC_CFG 0x2c
+#define NAND_AUTO_STATUS_EN 0x2c
#define NAND_DEV1_CFG0 0x30
#define NAND_DEV1_CFG1 0x34
#define NAND_READ_ID 0x40
--
2.7.4
On 2021-01-31 01:37, Md Sadre Alam wrote:
> This change will remove unused register name macro NAND_DEV1_ECC_CFG.
> Since this register was only available in QPIC version 1.4.20 ipq40xx
> and it was not used. In QPIC version 1.5 on wards this register got
> removed.In QPIC version 2.0 0x2c offset is updated with register
> NAND_AUTO_STATUS_EN So adding this register macro NAND_AUTO_STATUS_EN
> with offset 0x2c.
>
> Signed-off-by: Md Sadre Alam <[email protected]>
Ping! Is any additional info needed for this patch ?
> ---
> drivers/mtd/nand/raw/qcom_nandc.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/mtd/nand/raw/qcom_nandc.c
> b/drivers/mtd/nand/raw/qcom_nandc.c
> index 9484be8..c238a35 100644
> --- a/drivers/mtd/nand/raw/qcom_nandc.c
> +++ b/drivers/mtd/nand/raw/qcom_nandc.c
> @@ -27,7 +27,7 @@
> #define NAND_DEV0_CFG0 0x20
> #define NAND_DEV0_CFG1 0x24
> #define NAND_DEV0_ECC_CFG 0x28
> -#define NAND_DEV1_ECC_CFG 0x2c
> +#define NAND_AUTO_STATUS_EN 0x2c
> #define NAND_DEV1_CFG0 0x30
> #define NAND_DEV1_CFG1 0x34
> #define NAND_READ_ID 0x40
Hello,
[email protected] wrote on Fri, 05 Feb 2021 23:26:33 +0530:
> On 2021-01-31 01:37, Md Sadre Alam wrote:
> > This change will remove unused register name macro NAND_DEV1_ECC_CFG.
> > Since this register was only available in QPIC version 1.4.20 ipq40xx
> > and it was not used. In QPIC version 1.5 on wards this register got
> > removed.In QPIC version 2.0 0x2c offset is updated with register
> > NAND_AUTO_STATUS_EN So adding this register macro NAND_AUTO_STATUS_EN
> > with offset 0x2c.
> >
> > Signed-off-by: Md Sadre Alam <[email protected]>
>
> Ping! Is any additional info needed for this patch ?
The patch is fine but we are at -rc6, the NAND PR has already been
sent, I don't plan to add more patches for this release. I will apply
new patches at v5.12-rc1.
Thanks,
Miquèl
On Sun, Jan 31, 2021 at 01:37:16AM +0530, Md Sadre Alam wrote:
> This change will remove unused register name macro NAND_DEV1_ECC_CFG.
> Since this register was only available in QPIC version 1.4.20 ipq40xx
> and it was not used. In QPIC version 1.5 on wards this register got
> removed.In QPIC version 2.0 0x2c offset is updated with register
> NAND_AUTO_STATUS_EN So adding this register macro NAND_AUTO_STATUS_EN
> with offset 0x2c.
>
> Signed-off-by: Md Sadre Alam <[email protected]>
Reviewed-by: Manivannan Sadhasivam <[email protected]>
Thanks,
Mani
> ---
> drivers/mtd/nand/raw/qcom_nandc.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/mtd/nand/raw/qcom_nandc.c b/drivers/mtd/nand/raw/qcom_nandc.c
> index 9484be8..c238a35 100644
> --- a/drivers/mtd/nand/raw/qcom_nandc.c
> +++ b/drivers/mtd/nand/raw/qcom_nandc.c
> @@ -27,7 +27,7 @@
> #define NAND_DEV0_CFG0 0x20
> #define NAND_DEV0_CFG1 0x24
> #define NAND_DEV0_ECC_CFG 0x28
> -#define NAND_DEV1_ECC_CFG 0x2c
> +#define NAND_AUTO_STATUS_EN 0x2c
> #define NAND_DEV1_CFG0 0x30
> #define NAND_DEV1_CFG1 0x34
> #define NAND_READ_ID 0x40
> --
> 2.7.4
>
On Sat, 2021-01-30 at 20:07:16 UTC, Md Sadre Alam wrote:
> This change will remove unused register name macro NAND_DEV1_ECC_CFG.
> Since this register was only available in QPIC version 1.4.20 ipq40xx
> and it was not used. In QPIC version 1.5 on wards this register got
> removed.In QPIC version 2.0 0x2c offset is updated with register
> NAND_AUTO_STATUS_EN So adding this register macro NAND_AUTO_STATUS_EN
> with offset 0x2c.
>
> Signed-off-by: Md Sadre Alam <[email protected]>
> Reviewed-by: Manivannan Sadhasivam <[email protected]>
Applied to https://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux.git nand/next, thanks.
Miquel