2024-06-14 02:48:10

by Shawn Sung

[permalink] [raw]
Subject: [PATCH v9 17/21] drm/mediatek: Support "Pre-multiplied" blending in Mixer

From: Hsiao Chien Sung <[email protected]>

Support "Pre-multiplied" alpha blending mode in Mixer.
Before this patch, only the coverage mode is supported.

Signed-off-by: Hsiao Chien Sung <[email protected]>
---
drivers/gpu/drm/mediatek/mtk_ethdr.c | 10 ++++++++--
1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/mediatek/mtk_ethdr.c b/drivers/gpu/drm/mediatek/mtk_ethdr.c
index 907c0ed34c64..0aa6b23287e5 100644
--- a/drivers/gpu/drm/mediatek/mtk_ethdr.c
+++ b/drivers/gpu/drm/mediatek/mtk_ethdr.c
@@ -6,6 +6,7 @@
#include <drm/drm_blend.h>
#include <drm/drm_fourcc.h>
#include <drm/drm_framebuffer.h>
+#include <drm/drm_blend.h>
#include <linux/clk.h>
#include <linux/component.h>
#include <linux/of.h>
@@ -36,6 +37,7 @@
#define MIX_SRC_L0_EN BIT(0)
#define MIX_L_SRC_CON(n) (0x28 + 0x18 * (n))
#define NON_PREMULTI_SOURCE (2 << 12)
+#define PREMULTI_SOURCE (3 << 12)
#define MIX_L_SRC_SIZE(n) (0x30 + 0x18 * (n))
#define MIX_L_SRC_OFFSET(n) (0x34 + 0x18 * (n))
#define MIX_FUNC_DCM0 0x120
@@ -176,6 +178,11 @@ void mtk_ethdr_layer_config(struct device *dev, unsigned int idx,
alpha_con |= state->base.alpha & MIXER_ALPHA;
}

+ if (state->base.pixel_blend_mode != DRM_MODE_BLEND_COVERAGE)
+ alpha_con |= PREMULTI_SOURCE;
+ else
+ alpha_con |= NON_PREMULTI_SOURCE;
+
if ((state->base.fb && !state->base.fb->format->has_alpha) ||
state->base.pixel_blend_mode == DRM_MODE_BLEND_PIXEL_NONE) {
/*
@@ -192,8 +199,7 @@ void mtk_ethdr_layer_config(struct device *dev, unsigned int idx,
mtk_ddp_write(cmdq_pkt, pending->height << 16 | align_width, &mixer->cmdq_base,
mixer->regs, MIX_L_SRC_SIZE(idx));
mtk_ddp_write(cmdq_pkt, offset, &mixer->cmdq_base, mixer->regs, MIX_L_SRC_OFFSET(idx));
- mtk_ddp_write_mask(cmdq_pkt, alpha_con, &mixer->cmdq_base, mixer->regs, MIX_L_SRC_CON(idx),
- 0x1ff);
+ mtk_ddp_write(cmdq_pkt, alpha_con, &mixer->cmdq_base, mixer->regs, MIX_L_SRC_CON(idx));
mtk_ddp_write_mask(cmdq_pkt, BIT(idx), &mixer->cmdq_base, mixer->regs, MIX_SRC_CON,
BIT(idx));
}
--
2.18.0



2024-06-14 05:56:21

by CK Hu (胡俊光)

[permalink] [raw]
Subject: Re: [PATCH v9 17/21] drm/mediatek: Support "Pre-multiplied" blending in Mixer

Hi, Shawn:

On Fri, 2024-06-14 at 10:46 +0800, Shawn Sung wrote:
> From: Hsiao Chien Sung <[email protected]>
>
> Support "Pre-multiplied" alpha blending mode in Mixer.
> Before this patch, only the coverage mode is supported.
>
> Signed-off-by: Hsiao Chien Sung <[email protected]>
> ---
> drivers/gpu/drm/mediatek/mtk_ethdr.c | 10 ++++++++--
> 1 file changed, 8 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_ethdr.c b/drivers/gpu/drm/mediatek/mtk_ethdr.c
> index 907c0ed34c64..0aa6b23287e5 100644
> --- a/drivers/gpu/drm/mediatek/mtk_ethdr.c
> +++ b/drivers/gpu/drm/mediatek/mtk_ethdr.c
> @@ -6,6 +6,7 @@
> #include <drm/drm_blend.h>
> #include <drm/drm_fourcc.h>
> #include <drm/drm_framebuffer.h>
> +#include <drm/drm_blend.h>
> #include <linux/clk.h>
> #include <linux/component.h>
> #include <linux/of.h>
> @@ -36,6 +37,7 @@
> #define MIX_SRC_L0_EN BIT(0)
> #define MIX_L_SRC_CON(n) (0x28 + 0x18 * (n))
> #define NON_PREMULTI_SOURCE (2 << 12)
> +#define PREMULTI_SOURCE (3 << 12)
> #define MIX_L_SRC_SIZE(n) (0x30 + 0x18 * (n))
> #define MIX_L_SRC_OFFSET(n) (0x34 + 0x18 * (n))
> #define MIX_FUNC_DCM0 0x120
> @@ -176,6 +178,11 @@ void mtk_ethdr_layer_config(struct device *dev, unsigned int idx,
> alpha_con |= state->base.alpha & MIXER_ALPHA;
> }
>
> + if (state->base.pixel_blend_mode != DRM_MODE_BLEND_COVERAGE)

I prefer

if (state->base.pixel_blend_mode == DRM_MODE_BLEND_PREMULTI)

because the flag is premulti or not so none blend and coverage should have the same setting.

Regards,
CK

> + alpha_con |= PREMULTI_SOURCE;
> + else
> + alpha_con |= NON_PREMULTI_SOURCE;
> +
> if ((state->base.fb && !state->base.fb->format->has_alpha) ||
> state->base.pixel_blend_mode == DRM_MODE_BLEND_PIXEL_NONE) {
> /*
> @@ -192,8 +199,7 @@ void mtk_ethdr_layer_config(struct device *dev, unsigned int idx,
> mtk_ddp_write(cmdq_pkt, pending->height << 16 | align_width, &mixer->cmdq_base,
> mixer->regs, MIX_L_SRC_SIZE(idx));
> mtk_ddp_write(cmdq_pkt, offset, &mixer->cmdq_base, mixer->regs, MIX_L_SRC_OFFSET(idx));
> - mtk_ddp_write_mask(cmdq_pkt, alpha_con, &mixer->cmdq_base, mixer->regs, MIX_L_SRC_CON(idx),
> - 0x1ff);
> + mtk_ddp_write(cmdq_pkt, alpha_con, &mixer->cmdq_base, mixer->regs, MIX_L_SRC_CON(idx));
> mtk_ddp_write_mask(cmdq_pkt, BIT(idx), &mixer->cmdq_base, mixer->regs, MIX_SRC_CON,
> BIT(idx));
> }