Add support for Amlogic S4 PWM and related device nodes.
Signed-off-by: Kelvin Zhang <[email protected]>
---
Changes in v5:
- Add devm_add_action_or_reset for free clk when unloading.
- Replace the underscores of node name with dashes.
- Link to v4: https://lore.kernel.org/r/[email protected]
---
Junyi Zhao (2):
pwm: meson: Add support for Amlogic S4 PWM
arm64: dts: amlogic: Add Amlogic S4 PWM
arch/arm64/boot/dts/amlogic/meson-s4.dtsi | 207 ++++++++++++++++++++++++++++++
drivers/pwm/pwm-meson.c | 53 ++++++++
2 files changed, 260 insertions(+)
---
base-commit: 124cfbcd6d185d4f50be02d5f5afe61578916773
change-id: 20240424-s4-pwm-2d709986caee
Best regards,
--
Kelvin Zhang <[email protected]>
From: Junyi Zhao <[email protected]>
This patch adds support for Amlogic S4 PWM.
Signed-off-by: Junyi Zhao <[email protected]>
Signed-off-by: Kelvin Zhang <[email protected]>
---
drivers/pwm/pwm-meson.c | 53 +++++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 53 insertions(+)
diff --git a/drivers/pwm/pwm-meson.c b/drivers/pwm/pwm-meson.c
index b2f97dfb01bb..9fea28a51921 100644
--- a/drivers/pwm/pwm-meson.c
+++ b/drivers/pwm/pwm-meson.c
@@ -460,6 +460,51 @@ static int meson_pwm_init_channels_meson8b_v2(struct pwm_chip *chip)
return meson_pwm_init_clocks_meson8b(chip, mux_parent_data);
}
+static void meson_pwm_s4_put_clk(void *data)
+{
+ int i;
+ struct meson_pwm *meson;
+ struct meson_pwm_channel *channel;
+
+ meson = (struct meson_pwm *)data;
+ for (i = 0; i < MESON_NUM_PWMS; i++) {
+ channel = &meson->channels[i];
+ clk_put(channel->clk);
+ }
+}
+
+static int meson_pwm_init_channels_meson_s4(struct pwm_chip *chip)
+{
+ int i, ret;
+ struct device *dev = pwmchip_parent(chip);
+ struct device_node *np = dev->of_node;
+ struct meson_pwm *meson = to_meson_pwm(chip);
+ struct meson_pwm_channel *channel;
+
+ for (i = 0; i < MESON_NUM_PWMS; i++) {
+ channel = &meson->channels[i];
+ channel->clk = of_clk_get(np, i);
+ if (IS_ERR(channel->clk)) {
+ ret = PTR_ERR(channel->clk);
+ dev_err_probe(dev, ret, "Failed to get clk\n");
+ goto err;
+ }
+ }
+ ret = devm_add_action_or_reset(dev, meson_pwm_s4_put_clk, meson);
+ if (ret)
+ return ret;
+
+ return 0;
+
+err:
+ while (--i >= 0) {
+ channel = &meson->channels[i];
+ clk_put(channel->clk);
+ }
+
+ return ret;
+}
+
static const struct meson_pwm_data pwm_meson8b_data = {
.parent_names = { "xtal", NULL, "fclk_div4", "fclk_div3" },
.channels_init = meson_pwm_init_channels_meson8b_legacy,
@@ -498,6 +543,10 @@ static const struct meson_pwm_data pwm_meson8_v2_data = {
.channels_init = meson_pwm_init_channels_meson8b_v2,
};
+static const struct meson_pwm_data pwm_meson_s4_data = {
+ .channels_init = meson_pwm_init_channels_meson_s4,
+};
+
static const struct of_device_id meson_pwm_matches[] = {
{
.compatible = "amlogic,meson8-pwm-v2",
@@ -536,6 +585,10 @@ static const struct of_device_id meson_pwm_matches[] = {
.compatible = "amlogic,meson-g12a-ao-pwm-cd",
.data = &pwm_g12a_ao_cd_data
},
+ {
+ .compatible = "amlogic,meson-s4-pwm",
+ .data = &pwm_meson_s4_data
+ },
{},
};
MODULE_DEVICE_TABLE(of, meson_pwm_matches);
--
2.37.1
From: Junyi Zhao <[email protected]>
Add device nodes for PWM_AB, PWM_CD, PWM_EF, PWM_GH and PWM_IJ
along with GPIO PIN configs of each channel.
Signed-off-by: Junyi Zhao <[email protected]>
Signed-off-by: Kelvin Zhang <[email protected]>
---
arch/arm64/boot/dts/amlogic/meson-s4.dtsi | 207 ++++++++++++++++++++++++++++++
1 file changed, 207 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-s4.dtsi b/arch/arm64/boot/dts/amlogic/meson-s4.dtsi
index 10896f9df682..d0c170368892 100644
--- a/arch/arm64/boot/dts/amlogic/meson-s4.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-s4.dtsi
@@ -292,6 +292,168 @@ mux {
};
};
+ pwm_a_pins1: pwm-a-pins1 {
+ mux {
+ groups = "pwm_a_d";
+ function = "pwm_a";
+ };
+ };
+
+ pwm_a_pins2: pwm-a-pins2 {
+ mux {
+ groups = "pwm_a_x";
+ function = "pwm_a";
+ };
+ };
+
+ pwm_a_pins: pwm-a-pins {
+ mux {
+ groups = "pwm_a_d";
+ function = "pwm_a";
+ };
+ };
+
+ pwm_b_pins1: pwm-b-pins1 {
+ mux {
+ groups = "pwm_b_d";
+ function = "pwm_b";
+ };
+ };
+
+ pwm_b_pins2: pwm-b-pins2 {
+ mux {
+ groups = "pwm_b_x";
+ function = "pwm_b";
+ };
+ };
+
+ pwm_c_pins1: pwm-c-pins1 {
+ mux {
+ groups = "pwm_c_d";
+ function = "pwm_c";
+ };
+ };
+
+ pwm_c_pins2: pwm-c-pins2 {
+ mux {
+ groups = "pwm_c_x";
+ function = "pwm_c";
+ };
+ };
+
+ pwm_d_pins1: pwm-d-pins1 {
+ mux {
+ groups = "pwm_d_d";
+ function = "pwm_d";
+ };
+ };
+
+ pwm_d_pins2: pwm-d-pins2 {
+ mux {
+ groups = "pwm_d_h";
+ function = "pwm_d";
+ };
+ };
+
+ pwm_e_pins1: pwm-e-pins1 {
+ mux {
+ groups = "pwm_e_x";
+ function = "pwm_e";
+ drive-strength-microamp = <500>;
+ };
+ };
+
+ pwm_e_pins2: pwm-e-pins2 {
+ mux {
+ groups = "pwm_e_z";
+ function = "pwm_e";
+ };
+ };
+
+ pwm_f_pins1: pwm-f-pins1 {
+ mux {
+ groups = "pwm_f_x";
+ function = "pwm_f";
+ };
+ };
+
+ pwm_f_pins2: pwm-f-pins2 {
+ mux {
+ groups = "pwm_f_z";
+ function = "pwm_f";
+ };
+ };
+
+ pwm_g_pins1: pwm-g-pins1 {
+ mux {
+ groups = "pwm_g_d";
+ function = "pwm_g";
+ };
+ };
+
+ pwm_g_pins2: pwm-g-pins2 {
+ mux {
+ groups = "pwm_g_z";
+ function = "pwm_g";
+ };
+ };
+
+ pwm_h_pins: pwm-h-pins {
+ mux {
+ groups = "pwm_h";
+ function = "pwm_h";
+ };
+ };
+
+ pwm_i_pins1: pwm-i-pins1 {
+ mux {
+ groups = "pwm_i_d";
+ function = "pwm_i";
+ };
+ };
+
+ pwm_i_pins2: pwm-i-pins2 {
+ mux {
+ groups = "pwm_i_h";
+ function = "pwm_i";
+ };
+ };
+
+ pwm_j_pins: pwm-j-pins {
+ mux {
+ groups = "pwm_j";
+ function = "pwm_j";
+ };
+ };
+
+ pwm_a_hiz_pins: pwm-a-hiz-pins {
+ mux {
+ groups = "pwm_a_hiz";
+ function = "pwm_a_hiz";
+ };
+ };
+
+ pwm_b_hiz_pins: pwm-b-hiz-pins {
+ mux {
+ groups = "pwm_b_hiz";
+ function = "pwm_b_hiz";
+ };
+ };
+
+ pwm_c_hiz_pins: pwm-c-hiz-pins {
+ mux {
+ groups = "pwm_c_hiz";
+ function = "pwm_b_hiz";
+ };
+ };
+
+ pwm_g_hiz_pins: pwm-g-hiz-pins {
+ mux {
+ groups = "pwm_g_hiz";
+ function = "pwm_g_hiz";
+ };
+ };
+
nand_pins: nand-pins {
mux {
groups = "emmc_nand_d0",
@@ -449,6 +611,51 @@ i2c4: i2c@6e000 {
status = "disabled";
};
+ pwm_ab: pwm@58000 {
+ compatible = "amlogic,meson-s4-pwm";
+ reg = <0x0 0x58000 0x0 0x24>;
+ clocks = <&clkc_periphs CLKID_PWM_A>,
+ <&clkc_periphs CLKID_PWM_B>;
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ pwm_cd: pwm@5a000 {
+ compatible = "amlogic,meson-s4-pwm";
+ reg = <0x0 0x5a000 0x0 0x24>;
+ clocks = <&clkc_periphs CLKID_PWM_C>,
+ <&clkc_periphs CLKID_PWM_D>;
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ pwm_ef: pwm@5c000 {
+ compatible = "amlogic,meson-s4-pwm";
+ reg = <0x0 0x5c000 0x0 0x24>;
+ clocks = <&clkc_periphs CLKID_PWM_E>,
+ <&clkc_periphs CLKID_PWM_F>;
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ pwm_gh: pwm@5e000 {
+ compatible = "amlogic,meson-s4-pwm";
+ reg = <0x0 0x5e000 0x0 0x24>;
+ clocks = <&clkc_periphs CLKID_PWM_G>,
+ <&clkc_periphs CLKID_PWM_H>;
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ pwm_ij: pwm@60000 {
+ compatible = "amlogic,meson-s4-pwm";
+ reg = <0x0 0x60000 0x0 0x24>;
+ clocks = <&clkc_periphs CLKID_PWM_I>,
+ <&clkc_periphs CLKID_PWM_J>;
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
nand: nand-controller@8c800 {
compatible = "amlogic,meson-axg-nfc";
reg = <0x0 0x8c800 0x0 0x100>, <0x0 0x8c000 0x0 0x4>;
--
2.37.1
Hello Kelvin, Junyi
On 5/21/24 11:31, Kelvin Zhang via B4 Relay wrote:
> From: Junyi Zhao <[email protected]>
>
> This patch adds support for Amlogic S4 PWM.
Please take a look at
https://www.kernel.org/doc/html/v6.9/process/submitting-patches.html#describe-your-changes
It should be something like
Add support for Amlogic S4 PWM.
>
> Signed-off-by: Junyi Zhao <[email protected]>
> Signed-off-by: Kelvin Zhang <[email protected]>
> ---
> drivers/pwm/pwm-meson.c | 53 +++++++++++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 53 insertions(+)
>
> diff --git a/drivers/pwm/pwm-meson.c b/drivers/pwm/pwm-meson.c
> index b2f97dfb01bb..9fea28a51921 100644
> --- a/drivers/pwm/pwm-meson.c
> +++ b/drivers/pwm/pwm-meson.c
> @@ -460,6 +460,51 @@ static int meson_pwm_init_channels_meson8b_v2(struct pwm_chip *chip)
> return meson_pwm_init_clocks_meson8b(chip, mux_parent_data);
> }
>
> +static void meson_pwm_s4_put_clk(void *data)
> +{
> + int i;
> + struct meson_pwm *meson;
> + struct meson_pwm_channel *channel;
> +
> + meson = (struct meson_pwm *)data;
You can initialize meson variable along with declaration; type casting
is not needed
> + for (i = 0; i < MESON_NUM_PWMS; i++) {
> + channel = &meson->channels[i];
> + clk_put(channel->clk);
> + }
you can save 3 lines just by using clk_put(meson->channels[i].clk);
> +}
> +
> +static int meson_pwm_init_channels_meson_s4(struct pwm_chip *chip)
> +{
> + int i, ret;
> + struct device *dev = pwmchip_parent(chip);
> + struct device_node *np = dev->of_node;
> + struct meson_pwm *meson = to_meson_pwm(chip);
> + struct meson_pwm_channel *channel;
> +
> + for (i = 0; i < MESON_NUM_PWMS; i++) {
> + channel = &meson->channels[i];
> + channel->clk = of_clk_get(np, i);
> + if (IS_ERR(channel->clk)) {
> + ret = PTR_ERR(channel->clk);
> + dev_err_probe(dev, ret, "Failed to get clk\n");
> + goto err;
> + }
> + }
> + ret = devm_add_action_or_reset(dev, meson_pwm_s4_put_clk, meson);
> + if (ret)
> + return ret;
> +
> + return 0;
> +
> +err:
> + while (--i >= 0) {
> + channel = &meson->channels[i];
> + clk_put(channel->clk);
> + }
> +
> + return ret;
> +}
> +
> static const struct meson_pwm_data pwm_meson8b_data = {
> .parent_names = { "xtal", NULL, "fclk_div4", "fclk_div3" },
> .channels_init = meson_pwm_init_channels_meson8b_legacy,
> @@ -498,6 +543,10 @@ static const struct meson_pwm_data pwm_meson8_v2_data = {
> .channels_init = meson_pwm_init_channels_meson8b_v2,
> };
>
> +static const struct meson_pwm_data pwm_meson_s4_data = {
> + .channels_init = meson_pwm_init_channels_meson_s4,
> +};
> +
according to already existing soc-specific named vars and functions
new names should be
static const struct meson_pwm_data pwm_s4_data
and
static int meson_pwm_init_channels_s4(struct pwm_chip *chip)
> static const struct of_device_id meson_pwm_matches[] = {
> {
> .compatible = "amlogic,meson8-pwm-v2",
> @@ -536,6 +585,10 @@ static const struct of_device_id meson_pwm_matches[] = {
> .compatible = "amlogic,meson-g12a-ao-pwm-cd",
> .data = &pwm_g12a_ao_cd_data
> },
> + {
> + .compatible = "amlogic,meson-s4-pwm",
> + .data = &pwm_meson_s4_data
> + },
> {},
> };
> MODULE_DEVICE_TABLE(of, meson_pwm_matches);
>
--
Best regards
George
Hello Kelvin, Junyi
On 5/21/24 11:31, Kelvin Zhang via B4 Relay wrote:
> From: Junyi Zhao <[email protected]>
>
> Add device nodes for PWM_AB, PWM_CD, PWM_EF, PWM_GH and PWM_IJ
> along with GPIO PIN configs of each channel.
>
> Signed-off-by: Junyi Zhao <[email protected]>
> Signed-off-by: Kelvin Zhang <[email protected]>
> ---
> arch/arm64/boot/dts/amlogic/meson-s4.dtsi | 207 ++++++++++++++++++++++++++++++
> 1 file changed, 207 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/amlogic/meson-s4.dtsi b/arch/arm64/boot/dts/amlogic/meson-s4.dtsi
> index 10896f9df682..d0c170368892 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-s4.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/meson-s4.dtsi
> @@ -292,6 +292,168 @@ mux {
> };
> };
>
..
> @@ -449,6 +611,51 @@ i2c4: i2c@6e000 {
> status = "disabled";
> };
>
> + pwm_ab: pwm@58000 {
> + compatible = "amlogic,meson-s4-pwm";
> + reg = <0x0 0x58000 0x0 0x24>;
> + clocks = <&clkc_periphs CLKID_PWM_A>,
> + <&clkc_periphs CLKID_PWM_B>;
> + #pwm-cells = <3>;
> + status = "disabled";
> + };
> +
> + pwm_cd: pwm@5a000 {
> + compatible = "amlogic,meson-s4-pwm";
> + reg = <0x0 0x5a000 0x0 0x24>;
> + clocks = <&clkc_periphs CLKID_PWM_C>,
> + <&clkc_periphs CLKID_PWM_D>;
> + #pwm-cells = <3>;
> + status = "disabled";
> + };
> +
> + pwm_ef: pwm@5c000 {
> + compatible = "amlogic,meson-s4-pwm";
> + reg = <0x0 0x5c000 0x0 0x24>;
> + clocks = <&clkc_periphs CLKID_PWM_E>,
> + <&clkc_periphs CLKID_PWM_F>;
> + #pwm-cells = <3>;
> + status = "disabled";
> + };
> +
> + pwm_gh: pwm@5e000 {
> + compatible = "amlogic,meson-s4-pwm";
> + reg = <0x0 0x5e000 0x0 0x24>;
> + clocks = <&clkc_periphs CLKID_PWM_G>,
> + <&clkc_periphs CLKID_PWM_H>;
> + #pwm-cells = <3>;
> + status = "disabled";
> + };
> +
> + pwm_ij: pwm@60000 {
> + compatible = "amlogic,meson-s4-pwm";
> + reg = <0x0 0x60000 0x0 0x24>;
> + clocks = <&clkc_periphs CLKID_PWM_I>,
> + <&clkc_periphs CLKID_PWM_J>;
> + #pwm-cells = <3>;
> + status = "disabled";
> + };
> +
> nand: nand-controller@8c800 {
> compatible = "amlogic,meson-axg-nfc";
> reg = <0x0 0x8c800 0x0 0x100>, <0x0 0x8c000 0x0 0x4>;
>
Nodes on any bus, thus using unit addresses for children, shall be
ordered by unit address in ascending order.
So the pwm_xx nodes should be placed between spicc0: spi@50000 and
i2c0: i2c@66000 nodes
--
Best regards
George
On 2024/5/22 2:50, George Stark wrote:
> [ EXTERNAL EMAIL ]
>
> Hello Kelvin, Junyi
>
> On 5/21/24 11:31, Kelvin Zhang via B4 Relay wrote:
>> From: Junyi Zhao <[email protected]>
>>
>> This patch adds support for Amlogic S4 PWM.
>
> Please take a look at
> https://www.kernel.org/doc/html/v6.9/process/submitting-patches.html#describe-your-changes
>
> It should be something like
> Add support for Amlogic S4 PWM.
>
>
>>
>> Signed-off-by: Junyi Zhao <[email protected]>
>> Signed-off-by: Kelvin Zhang <[email protected]>
>> ---
>> drivers/pwm/pwm-meson.c | 53
>> +++++++++++++++++++++++++++++++++++++++++++++++++
>> 1 file changed, 53 insertions(+)
>>
>> diff --git a/drivers/pwm/pwm-meson.c b/drivers/pwm/pwm-meson.c
>> index b2f97dfb01bb..9fea28a51921 100644
>> --- a/drivers/pwm/pwm-meson.c
>> +++ b/drivers/pwm/pwm-meson.c
>> @@ -460,6 +460,51 @@ static int
>> meson_pwm_init_channels_meson8b_v2(struct pwm_chip *chip)
>> return meson_pwm_init_clocks_meson8b(chip, mux_parent_data);
>> }
>>
>> +static void meson_pwm_s4_put_clk(void *data)
>> +{
>> + int i;
>> + struct meson_pwm *meson;
>> + struct meson_pwm_channel *channel;
>> +
>> + meson = (struct meson_pwm *)data;
> You can initialize meson variable along with declaration; type casting
> is not needed
>
>> + for (i = 0; i < MESON_NUM_PWMS; i++) {
>> + channel = &meson->channels[i];
>> + clk_put(channel->clk);
>> + }
> you can save 3 lines just by using clk_put(meson->channels[i].clk);
>
>> +}
>> +
>> +static int meson_pwm_init_channels_meson_s4(struct pwm_chip *chip)
>> +{
>> + int i, ret;
>> + struct device *dev = pwmchip_parent(chip);
>> + struct device_node *np = dev->of_node;
>> + struct meson_pwm *meson = to_meson_pwm(chip);
>> + struct meson_pwm_channel *channel;
>> +
>> + for (i = 0; i < MESON_NUM_PWMS; i++) {
>> + channel = &meson->channels[i];
>> + channel->clk = of_clk_get(np, i);
>> + if (IS_ERR(channel->clk)) {
>> + ret = PTR_ERR(channel->clk);
>> + dev_err_probe(dev, ret, "Failed to get clk\n");
>> + goto err;
>> + }
>> + }
>> + ret = devm_add_action_or_reset(dev, meson_pwm_s4_put_clk, meson);
>> + if (ret)
>> + return ret;
>> +
>> + return 0;
>> +
>> +err:
>> + while (--i >= 0) {
>> + channel = &meson->channels[i];
>> + clk_put(channel->clk);
>> + }
>> +
>> + return ret;
>> +}
>> +
>> static const struct meson_pwm_data pwm_meson8b_data = {
>> .parent_names = { "xtal", NULL, "fclk_div4", "fclk_div3" },
>> .channels_init = meson_pwm_init_channels_meson8b_legacy,
>> @@ -498,6 +543,10 @@ static const struct meson_pwm_data
>> pwm_meson8_v2_data = {
>> .channels_init = meson_pwm_init_channels_meson8b_v2,
>> };
>>
>> +static const struct meson_pwm_data pwm_meson_s4_data = {
>> + .channels_init = meson_pwm_init_channels_meson_s4,
>> +};
>> +
> according to already existing soc-specific named vars and functions
> new names should be
> static const struct meson_pwm_data pwm_s4_data
> and
> static int meson_pwm_init_channels_s4(struct pwm_chip *chip)
>
>> static const struct of_device_id meson_pwm_matches[] = {
>> {
>> .compatible = "amlogic,meson8-pwm-v2",
>> @@ -536,6 +585,10 @@ static const struct of_device_id
>> meson_pwm_matches[] = {
>> .compatible = "amlogic,meson-g12a-ao-pwm-cd",
>> .data = &pwm_g12a_ao_cd_data
>> },
>> + {
>> + .compatible = "amlogic,meson-s4-pwm",
>> + .data = &pwm_meson_s4_data
>> + },
>> {},
>> };
>> MODULE_DEVICE_TABLE(of, meson_pwm_matches);
>>
>
> --
> Best regards
> George
Thks for your suggestion. i will check it.
--
Junyi