No need to save the control and status registers CRMD, EUEN, ECFG
and ESTAT in SAVE_SOME and handle_syscall as they are not restored
later in RESTORE_SOME.
Signed-off-by: Tiezhu Yang <[email protected]>
---
arch/loongarch/include/asm/stackframe.h | 9 ---------
arch/loongarch/kernel/entry.S | 8 --------
2 files changed, 17 deletions(-)
diff --git a/arch/loongarch/include/asm/stackframe.h b/arch/loongarch/include/asm/stackframe.h
index 4ca9530..733dc9e 100644
--- a/arch/loongarch/include/asm/stackframe.h
+++ b/arch/loongarch/include/asm/stackframe.h
@@ -114,14 +114,6 @@
LONG_S zero, sp, PT_R0
csrrd t0, LOONGARCH_CSR_PRMD
LONG_S t0, sp, PT_PRMD
- csrrd t0, LOONGARCH_CSR_CRMD
- LONG_S t0, sp, PT_CRMD
- csrrd t0, LOONGARCH_CSR_EUEN
- LONG_S t0, sp, PT_EUEN
- csrrd t0, LOONGARCH_CSR_ECFG
- LONG_S t0, sp, PT_ECFG
- csrrd t0, LOONGARCH_CSR_ESTAT
- PTR_S t0, sp, PT_ESTAT
cfi_st ra, PT_R1, \docfi
cfi_st a0, PT_R4, \docfi
cfi_st a1, PT_R5, \docfi
@@ -140,7 +132,6 @@
cfi_st fp, PT_R22, \docfi
/* Set thread_info if we're coming from user mode */
- csrrd t0, LOONGARCH_CSR_PRMD
andi t0, t0, 0x3 /* extract pplv bit */
beqz t0, 9f
diff --git a/arch/loongarch/kernel/entry.S b/arch/loongarch/kernel/entry.S
index d53b631..893e632 100644
--- a/arch/loongarch/kernel/entry.S
+++ b/arch/loongarch/kernel/entry.S
@@ -31,14 +31,6 @@ SYM_FUNC_START(handle_syscall)
st.d zero, sp, PT_R0
csrrd t2, LOONGARCH_CSR_PRMD
st.d t2, sp, PT_PRMD
- csrrd t2, LOONGARCH_CSR_CRMD
- st.d t2, sp, PT_CRMD
- csrrd t2, LOONGARCH_CSR_EUEN
- st.d t2, sp, PT_EUEN
- csrrd t2, LOONGARCH_CSR_ECFG
- st.d t2, sp, PT_ECFG
- csrrd t2, LOONGARCH_CSR_ESTAT
- st.d t2, sp, PT_ESTAT
cfi_st ra, PT_R1
cfi_st a0, PT_R4
cfi_st a1, PT_R5
--
2.1.0
On 2022/9/29 上午7:59, Tiezhu Yang wrote:
> No need to save the control and status registers CRMD, EUEN, ECFG
> and ESTAT in SAVE_SOME and handle_syscall as they are not restored
> later in RESTORE_SOME.
>
> Signed-off-by: Tiezhu Yang <[email protected]>
> ---
> arch/loongarch/include/asm/stackframe.h | 9 ---------
> arch/loongarch/kernel/entry.S | 8 --------
> 2 files changed, 17 deletions(-)
>
> diff --git a/arch/loongarch/include/asm/stackframe.h b/arch/loongarch/include/asm/stackframe.h
> index 4ca9530..733dc9e 100644
> --- a/arch/loongarch/include/asm/stackframe.h
> +++ b/arch/loongarch/include/asm/stackframe.h
> @@ -114,14 +114,6 @@
> LONG_S zero, sp, PT_R0
> csrrd t0, LOONGARCH_CSR_PRMD
> LONG_S t0, sp, PT_PRMD
> - csrrd t0, LOONGARCH_CSR_CRMD
> - LONG_S t0, sp, PT_CRMD
> - csrrd t0, LOONGARCH_CSR_EUEN
> - LONG_S t0, sp, PT_EUEN
> - csrrd t0, LOONGARCH_CSR_ECFG
> - LONG_S t0, sp, PT_ECFG
> - csrrd t0, LOONGARCH_CSR_ESTAT
> - PTR_S t0, sp, PT_ESTAT
> cfi_st ra, PT_R1, \docfi
> cfi_st a0, PT_R4, \docfi
> cfi_st a1, PT_R5, \docfi
> @@ -140,7 +132,6 @@
> cfi_st fp, PT_R22, \docfi
>
> /* Set thread_info if we're coming from user mode */
> - csrrd t0, LOONGARCH_CSR_PRMD
> andi t0, t0, 0x3 /* extract pplv bit */
> beqz t0, 9f
Hi, Tiezhu,
Have u tested debug functions like __show_regs? We discussed offline
about which registers should be saved in kretprobe lately. And I think
users use kprobe should not care about exception infos, because the old
way of kretprobe is the fixed break-insn-trigger. Then I suggested only
save the CSR.PLV and CSR.PIE. But this is not similar to exception
handler. Each exception occur we should save the current status in case
exception nest. We may unwind and debug the previous exception. If we
hadn't saved status at that time exception occured, we lost them.
Thanks,
Jinyang
>
> diff --git a/arch/loongarch/kernel/entry.S b/arch/loongarch/kernel/entry.S
> index d53b631..893e632 100644
> --- a/arch/loongarch/kernel/entry.S
> +++ b/arch/loongarch/kernel/entry.S
> @@ -31,14 +31,6 @@ SYM_FUNC_START(handle_syscall)
> st.d zero, sp, PT_R0
> csrrd t2, LOONGARCH_CSR_PRMD
> st.d t2, sp, PT_PRMD
> - csrrd t2, LOONGARCH_CSR_CRMD
> - st.d t2, sp, PT_CRMD
> - csrrd t2, LOONGARCH_CSR_EUEN
> - st.d t2, sp, PT_EUEN
> - csrrd t2, LOONGARCH_CSR_ECFG
> - st.d t2, sp, PT_ECFG
> - csrrd t2, LOONGARCH_CSR_ESTAT
> - st.d t2, sp, PT_ESTAT
> cfi_st ra, PT_R1
> cfi_st a0, PT_R4
> cfi_st a1, PT_R5