When establish link timeouts, probe fails but the error is unrelated since
the PCIe controller has been probed succesfully.
Align with most of the other dw-pcie drivers and ignore return of
dw_pcie_wait_for_link() in the host_init callback.
Signed-off-by: Neil Armstrong <[email protected]>
---
drivers/pci/controller/dwc/pci-meson.c | 5 +----
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/drivers/pci/controller/dwc/pci-meson.c b/drivers/pci/controller/dwc/pci-meson.c
index 33deb290c4e7..846275e68fbc 100644
--- a/drivers/pci/controller/dwc/pci-meson.c
+++ b/drivers/pci/controller/dwc/pci-meson.c
@@ -383,10 +383,7 @@ static int meson_pcie_host_init(struct pcie_port *pp)
pp->bridge->ops = &meson_pci_ops;
- ret = meson_pcie_establish_link(mp);
- if (ret)
- return ret;
-
+ meson_pcie_establish_link(mp);
dw_pcie_msi_init(pp);
return 0;
--
2.22.0
Neil Armstrong <[email protected]> writes:
> When establish link timeouts, probe fails but the error is unrelated since
> the PCIe controller has been probed succesfully.
>
> Align with most of the other dw-pcie drivers and ignore return of
> dw_pcie_wait_for_link() in the host_init callback.
>
> Signed-off-by: Neil Armstrong <[email protected]>
Tested-by: Kevin Hilman <[email protected]>
On Mon, Sep 21, 2020 at 1:50 AM Neil Armstrong <[email protected]> wrote:
>
> When establish link timeouts, probe fails but the error is unrelated since
> the PCIe controller has been probed succesfully.
>
> Align with most of the other dw-pcie drivers and ignore return of
> dw_pcie_wait_for_link() in the host_init callback.
I think all, not most DWC drivers should be aligned. Plus the code
here is pretty much the same, so I'm working on moving all this to the
common DWC code. Drivers that need to bring up the link will need to
implement .start_link() (currently only used for EP mode). Most of the
time that is just setting the LTSSM bit which Synopsys thought letting
every vendor do their own register for was a good idea. Sigh.
Rob
On Tue, Sep 22, 2020 at 11:30:30AM -0600, Rob Herring wrote:
> On Mon, Sep 21, 2020 at 1:50 AM Neil Armstrong <[email protected]> wrote:
> >
> > When establish link timeouts, probe fails but the error is unrelated since
> > the PCIe controller has been probed succesfully.
> >
> > Align with most of the other dw-pcie drivers and ignore return of
> > dw_pcie_wait_for_link() in the host_init callback.
>
> I think all, not most DWC drivers should be aligned. Plus the code
> here is pretty much the same, so I'm working on moving all this to the
> common DWC code. Drivers that need to bring up the link will need to
> implement .start_link() (currently only used for EP mode). Most of the
> time that is just setting the LTSSM bit which Synopsys thought letting
> every vendor do their own register for was a good idea. Sigh.
Should I drop this patch then ?
Thanks,
Lorenzo
On Thu, Nov 19, 2020 at 5:12 AM Lorenzo Pieralisi
<[email protected]> wrote:
>
> On Tue, Sep 22, 2020 at 11:30:30AM -0600, Rob Herring wrote:
> > On Mon, Sep 21, 2020 at 1:50 AM Neil Armstrong <[email protected]> wrote:
> > >
> > > When establish link timeouts, probe fails but the error is unrelated since
> > > the PCIe controller has been probed succesfully.
> > >
> > > Align with most of the other dw-pcie drivers and ignore return of
> > > dw_pcie_wait_for_link() in the host_init callback.
> >
> > I think all, not most DWC drivers should be aligned. Plus the code
> > here is pretty much the same, so I'm working on moving all this to the
> > common DWC code. Drivers that need to bring up the link will need to
> > implement .start_link() (currently only used for EP mode). Most of the
> > time that is just setting the LTSSM bit which Synopsys thought letting
> > every vendor do their own register for was a good idea. Sigh.
>
> Should I drop this patch then ?
Yes, this is done by my series.
Rob