2020-01-06 13:31:30

by Alain Volmat

[permalink] [raw]
Subject: [PATCH 0/6] i2c-stm32f7: support suspend/resume & wakeup

This serie replaces the previously sent serie "stm32: i2c: Add suspend/resume & add sleep pinctrls".

This serie adds support for pm sleep suspend / resume and allow I2C slave to be
a wakeup-source for the system.

Alain Volmat (6):
ARM: dts: stm32: add i2c4 sleep pinctrl on stm32mp15xx-dkx
ARM: dts: stm32: add i2c2/i2c5 sleep pinctrl on stm32mp157c-ev1
ARM: dts: stm32: add i2c4 sleep pinctrl on stm32mp157c-ed1
i2c: i2c-stm32f7: add PM_SLEEP suspend/resume support
i2c: i2c-stm32f7: allow controller to be wakeup-source
ARM: dts: stm32: add wakeup-source in all I2C nodes of stm32mp157c

arch/arm/boot/dts/stm32mp151.dtsi | 6 ++
arch/arm/boot/dts/stm32mp157c-ed1.dts | 3 +-
arch/arm/boot/dts/stm32mp157c-ev1.dts | 6 +-
arch/arm/boot/dts/stm32mp15xx-dkx.dtsi | 3 +-
drivers/i2c/busses/i2c-stm32f7.c | 187 ++++++++++++++++++++++++++++++++-
5 files changed, 196 insertions(+), 9 deletions(-)


2020-01-06 13:31:50

by Alain Volmat

[permalink] [raw]
Subject: [PATCH 2/6] ARM: dts: stm32: add i2c2/i2c5 sleep pinctrl on stm32mp157c-ev1

Add the sleep state pinctrl entry for the i2c2 and i2c5 nodes
of the stm32mp157c-ev1 board.

Signed-off-by: Alain Volmat <[email protected]>
---
arch/arm/boot/dts/stm32mp157c-ev1.dts | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/stm32mp157c-ev1.dts b/arch/arm/boot/dts/stm32mp157c-ev1.dts
index 228e35e16884..d4bfb2adb0e4 100644
--- a/arch/arm/boot/dts/stm32mp157c-ev1.dts
+++ b/arch/arm/boot/dts/stm32mp157c-ev1.dts
@@ -174,8 +174,9 @@
};

&i2c2 {
- pinctrl-names = "default";
+ pinctrl-names = "default", "sleep";
pinctrl-0 = <&i2c2_pins_a>;
+ pinctrl-1 = <&i2c2_pins_sleep_a>;
i2c-scl-rising-time-ns = <185>;
i2c-scl-falling-time-ns = <20>;
status = "okay";
@@ -227,8 +228,9 @@
};

&i2c5 {
- pinctrl-names = "default";
+ pinctrl-names = "default", "sleep";
pinctrl-0 = <&i2c5_pins_a>;
+ pinctrl-1 = <&i2c5_pins_sleep_a>;
i2c-scl-rising-time-ns = <185>;
i2c-scl-falling-time-ns = <20>;
status = "okay";
--
2.7.4

2020-01-06 13:31:54

by Alain Volmat

[permalink] [raw]
Subject: [PATCH 5/6] i2c: i2c-stm32f7: allow controller to be wakeup-source

Allow the i2c-stm32f7 controller to become a wakeup-source
of the system. In such case, when a slave is registered to the
I2C controller, receiving a I2C message targeting that registered
slave address wakes up the suspended system.

In order to be able to wake-up, the I2C controller DT node
must have the property wakeup-source defined and a slave
must be registered.

Signed-off-by: Alain Volmat <[email protected]>
---
drivers/i2c/busses/i2c-stm32f7.c | 98 ++++++++++++++++++++++++++++++++++------
1 file changed, 83 insertions(+), 15 deletions(-)

diff --git a/drivers/i2c/busses/i2c-stm32f7.c b/drivers/i2c/busses/i2c-stm32f7.c
index 5c3e8ac6ad92..844a22d64aa8 100644
--- a/drivers/i2c/busses/i2c-stm32f7.c
+++ b/drivers/i2c/busses/i2c-stm32f7.c
@@ -29,6 +29,7 @@
#include <linux/platform_device.h>
#include <linux/pinctrl/consumer.h>
#include <linux/pm_runtime.h>
+#include <linux/pm_wakeirq.h>
#include <linux/regmap.h>
#include <linux/reset.h>
#include <linux/slab.h>
@@ -49,6 +50,7 @@

/* STM32F7 I2C control 1 */
#define STM32F7_I2C_CR1_PECEN BIT(23)
+#define STM32F7_I2C_CR1_WUPEN BIT(18)
#define STM32F7_I2C_CR1_SBC BIT(16)
#define STM32F7_I2C_CR1_RXDMAEN BIT(15)
#define STM32F7_I2C_CR1_TXDMAEN BIT(14)
@@ -301,6 +303,7 @@ struct stm32f7_i2c_msg {
* @dma: dma data
* @use_dma: boolean to know if dma is used in the current transfer
* @regmap: holds SYSCFG phandle for Fast Mode Plus bits
+ * @wakeup_src: boolean to know if the device is a wakeup source
*/
struct stm32f7_i2c_dev {
struct i2c_adapter adap;
@@ -323,6 +326,7 @@ struct stm32f7_i2c_dev {
struct stm32_i2c_dma *dma;
bool use_dma;
struct regmap *regmap;
+ bool wakeup_src;
};

/*
@@ -1691,6 +1695,9 @@ static int stm32f7_i2c_smbus_xfer(struct i2c_adapter *adapter, u16 addr,
return ret;
}

+static void stm32f7_i2c_enable_wakeup(struct stm32f7_i2c_dev *i2c_dev,
+ bool enable);
+
static int stm32f7_i2c_reg_slave(struct i2c_client *slave)
{
struct stm32f7_i2c_dev *i2c_dev = i2c_get_adapdata(slave->adapter);
@@ -1717,6 +1724,9 @@ static int stm32f7_i2c_reg_slave(struct i2c_client *slave)
if (ret < 0)
return ret;

+ if (!stm32f7_i2c_is_slave_registered(i2c_dev))
+ stm32f7_i2c_enable_wakeup(i2c_dev, true);
+
if (id == 0) {
/* Configure Own Address 1 */
oar1 = readl_relaxed(i2c_dev->base + STM32F7_I2C_OAR1);
@@ -1758,6 +1768,9 @@ static int stm32f7_i2c_reg_slave(struct i2c_client *slave)

ret = 0;
pm_free:
+ if (!stm32f7_i2c_is_slave_registered(i2c_dev))
+ stm32f7_i2c_enable_wakeup(i2c_dev, false);
+
pm_runtime_mark_last_busy(dev);
pm_runtime_put_autosuspend(dev);

@@ -1791,8 +1804,10 @@ static int stm32f7_i2c_unreg_slave(struct i2c_client *slave)

i2c_dev->slave[id] = NULL;

- if (!(stm32f7_i2c_is_slave_registered(i2c_dev)))
+ if (!stm32f7_i2c_is_slave_registered(i2c_dev)) {
stm32f7_i2c_disable_irq(i2c_dev, STM32F7_I2C_ALL_IRQ_MASK);
+ stm32f7_i2c_enable_wakeup(i2c_dev, false);
+ }

pm_runtime_mark_last_busy(i2c_dev->dev);
pm_runtime_put_autosuspend(i2c_dev->dev);
@@ -1879,6 +1894,9 @@ static int stm32f7_i2c_probe(struct platform_device *pdev)
return irq_error ? : -ENOENT;
}

+ i2c_dev->wakeup_src = of_property_read_bool(pdev->dev.of_node,
+ "wakeup-source");
+
i2c_dev->clk = devm_clk_get(&pdev->dev, NULL);
if (IS_ERR(i2c_dev->clk)) {
dev_err(&pdev->dev, "Error: Missing controller clock\n");
@@ -1985,6 +2003,16 @@ static int stm32f7_i2c_probe(struct platform_device *pdev)
goto clk_free;
}

+ if (i2c_dev->wakeup_src) {
+ device_set_wakeup_capable(i2c_dev->dev, true);
+
+ ret = dev_pm_set_wake_irq(i2c_dev->dev, irq_event);
+ if (ret) {
+ dev_err(i2c_dev->dev, "Failed to set wake up irq\n");
+ goto clr_wakeup_capable;
+ }
+ }
+
platform_set_drvdata(pdev, i2c_dev);

pm_runtime_set_autosuspend_delay(i2c_dev->dev,
@@ -2014,6 +2042,13 @@ static int stm32f7_i2c_probe(struct platform_device *pdev)
pm_runtime_set_suspended(i2c_dev->dev);
pm_runtime_dont_use_autosuspend(i2c_dev->dev);

+ if (i2c_dev->wakeup_src)
+ dev_pm_clear_wake_irq(i2c_dev->dev);
+
+clr_wakeup_capable:
+ if (i2c_dev->wakeup_src)
+ device_set_wakeup_capable(i2c_dev->dev, false);
+
if (i2c_dev->dma) {
stm32_i2c_dma_free(i2c_dev->dma);
i2c_dev->dma = NULL;
@@ -2032,6 +2067,15 @@ static int stm32f7_i2c_remove(struct platform_device *pdev)
i2c_del_adapter(&i2c_dev->adap);
pm_runtime_get_sync(i2c_dev->dev);

+ if (i2c_dev->wakeup_src) {
+ dev_pm_clear_wake_irq(i2c_dev->dev);
+ /*
+ * enforce that wakeup is disabled and that the device
+ * is marked as non wakeup capable
+ */
+ device_init_wakeup(i2c_dev->dev, false);
+ }
+
pm_runtime_put_noidle(i2c_dev->dev);
pm_runtime_disable(i2c_dev->dev);
pm_runtime_set_suspended(i2c_dev->dev);
@@ -2127,20 +2171,41 @@ stm32f7_i2c_regs_restore(struct stm32f7_i2c_dev *i2c_dev)
return ret;
}

+static void stm32f7_i2c_enable_wakeup(struct stm32f7_i2c_dev *i2c_dev,
+ bool enable)
+{
+ void __iomem *base = i2c_dev->base;
+ u32 mask = STM32F7_I2C_CR1_WUPEN;
+
+ if (!i2c_dev->wakeup_src)
+ return;
+
+ if (enable) {
+ device_set_wakeup_enable(i2c_dev->dev, true);
+ stm32f7_i2c_set_bits(base + STM32F7_I2C_CR1, mask);
+ } else {
+ device_set_wakeup_enable(i2c_dev->dev, false);
+ stm32f7_i2c_clr_bits(base + STM32F7_I2C_CR1, mask);
+ }
+}
+
static int __maybe_unused stm32f7_i2c_suspend(struct device *dev)
{
struct stm32f7_i2c_dev *i2c_dev = dev_get_drvdata(dev);
int ret;

i2c_mark_adapter_suspended(&i2c_dev->adap);
- ret = stm32f7_i2c_regs_backup(i2c_dev);
- if (ret < 0) {
- i2c_mark_adapter_resumed(&i2c_dev->adap);
- return ret;
- }

- pinctrl_pm_select_sleep_state(dev);
- pm_runtime_force_suspend(dev);
+ if (!device_may_wakeup(dev) && !dev->power.wakeup_path) {
+ ret = stm32f7_i2c_regs_backup(i2c_dev);
+ if (ret < 0) {
+ i2c_mark_adapter_resumed(&i2c_dev->adap);
+ return ret;
+ }
+
+ pinctrl_pm_select_sleep_state(dev);
+ pm_runtime_force_suspend(dev);
+ }

return 0;
}
@@ -2150,14 +2215,17 @@ static int __maybe_unused stm32f7_i2c_resume(struct device *dev)
struct stm32f7_i2c_dev *i2c_dev = dev_get_drvdata(dev);
int ret;

- ret = pm_runtime_force_resume(dev);
- if (ret < 0)
- return ret;
- pinctrl_pm_select_default_state(dev);
+ if (!device_may_wakeup(dev) && !dev->power.wakeup_path) {
+ ret = pm_runtime_force_resume(dev);
+ if (ret < 0)
+ return ret;
+ pinctrl_pm_select_default_state(dev);
+
+ ret = stm32f7_i2c_regs_restore(i2c_dev);
+ if (ret < 0)
+ return ret;
+ }

- ret = stm32f7_i2c_regs_restore(i2c_dev);
- if (ret < 0)
- return ret;
i2c_mark_adapter_resumed(&i2c_dev->adap);

return 0;
--
2.7.4

2020-01-06 13:32:56

by Alain Volmat

[permalink] [raw]
Subject: [PATCH 4/6] i2c: i2c-stm32f7: add PM_SLEEP suspend/resume support

Backup/restore I2C registers as part of the suspend/resume
handlers. The device is marked as suspended to ensure that
transfers are rejected during the suspended period.

Signed-off-by: Pierre-Yves MORDRET <[email protected]>
Signed-off-by: Alain Volmat <[email protected]>
---
drivers/i2c/busses/i2c-stm32f7.c | 117 +++++++++++++++++++++++++++++++++++++--
1 file changed, 113 insertions(+), 4 deletions(-)

diff --git a/drivers/i2c/busses/i2c-stm32f7.c b/drivers/i2c/busses/i2c-stm32f7.c
index b2634afe066d..5c3e8ac6ad92 100644
--- a/drivers/i2c/busses/i2c-stm32f7.c
+++ b/drivers/i2c/busses/i2c-stm32f7.c
@@ -169,6 +169,24 @@
#define STM32F7_AUTOSUSPEND_DELAY (HZ / 100)

/**
+ * struct stm32f7_i2c_regs - i2c f7 registers backup
+ * @cr1: Control register 1
+ * @cr2: Control register 2
+ * @oar1: Own address 1 register
+ * @oar2: Own address 2 register
+ * @pecr: PEC register
+ * @tmgr: Timing register
+ */
+struct stm32f7_i2c_regs {
+ u32 cr1;
+ u32 cr2;
+ u32 oar1;
+ u32 oar2;
+ u32 pecr;
+ u32 tmgr;
+};
+
+/**
* struct stm32f7_i2c_spec - private i2c specification timing
* @rate: I2C bus speed (Hz)
* @rate_min: 80% of I2C bus speed (Hz)
@@ -276,6 +294,7 @@ struct stm32f7_i2c_msg {
* @timing: I2C computed timings
* @slave: list of slave devices registered on the I2C bus
* @slave_running: slave device currently used
+ * @backup_regs: backup of i2c controller registers (for suspend/resume)
* @slave_dir: transfer direction for the current slave device
* @master_mode: boolean to know in which mode the I2C is running (master or
* slave)
@@ -298,6 +317,7 @@ struct stm32f7_i2c_dev {
struct stm32f7_i2c_timings timing;
struct i2c_client *slave[STM32F7_I2C_MAX_SLAVE];
struct i2c_client *slave_running;
+ struct stm32f7_i2c_regs backup_regs;
u32 slave_dir;
bool master_mode;
struct stm32_i2c_dma *dma;
@@ -2027,8 +2047,7 @@ static int stm32f7_i2c_remove(struct platform_device *pdev)
return 0;
}

-#ifdef CONFIG_PM
-static int stm32f7_i2c_runtime_suspend(struct device *dev)
+static int __maybe_unused stm32f7_i2c_runtime_suspend(struct device *dev)
{
struct stm32f7_i2c_dev *i2c_dev = dev_get_drvdata(dev);

@@ -2038,7 +2057,7 @@ static int stm32f7_i2c_runtime_suspend(struct device *dev)
return 0;
}

-static int stm32f7_i2c_runtime_resume(struct device *dev)
+static int __maybe_unused stm32f7_i2c_runtime_resume(struct device *dev)
{
struct stm32f7_i2c_dev *i2c_dev = dev_get_drvdata(dev);
int ret;
@@ -2053,11 +2072,101 @@ static int stm32f7_i2c_runtime_resume(struct device *dev)

return 0;
}
-#endif
+
+static int __maybe_unused
+stm32f7_i2c_regs_backup(struct stm32f7_i2c_dev *i2c_dev)
+{
+ int ret;
+ struct stm32f7_i2c_regs *backup_regs = &i2c_dev->backup_regs;
+
+ ret = pm_runtime_get_sync(i2c_dev->dev);
+ if (ret < 0)
+ return ret;
+
+ backup_regs->cr1 = readl_relaxed(i2c_dev->base + STM32F7_I2C_CR1);
+ backup_regs->cr2 = readl_relaxed(i2c_dev->base + STM32F7_I2C_CR2);
+ backup_regs->oar1 = readl_relaxed(i2c_dev->base + STM32F7_I2C_OAR1);
+ backup_regs->oar2 = readl_relaxed(i2c_dev->base + STM32F7_I2C_OAR2);
+ backup_regs->pecr = readl_relaxed(i2c_dev->base + STM32F7_I2C_PECR);
+ backup_regs->tmgr = readl_relaxed(i2c_dev->base + STM32F7_I2C_TIMINGR);
+
+ pm_runtime_put_sync(i2c_dev->dev);
+
+ return ret;
+}
+
+static int __maybe_unused
+stm32f7_i2c_regs_restore(struct stm32f7_i2c_dev *i2c_dev)
+{
+ u32 cr1;
+ int ret;
+ struct stm32f7_i2c_regs *backup_regs = &i2c_dev->backup_regs;
+
+ ret = pm_runtime_get_sync(i2c_dev->dev);
+ if (ret < 0)
+ return ret;
+
+ cr1 = readl_relaxed(i2c_dev->base + STM32F7_I2C_CR1);
+ if (cr1 & STM32F7_I2C_CR1_PE)
+ stm32f7_i2c_clr_bits(i2c_dev->base + STM32F7_I2C_CR1,
+ STM32F7_I2C_CR1_PE);
+
+ writel_relaxed(backup_regs->tmgr, i2c_dev->base + STM32F7_I2C_TIMINGR);
+ writel_relaxed(backup_regs->cr1 & ~STM32F7_I2C_CR1_PE,
+ i2c_dev->base + STM32F7_I2C_CR1);
+ if (backup_regs->cr1 & STM32F7_I2C_CR1_PE)
+ stm32f7_i2c_set_bits(i2c_dev->base + STM32F7_I2C_CR1,
+ STM32F7_I2C_CR1_PE);
+ writel_relaxed(backup_regs->cr2, i2c_dev->base + STM32F7_I2C_CR2);
+ writel_relaxed(backup_regs->oar1, i2c_dev->base + STM32F7_I2C_OAR1);
+ writel_relaxed(backup_regs->oar2, i2c_dev->base + STM32F7_I2C_OAR2);
+ writel_relaxed(backup_regs->pecr, i2c_dev->base + STM32F7_I2C_PECR);
+
+ pm_runtime_put_sync(i2c_dev->dev);
+
+ return ret;
+}
+
+static int __maybe_unused stm32f7_i2c_suspend(struct device *dev)
+{
+ struct stm32f7_i2c_dev *i2c_dev = dev_get_drvdata(dev);
+ int ret;
+
+ i2c_mark_adapter_suspended(&i2c_dev->adap);
+ ret = stm32f7_i2c_regs_backup(i2c_dev);
+ if (ret < 0) {
+ i2c_mark_adapter_resumed(&i2c_dev->adap);
+ return ret;
+ }
+
+ pinctrl_pm_select_sleep_state(dev);
+ pm_runtime_force_suspend(dev);
+
+ return 0;
+}
+
+static int __maybe_unused stm32f7_i2c_resume(struct device *dev)
+{
+ struct stm32f7_i2c_dev *i2c_dev = dev_get_drvdata(dev);
+ int ret;
+
+ ret = pm_runtime_force_resume(dev);
+ if (ret < 0)
+ return ret;
+ pinctrl_pm_select_default_state(dev);
+
+ ret = stm32f7_i2c_regs_restore(i2c_dev);
+ if (ret < 0)
+ return ret;
+ i2c_mark_adapter_resumed(&i2c_dev->adap);
+
+ return 0;
+}

static const struct dev_pm_ops stm32f7_i2c_pm_ops = {
SET_RUNTIME_PM_OPS(stm32f7_i2c_runtime_suspend,
stm32f7_i2c_runtime_resume, NULL)
+ SET_SYSTEM_SLEEP_PM_OPS(stm32f7_i2c_suspend, stm32f7_i2c_resume)
};

static const struct of_device_id stm32f7_i2c_match[] = {
--
2.7.4

2020-01-06 13:32:59

by Alain Volmat

[permalink] [raw]
Subject: [PATCH 1/6] ARM: dts: stm32: add i2c4 sleep pinctrl on stm32mp15xx-dkx

Add the sleep state pinctrl entry for the i2c4 node
of the stm32mp15xx-dkx.dtsi

Signed-off-by: Alain Volmat <[email protected]>
---
arch/arm/boot/dts/stm32mp15xx-dkx.dtsi | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/stm32mp15xx-dkx.dtsi b/arch/arm/boot/dts/stm32mp15xx-dkx.dtsi
index f6672e87aef3..7f5fcb2c5b03 100644
--- a/arch/arm/boot/dts/stm32mp15xx-dkx.dtsi
+++ b/arch/arm/boot/dts/stm32mp15xx-dkx.dtsi
@@ -216,8 +216,9 @@
};

&i2c4 {
- pinctrl-names = "default";
+ pinctrl-names = "default", "sleep";
pinctrl-0 = <&i2c4_pins_a>;
+ pinctrl-1 = <&i2c4_pins_sleep_a>;
i2c-scl-rising-time-ns = <185>;
i2c-scl-falling-time-ns = <20>;
status = "okay";
--
2.7.4

2020-01-15 09:14:57

by Pierre-Yves MORDRET

[permalink] [raw]
Subject: Re: [PATCH 4/6] i2c: i2c-stm32f7: add PM_SLEEP suspend/resume support

Hi all,

Reviewed-by: Pierre-Yves MORDRET <[email protected]>

Regards

On 1/6/20 2:28 PM, Alain Volmat wrote:
> Backup/restore I2C registers as part of the suspend/resume
> handlers. The device is marked as suspended to ensure that
> transfers are rejected during the suspended period.
>
> Signed-off-by: Pierre-Yves MORDRET <[email protected]>
> Signed-off-by: Alain Volmat <[email protected]>
> ---
> drivers/i2c/busses/i2c-stm32f7.c | 117 +++++++++++++++++++++++++++++++++++++--
> 1 file changed, 113 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/i2c/busses/i2c-stm32f7.c b/drivers/i2c/busses/i2c-stm32f7.c
> index b2634afe066d..5c3e8ac6ad92 100644
> --- a/drivers/i2c/busses/i2c-stm32f7.c
> +++ b/drivers/i2c/busses/i2c-stm32f7.c
> @@ -169,6 +169,24 @@
> #define STM32F7_AUTOSUSPEND_DELAY (HZ / 100)
>
> /**
> + * struct stm32f7_i2c_regs - i2c f7 registers backup
> + * @cr1: Control register 1
> + * @cr2: Control register 2
> + * @oar1: Own address 1 register
> + * @oar2: Own address 2 register
> + * @pecr: PEC register
> + * @tmgr: Timing register
> + */
> +struct stm32f7_i2c_regs {
> + u32 cr1;
> + u32 cr2;
> + u32 oar1;
> + u32 oar2;
> + u32 pecr;
> + u32 tmgr;
> +};
> +
> +/**
> * struct stm32f7_i2c_spec - private i2c specification timing
> * @rate: I2C bus speed (Hz)
> * @rate_min: 80% of I2C bus speed (Hz)
> @@ -276,6 +294,7 @@ struct stm32f7_i2c_msg {
> * @timing: I2C computed timings
> * @slave: list of slave devices registered on the I2C bus
> * @slave_running: slave device currently used
> + * @backup_regs: backup of i2c controller registers (for suspend/resume)
> * @slave_dir: transfer direction for the current slave device
> * @master_mode: boolean to know in which mode the I2C is running (master or
> * slave)
> @@ -298,6 +317,7 @@ struct stm32f7_i2c_dev {
> struct stm32f7_i2c_timings timing;
> struct i2c_client *slave[STM32F7_I2C_MAX_SLAVE];
> struct i2c_client *slave_running;
> + struct stm32f7_i2c_regs backup_regs;
> u32 slave_dir;
> bool master_mode;
> struct stm32_i2c_dma *dma;
> @@ -2027,8 +2047,7 @@ static int stm32f7_i2c_remove(struct platform_device *pdev)
> return 0;
> }
>
> -#ifdef CONFIG_PM
> -static int stm32f7_i2c_runtime_suspend(struct device *dev)
> +static int __maybe_unused stm32f7_i2c_runtime_suspend(struct device *dev)
> {
> struct stm32f7_i2c_dev *i2c_dev = dev_get_drvdata(dev);
>
> @@ -2038,7 +2057,7 @@ static int stm32f7_i2c_runtime_suspend(struct device *dev)
> return 0;
> }
>
> -static int stm32f7_i2c_runtime_resume(struct device *dev)
> +static int __maybe_unused stm32f7_i2c_runtime_resume(struct device *dev)
> {
> struct stm32f7_i2c_dev *i2c_dev = dev_get_drvdata(dev);
> int ret;
> @@ -2053,11 +2072,101 @@ static int stm32f7_i2c_runtime_resume(struct device *dev)
>
> return 0;
> }
> -#endif
> +
> +static int __maybe_unused
> +stm32f7_i2c_regs_backup(struct stm32f7_i2c_dev *i2c_dev)
> +{
> + int ret;
> + struct stm32f7_i2c_regs *backup_regs = &i2c_dev->backup_regs;
> +
> + ret = pm_runtime_get_sync(i2c_dev->dev);
> + if (ret < 0)
> + return ret;
> +
> + backup_regs->cr1 = readl_relaxed(i2c_dev->base + STM32F7_I2C_CR1);
> + backup_regs->cr2 = readl_relaxed(i2c_dev->base + STM32F7_I2C_CR2);
> + backup_regs->oar1 = readl_relaxed(i2c_dev->base + STM32F7_I2C_OAR1);
> + backup_regs->oar2 = readl_relaxed(i2c_dev->base + STM32F7_I2C_OAR2);
> + backup_regs->pecr = readl_relaxed(i2c_dev->base + STM32F7_I2C_PECR);
> + backup_regs->tmgr = readl_relaxed(i2c_dev->base + STM32F7_I2C_TIMINGR);
> +
> + pm_runtime_put_sync(i2c_dev->dev);
> +
> + return ret;
> +}
> +
> +static int __maybe_unused
> +stm32f7_i2c_regs_restore(struct stm32f7_i2c_dev *i2c_dev)
> +{
> + u32 cr1;
> + int ret;
> + struct stm32f7_i2c_regs *backup_regs = &i2c_dev->backup_regs;
> +
> + ret = pm_runtime_get_sync(i2c_dev->dev);
> + if (ret < 0)
> + return ret;
> +
> + cr1 = readl_relaxed(i2c_dev->base + STM32F7_I2C_CR1);
> + if (cr1 & STM32F7_I2C_CR1_PE)
> + stm32f7_i2c_clr_bits(i2c_dev->base + STM32F7_I2C_CR1,
> + STM32F7_I2C_CR1_PE);
> +
> + writel_relaxed(backup_regs->tmgr, i2c_dev->base + STM32F7_I2C_TIMINGR);
> + writel_relaxed(backup_regs->cr1 & ~STM32F7_I2C_CR1_PE,
> + i2c_dev->base + STM32F7_I2C_CR1);
> + if (backup_regs->cr1 & STM32F7_I2C_CR1_PE)
> + stm32f7_i2c_set_bits(i2c_dev->base + STM32F7_I2C_CR1,
> + STM32F7_I2C_CR1_PE);
> + writel_relaxed(backup_regs->cr2, i2c_dev->base + STM32F7_I2C_CR2);
> + writel_relaxed(backup_regs->oar1, i2c_dev->base + STM32F7_I2C_OAR1);
> + writel_relaxed(backup_regs->oar2, i2c_dev->base + STM32F7_I2C_OAR2);
> + writel_relaxed(backup_regs->pecr, i2c_dev->base + STM32F7_I2C_PECR);
> +
> + pm_runtime_put_sync(i2c_dev->dev);
> +
> + return ret;
> +}
> +
> +static int __maybe_unused stm32f7_i2c_suspend(struct device *dev)
> +{
> + struct stm32f7_i2c_dev *i2c_dev = dev_get_drvdata(dev);
> + int ret;
> +
> + i2c_mark_adapter_suspended(&i2c_dev->adap);
> + ret = stm32f7_i2c_regs_backup(i2c_dev);
> + if (ret < 0) {
> + i2c_mark_adapter_resumed(&i2c_dev->adap);
> + return ret;
> + }
> +
> + pinctrl_pm_select_sleep_state(dev);
> + pm_runtime_force_suspend(dev);
> +
> + return 0;
> +}
> +
> +static int __maybe_unused stm32f7_i2c_resume(struct device *dev)
> +{
> + struct stm32f7_i2c_dev *i2c_dev = dev_get_drvdata(dev);
> + int ret;
> +
> + ret = pm_runtime_force_resume(dev);
> + if (ret < 0)
> + return ret;
> + pinctrl_pm_select_default_state(dev);
> +
> + ret = stm32f7_i2c_regs_restore(i2c_dev);
> + if (ret < 0)
> + return ret;
> + i2c_mark_adapter_resumed(&i2c_dev->adap);
> +
> + return 0;
> +}
>
> static const struct dev_pm_ops stm32f7_i2c_pm_ops = {
> SET_RUNTIME_PM_OPS(stm32f7_i2c_runtime_suspend,
> stm32f7_i2c_runtime_resume, NULL)
> + SET_SYSTEM_SLEEP_PM_OPS(stm32f7_i2c_suspend, stm32f7_i2c_resume)
> };
>
> static const struct of_device_id stm32f7_i2c_match[] = {
>

2020-01-15 09:15:21

by Pierre-Yves MORDRET

[permalink] [raw]
Subject: Re: [PATCH 5/6] i2c: i2c-stm32f7: allow controller to be wakeup-source

Hi all

Reviewed-by: Pierre-Yves MORDRET <[email protected]>

Thanks and regards

On 1/6/20 2:28 PM, Alain Volmat wrote:
> Allow the i2c-stm32f7 controller to become a wakeup-source
> of the system. In such case, when a slave is registered to the
> I2C controller, receiving a I2C message targeting that registered
> slave address wakes up the suspended system.
>
> In order to be able to wake-up, the I2C controller DT node
> must have the property wakeup-source defined and a slave
> must be registered.
>
> Signed-off-by: Alain Volmat <[email protected]>
> ---
> drivers/i2c/busses/i2c-stm32f7.c | 98 ++++++++++++++++++++++++++++++++++------
> 1 file changed, 83 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/i2c/busses/i2c-stm32f7.c b/drivers/i2c/busses/i2c-stm32f7.c
> index 5c3e8ac6ad92..844a22d64aa8 100644
> --- a/drivers/i2c/busses/i2c-stm32f7.c
> +++ b/drivers/i2c/busses/i2c-stm32f7.c
> @@ -29,6 +29,7 @@
> #include <linux/platform_device.h>
> #include <linux/pinctrl/consumer.h>
> #include <linux/pm_runtime.h>
> +#include <linux/pm_wakeirq.h>
> #include <linux/regmap.h>
> #include <linux/reset.h>
> #include <linux/slab.h>
> @@ -49,6 +50,7 @@
>
> /* STM32F7 I2C control 1 */
> #define STM32F7_I2C_CR1_PECEN BIT(23)
> +#define STM32F7_I2C_CR1_WUPEN BIT(18)
> #define STM32F7_I2C_CR1_SBC BIT(16)
> #define STM32F7_I2C_CR1_RXDMAEN BIT(15)
> #define STM32F7_I2C_CR1_TXDMAEN BIT(14)
> @@ -301,6 +303,7 @@ struct stm32f7_i2c_msg {
> * @dma: dma data
> * @use_dma: boolean to know if dma is used in the current transfer
> * @regmap: holds SYSCFG phandle for Fast Mode Plus bits
> + * @wakeup_src: boolean to know if the device is a wakeup source
> */
> struct stm32f7_i2c_dev {
> struct i2c_adapter adap;
> @@ -323,6 +326,7 @@ struct stm32f7_i2c_dev {
> struct stm32_i2c_dma *dma;
> bool use_dma;
> struct regmap *regmap;
> + bool wakeup_src;
> };
>
> /*
> @@ -1691,6 +1695,9 @@ static int stm32f7_i2c_smbus_xfer(struct i2c_adapter *adapter, u16 addr,
> return ret;
> }
>
> +static void stm32f7_i2c_enable_wakeup(struct stm32f7_i2c_dev *i2c_dev,
> + bool enable);
> +
> static int stm32f7_i2c_reg_slave(struct i2c_client *slave)
> {
> struct stm32f7_i2c_dev *i2c_dev = i2c_get_adapdata(slave->adapter);
> @@ -1717,6 +1724,9 @@ static int stm32f7_i2c_reg_slave(struct i2c_client *slave)
> if (ret < 0)
> return ret;
>
> + if (!stm32f7_i2c_is_slave_registered(i2c_dev))
> + stm32f7_i2c_enable_wakeup(i2c_dev, true);
> +
> if (id == 0) {
> /* Configure Own Address 1 */
> oar1 = readl_relaxed(i2c_dev->base + STM32F7_I2C_OAR1);
> @@ -1758,6 +1768,9 @@ static int stm32f7_i2c_reg_slave(struct i2c_client *slave)
>
> ret = 0;
> pm_free:
> + if (!stm32f7_i2c_is_slave_registered(i2c_dev))
> + stm32f7_i2c_enable_wakeup(i2c_dev, false);
> +
> pm_runtime_mark_last_busy(dev);
> pm_runtime_put_autosuspend(dev);
>
> @@ -1791,8 +1804,10 @@ static int stm32f7_i2c_unreg_slave(struct i2c_client *slave)
>
> i2c_dev->slave[id] = NULL;
>
> - if (!(stm32f7_i2c_is_slave_registered(i2c_dev)))
> + if (!stm32f7_i2c_is_slave_registered(i2c_dev)) {
> stm32f7_i2c_disable_irq(i2c_dev, STM32F7_I2C_ALL_IRQ_MASK);
> + stm32f7_i2c_enable_wakeup(i2c_dev, false);
> + }
>
> pm_runtime_mark_last_busy(i2c_dev->dev);
> pm_runtime_put_autosuspend(i2c_dev->dev);
> @@ -1879,6 +1894,9 @@ static int stm32f7_i2c_probe(struct platform_device *pdev)
> return irq_error ? : -ENOENT;
> }
>
> + i2c_dev->wakeup_src = of_property_read_bool(pdev->dev.of_node,
> + "wakeup-source");
> +
> i2c_dev->clk = devm_clk_get(&pdev->dev, NULL);
> if (IS_ERR(i2c_dev->clk)) {
> dev_err(&pdev->dev, "Error: Missing controller clock\n");
> @@ -1985,6 +2003,16 @@ static int stm32f7_i2c_probe(struct platform_device *pdev)
> goto clk_free;
> }
>
> + if (i2c_dev->wakeup_src) {
> + device_set_wakeup_capable(i2c_dev->dev, true);
> +
> + ret = dev_pm_set_wake_irq(i2c_dev->dev, irq_event);
> + if (ret) {
> + dev_err(i2c_dev->dev, "Failed to set wake up irq\n");
> + goto clr_wakeup_capable;
> + }
> + }
> +
> platform_set_drvdata(pdev, i2c_dev);
>
> pm_runtime_set_autosuspend_delay(i2c_dev->dev,
> @@ -2014,6 +2042,13 @@ static int stm32f7_i2c_probe(struct platform_device *pdev)
> pm_runtime_set_suspended(i2c_dev->dev);
> pm_runtime_dont_use_autosuspend(i2c_dev->dev);
>
> + if (i2c_dev->wakeup_src)
> + dev_pm_clear_wake_irq(i2c_dev->dev);
> +
> +clr_wakeup_capable:
> + if (i2c_dev->wakeup_src)
> + device_set_wakeup_capable(i2c_dev->dev, false);
> +
> if (i2c_dev->dma) {
> stm32_i2c_dma_free(i2c_dev->dma);
> i2c_dev->dma = NULL;
> @@ -2032,6 +2067,15 @@ static int stm32f7_i2c_remove(struct platform_device *pdev)
> i2c_del_adapter(&i2c_dev->adap);
> pm_runtime_get_sync(i2c_dev->dev);
>
> + if (i2c_dev->wakeup_src) {
> + dev_pm_clear_wake_irq(i2c_dev->dev);
> + /*
> + * enforce that wakeup is disabled and that the device
> + * is marked as non wakeup capable
> + */
> + device_init_wakeup(i2c_dev->dev, false);
> + }
> +
> pm_runtime_put_noidle(i2c_dev->dev);
> pm_runtime_disable(i2c_dev->dev);
> pm_runtime_set_suspended(i2c_dev->dev);
> @@ -2127,20 +2171,41 @@ stm32f7_i2c_regs_restore(struct stm32f7_i2c_dev *i2c_dev)
> return ret;
> }
>
> +static void stm32f7_i2c_enable_wakeup(struct stm32f7_i2c_dev *i2c_dev,
> + bool enable)
> +{
> + void __iomem *base = i2c_dev->base;
> + u32 mask = STM32F7_I2C_CR1_WUPEN;
> +
> + if (!i2c_dev->wakeup_src)
> + return;
> +
> + if (enable) {
> + device_set_wakeup_enable(i2c_dev->dev, true);
> + stm32f7_i2c_set_bits(base + STM32F7_I2C_CR1, mask);
> + } else {
> + device_set_wakeup_enable(i2c_dev->dev, false);
> + stm32f7_i2c_clr_bits(base + STM32F7_I2C_CR1, mask);
> + }
> +}
> +
> static int __maybe_unused stm32f7_i2c_suspend(struct device *dev)
> {
> struct stm32f7_i2c_dev *i2c_dev = dev_get_drvdata(dev);
> int ret;
>
> i2c_mark_adapter_suspended(&i2c_dev->adap);
> - ret = stm32f7_i2c_regs_backup(i2c_dev);
> - if (ret < 0) {
> - i2c_mark_adapter_resumed(&i2c_dev->adap);
> - return ret;
> - }
>
> - pinctrl_pm_select_sleep_state(dev);
> - pm_runtime_force_suspend(dev);
> + if (!device_may_wakeup(dev) && !dev->power.wakeup_path) {
> + ret = stm32f7_i2c_regs_backup(i2c_dev);
> + if (ret < 0) {
> + i2c_mark_adapter_resumed(&i2c_dev->adap);
> + return ret;
> + }
> +
> + pinctrl_pm_select_sleep_state(dev);
> + pm_runtime_force_suspend(dev);
> + }
>
> return 0;
> }
> @@ -2150,14 +2215,17 @@ static int __maybe_unused stm32f7_i2c_resume(struct device *dev)
> struct stm32f7_i2c_dev *i2c_dev = dev_get_drvdata(dev);
> int ret;
>
> - ret = pm_runtime_force_resume(dev);
> - if (ret < 0)
> - return ret;
> - pinctrl_pm_select_default_state(dev);
> + if (!device_may_wakeup(dev) && !dev->power.wakeup_path) {
> + ret = pm_runtime_force_resume(dev);
> + if (ret < 0)
> + return ret;
> + pinctrl_pm_select_default_state(dev);
> +
> + ret = stm32f7_i2c_regs_restore(i2c_dev);
> + if (ret < 0)
> + return ret;
> + }
>
> - ret = stm32f7_i2c_regs_restore(i2c_dev);
> - if (ret < 0)
> - return ret;
> i2c_mark_adapter_resumed(&i2c_dev->adap);
>
> return 0;
>

2020-01-30 08:40:16

by Wolfram Sang

[permalink] [raw]
Subject: Re: [PATCH 4/6] i2c: i2c-stm32f7: add PM_SLEEP suspend/resume support

On Mon, Jan 06, 2020 at 02:28:32PM +0100, Alain Volmat wrote:
> Backup/restore I2C registers as part of the suspend/resume
> handlers. The device is marked as suspended to ensure that
> transfers are rejected during the suspended period.
>
> Signed-off-by: Pierre-Yves MORDRET <[email protected]>
> Signed-off-by: Alain Volmat <[email protected]>

Applied to for-next, thanks!


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2020-01-30 08:42:07

by Wolfram Sang

[permalink] [raw]
Subject: Re: [PATCH 5/6] i2c: i2c-stm32f7: allow controller to be wakeup-source

On Mon, Jan 06, 2020 at 02:28:33PM +0100, Alain Volmat wrote:
> Allow the i2c-stm32f7 controller to become a wakeup-source
> of the system. In such case, when a slave is registered to the
> I2C controller, receiving a I2C message targeting that registered
> slave address wakes up the suspended system.
>
> In order to be able to wake-up, the I2C controller DT node
> must have the property wakeup-source defined and a slave
> must be registered.
>
> Signed-off-by: Alain Volmat <[email protected]>

Applied to for-next, thanks!

> +static void stm32f7_i2c_enable_wakeup(struct stm32f7_i2c_dev *i2c_dev,
> + bool enable)
> +{
> + void __iomem *base = i2c_dev->base;
> + u32 mask = STM32F7_I2C_CR1_WUPEN;

...

I wondered why we can't move this more up to avoid the forward
declaration?


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2020-01-31 06:58:03

by Wolfram Sang

[permalink] [raw]
Subject: Re: [PATCH 5/6] i2c: i2c-stm32f7: allow controller to be wakeup-source

On Thu, Jan 30, 2020 at 09:39:27AM +0100, Wolfram Sang wrote:
> On Mon, Jan 06, 2020 at 02:28:33PM +0100, Alain Volmat wrote:
> > Allow the i2c-stm32f7 controller to become a wakeup-source
> > of the system. In such case, when a slave is registered to the
> > I2C controller, receiving a I2C message targeting that registered
> > slave address wakes up the suspended system.
> >
> > In order to be able to wake-up, the I2C controller DT node
> > must have the property wakeup-source defined and a slave
> > must be registered.
> >
> > Signed-off-by: Alain Volmat <[email protected]>
>
> Applied to for-next, thanks!

And I will drop it again because buildbot rightfully complains:


> Reported-by: kbuild test robot <[email protected]>
>
> All errors (new ones prefixed by >>):
>
> drivers/i2c/busses/i2c-stm32f7.c: In function 'stm32f7_i2c_suspend':
> >> drivers/i2c/busses/i2c-stm32f7.c:2199:44: error: 'struct dev_pm_info' has no member named 'wakeup_path'
> if (!device_may_wakeup(dev) && !dev->power.wakeup_path) {
> ^
> drivers/i2c/busses/i2c-stm32f7.c: In function 'stm32f7_i2c_resume':
> drivers/i2c/busses/i2c-stm32f7.c:2218:44: error: 'struct dev_pm_info' has no member named 'wakeup_path'
> if (!device_may_wakeup(dev) && !dev->power.wakeup_path) {
> ^

wakeup_path is only there if CONFIG_PM. Please fix and send a new
version.


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2020-03-13 12:50:15

by Alexandre Torgue

[permalink] [raw]
Subject: Re: [PATCH 0/6] i2c-stm32f7: support suspend/resume & wakeup

Hi Alain

On 1/6/20 2:28 PM, Alain Volmat wrote:
> This serie replaces the previously sent serie "stm32: i2c: Add suspend/resume & add sleep pinctrls".
>
> This serie adds support for pm sleep suspend / resume and allow I2C slave to be
> a wakeup-source for the system.
>
> Alain Volmat (6):
> ARM: dts: stm32: add i2c4 sleep pinctrl on stm32mp15xx-dkx
> ARM: dts: stm32: add i2c2/i2c5 sleep pinctrl on stm32mp157c-ev1
> ARM: dts: stm32: add i2c4 sleep pinctrl on stm32mp157c-ed1
> i2c: i2c-stm32f7: add PM_SLEEP suspend/resume support
> i2c: i2c-stm32f7: allow controller to be wakeup-source
> ARM: dts: stm32: add wakeup-source in all I2C nodes of stm32mp157c
>
> arch/arm/boot/dts/stm32mp151.dtsi | 6 ++
> arch/arm/boot/dts/stm32mp157c-ed1.dts | 3 +-
> arch/arm/boot/dts/stm32mp157c-ev1.dts | 6 +-
> arch/arm/boot/dts/stm32mp15xx-dkx.dtsi | 3 +-
> drivers/i2c/busses/i2c-stm32f7.c | 187 ++++++++++++++++++++++++++++++++-
> 5 files changed, 196 insertions(+), 9 deletions(-)
>

DT patches applied on stm32-next.

Regards
Alex