2017-12-01 06:40:25

by Luwei Kang

Subject: RE: [PATCH v3 7/9] KVM: x86: Implement Intel Processor Trace MSRs read/write

> > + case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B: {
> > + u32 eax, ebx, ecx, edx;
> > +
> > + cpuid_count(0x14, 1, &eax, &ebx, &ecx, &edx);
>
> Please cache the cpuid_count result, or do the cpuid_count after testing
> vmx_pt_supported() (which you can use instead of going through kvm_x86_ops).

Hi Paolo,
Thanks for your reply. I have cache EAX in "struct pt_desc" and will initialize in vmx_vcpu_setup().
+struct pt_desc {
+ unsigned int addr_num;
+ struct pt_ctx host;
+ struct pt_ctx guest;
+};
But kvm_init_msr_list() is invoked too early, I have to read from hardware. So, what about change like this.

- cpuid_count(0x14, 1, &eax, &ebx, &ecx, &edx);
- if (!kvm_x86_ops->pt_supported() || msrs_to_save[i] -
- MSR_IA32_RTIT_ADDR0_A >= (eax & 0x7))
+ if (!kvm_x86_ops->pt_supported())
continue;
+ cpuid_count(0x14, 1, &eax, &ebx, &ecx, &edx);
+ if (msrs_to_save[i] -
+ MSR_IA32_RTIT_ADDR0_A >= (eax & 0x7))
+ continue;

Thanks,
Luwei Kang

>
> Thanks,
>
> Paolo
>
> > + if (!kvm_x86_ops->pt_supported() || msrs_to_save[i] -
> > + MSR_IA32_RTIT_ADDR0_A >= (eax & 0x7))
> > + continue;
> > + break;

2017-12-01 08:33:46

by Paolo Bonzini

Subject: Re: [PATCH v3 7/9] KVM: x86: Implement Intel Processor Trace MSRs read/write

On 01/12/2017 07:40, Kang, Luwei wrote:
>>> + case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B: {
>>> + u32 eax, ebx, ecx, edx;
>>> +
>>> + cpuid_count(0x14, 1, &eax, &ebx, &ecx, &edx);
>>
>> Please cache the cpuid_count result, or do the cpuid_count after testing
>> vmx_pt_supported() (which you can use instead of going through kvm_x86_ops).
>
> Hi Paolo,
> Thanks for your reply. I have cache EAX in "struct pt_desc" and will initialize in vmx_vcpu_setup().
> +struct pt_desc {
> + unsigned int addr_num;
> + struct pt_ctx host;
> + struct pt_ctx guest;
> +};
> But kvm_init_msr_list() is invoked too early, I have to read from hardware. So, what about change like this.
>
> - cpuid_count(0x14, 1, &eax, &ebx, &ecx, &edx);
> - if (!kvm_x86_ops->pt_supported() || msrs_to_save[i] -
> - MSR_IA32_RTIT_ADDR0_A >= (eax & 0x7))
> + if (!kvm_x86_ops->pt_supported())
> continue;
> + cpuid_count(0x14, 1, &eax, &ebx, &ecx, &edx);
> + if (msrs_to_save[i] -
> + MSR_IA32_RTIT_ADDR0_A >= (eax & 0x7))
> + continue;

For kvm_init_msr_list it's okay. But can you please add a
pt_msr_count() function?

Thanks,

Paolo

> Thanks,
> Luwei Kang
>
>>
>> Thanks,
>>
>> Paolo
>>
>>> + if (!kvm_x86_ops->pt_supported() || msrs_to_save[i] -
>>> + MSR_IA32_RTIT_ADDR0_A >= (eax & 0x7))
>>> + continue;
>>> + break;
>

2017-12-04 01:21:26

by Luwei Kang

Subject: RE: [PATCH v3 7/9] KVM: x86: Implement Intel Processor Trace MSRs read/write

> >>> + case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B: {
> >>> + u32 eax, ebx, ecx, edx;
> >>> +
> >>> + cpuid_count(0x14, 1, &eax, &ebx, &ecx, &edx);
> >>
> >> Please cache the cpuid_count result, or do the cpuid_count after testing
> >> vmx_pt_supported() (which you can use instead of going through kvm_x86_ops).
> >
> > Hi Paolo,
> > Thanks for your reply. I have cache EAX in "struct pt_desc" and will initialize in vmx_vcpu_setup().
> > +struct pt_desc {
> > + unsigned int addr_num;
> > + struct pt_ctx host;
> > + struct pt_ctx guest;
> > +};
> > But kvm_init_msr_list() is invoked too early, I have to read from hardware. So, what about change like this.
> >
> > - cpuid_count(0x14, 1, &eax, &ebx, &ecx, &edx);
> > - if (!kvm_x86_ops->pt_supported() || msrs_to_save[i] -
> > - MSR_IA32_RTIT_ADDR0_A >= (eax & 0x7))
> > + if (!kvm_x86_ops->pt_supported())
> > continue;
> > + cpuid_count(0x14, 1, &eax, &ebx, &ecx, &edx);
> > + if (msrs_to_save[i] -
> > + MSR_IA32_RTIT_ADDR0_A >= (eax & 0x7))
> > + continue;
>
> For kvm_init_msr_list it's okay. But can you please add a
> pt_msr_count() function?
>

Of course, I will fix in next version. Thanks!

Luwei Kang

> >>
> >>> + if (!kvm_x86_ops->pt_supported() || msrs_to_save[i] -
> >>> + MSR_IA32_RTIT_ADDR0_A >= (eax & 0x7))
> >>> + continue;
> >>> + break;
> >