From: Dinh Nguyen <[email protected]>
Implement code for MX51 that allows the SoC to enter WFI when
arch_idle is called.
This patch is also necessary for correctly suspending the system.
Signed-off-by: Dinh Nguyen <[email protected]>
---
arch/arm/mach-mx5/Makefile | 2 +-
arch/arm/mach-mx5/system.c | 84 +++++++++++++++++++++++++++++++
arch/arm/plat-mxc/include/mach/mxc.h | 9 +++
arch/arm/plat-mxc/include/mach/system.h | 6 ++-
4 files changed, 99 insertions(+), 2 deletions(-)
create mode 100644 arch/arm/mach-mx5/system.c
diff --git a/arch/arm/mach-mx5/Makefile b/arch/arm/mach-mx5/Makefile
index 0d43be9..1106acd 100644
--- a/arch/arm/mach-mx5/Makefile
+++ b/arch/arm/mach-mx5/Makefile
@@ -3,7 +3,7 @@
#
# Object file lists.
-obj-y := cpu.o mm.o clock-mx51-mx53.o devices.o
+obj-y := cpu.o mm.o clock-mx51-mx53.o devices.o system.o
obj-$(CONFIG_SOC_IMX50) += mm-mx50.o
obj-$(CONFIG_CPU_FREQ_IMX) += cpu_op-mx51.o
diff --git a/arch/arm/mach-mx5/system.c b/arch/arm/mach-mx5/system.c
new file mode 100644
index 0000000..06d306b
--- /dev/null
+++ b/arch/arm/mach-mx5/system.c
@@ -0,0 +1,84 @@
+/*
+ * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
+ */
+
+/*
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+#include <linux/platform_device.h>
+#include <asm/io.h>
+#include <mach/hardware.h>
+#include "crm_regs.h"
+
+/* set cpu low power mode before WFI instruction. This function is called mx5 because
+ it can be used for mx50, mx51, and mx53.*/
+void mx5_cpu_lp_set(enum mxc_cpu_pwr_mode mode)
+{
+ u32 plat_lpc, arm_srpgcr, ccm_clpcr;
+ u32 empgc0, empgc1;
+ int stop_mode = 0;
+
+ /* always allow platform to issue a deep sleep mode request */
+ plat_lpc = __raw_readl(MXC_CORTEXA8_PLAT_LPC) &
+ ~(MXC_CORTEXA8_PLAT_LPC_DSM);
+ ccm_clpcr = __raw_readl(MXC_CCM_CLPCR) & ~(MXC_CCM_CLPCR_LPM_MASK);
+ arm_srpgcr = __raw_readl(MXC_SRPG_ARM_SRPGCR) & ~(MXC_SRPGCR_PCR);
+ empgc0 = __raw_readl(MXC_SRPG_EMPGC0_SRPGCR) & ~(MXC_SRPGCR_PCR);
+ empgc1 = __raw_readl(MXC_SRPG_EMPGC1_SRPGCR) & ~(MXC_SRPGCR_PCR);
+
+ switch (mode) {
+ case WAIT_CLOCKED:
+ break;
+ case WAIT_UNCLOCKED:
+ ccm_clpcr |= 0x1 << MXC_CCM_CLPCR_LPM_OFFSET;
+ break;
+ case WAIT_UNCLOCKED_POWER_OFF:
+ case STOP_POWER_OFF:
+ plat_lpc |= MXC_CORTEXA8_PLAT_LPC_DSM
+ | MXC_CORTEXA8_PLAT_LPC_DBG_DSM;
+ if (mode == WAIT_UNCLOCKED_POWER_OFF) {
+ ccm_clpcr |= 0x1 << MXC_CCM_CLPCR_LPM_OFFSET;
+ ccm_clpcr &= ~MXC_CCM_CLPCR_VSTBY;
+ ccm_clpcr &= ~MXC_CCM_CLPCR_SBYOS;
+ stop_mode = 0;
+ } else {
+ ccm_clpcr |= 0x2 << MXC_CCM_CLPCR_LPM_OFFSET;
+ ccm_clpcr |= 0x3 << MXC_CCM_CLPCR_STBY_COUNT_OFFSET;
+ ccm_clpcr |= MXC_CCM_CLPCR_VSTBY;
+ ccm_clpcr |= MXC_CCM_CLPCR_SBYOS;
+ stop_mode = 1;
+ }
+
+ arm_srpgcr |= MXC_SRPGCR_PCR;
+ if (stop_mode) {
+ empgc0 |= MXC_SRPGCR_PCR;
+ empgc1 |= MXC_SRPGCR_PCR;
+ }
+
+ if (tzic_enable_wake(1) != 0)
+ return;
+ break;
+ case STOP_POWER_ON:
+ ccm_clpcr |= 0x2 << MXC_CCM_CLPCR_LPM_OFFSET;
+ break;
+ default:
+ printk(KERN_WARNING "UNKNOWN cpu power mode: %d\n", mode);
+ return;
+ }
+
+ __raw_writel(plat_lpc, MXC_CORTEXA8_PLAT_LPC);
+ __raw_writel(ccm_clpcr, MXC_CCM_CLPCR);
+ __raw_writel(arm_srpgcr, MXC_SRPG_ARM_SRPGCR);
+ /* Enable NEON SRPG for all but MX50TO1.0. */
+ __raw_writel(arm_srpgcr, MXC_SRPG_NEON_SRPGCR);
+ if (stop_mode) {
+ __raw_writel(empgc0, MXC_SRPG_EMPGC0_SRPGCR);
+ __raw_writel(empgc1, MXC_SRPG_EMPGC1_SRPGCR);
+ }
+}
+
diff --git a/arch/arm/plat-mxc/include/mach/mxc.h b/arch/arm/plat-mxc/include/mach/mxc.h
index 04c7a26..8a8970d 100644
--- a/arch/arm/plat-mxc/include/mach/mxc.h
+++ b/arch/arm/plat-mxc/include/mach/mxc.h
@@ -181,6 +181,15 @@ struct cpu_op {
u32 cpu_rate;
};
+int tzic_enable_wake(int is_idle);
+enum mxc_cpu_pwr_mode {
+ WAIT_CLOCKED, /* wfi only */
+ WAIT_UNCLOCKED, /* WAIT */
+ WAIT_UNCLOCKED_POWER_OFF, /* WAIT + SRPG */
+ STOP_POWER_ON, /* just STOP */
+ STOP_POWER_OFF, /* STOP + SRPG */
+};
+
extern struct cpu_op *(*get_cpu_op)(int *op);
#endif
diff --git a/arch/arm/plat-mxc/include/mach/system.h b/arch/arm/plat-mxc/include/mach/system.h
index 95be51b..35283a4 100644
--- a/arch/arm/plat-mxc/include/mach/system.h
+++ b/arch/arm/plat-mxc/include/mach/system.h
@@ -20,6 +20,8 @@
#include <mach/hardware.h>
#include <mach/common.h>
+extern void mx5_cpu_lp_set(enum mxc_cpu_pwr_mode mode);
+
static inline void arch_idle(void)
{
#ifdef CONFIG_ARCH_MXC91231
@@ -54,7 +56,9 @@ static inline void arch_idle(void)
"orr %0, %0, #0x00000004\n"
"mcr p15, 0, %0, c1, c0, 0\n"
: "=r" (reg));
- } else
+ } else if (cpu_is_mx51())
+ mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF);
+ else
cpu_do_idle();
}
--
1.6.0.4
From: Dinh Nguyen <[email protected]>
Adds initial low power suspend functionality to MX51.
Supports "mem" and "standby" modes.
Tested on mx51-babbage.
Signed-off-by: Dinh Nguyen <[email protected]>
---
arch/arm/mach-mx5/Makefile | 1 +
arch/arm/mach-mx5/pm-imx51.c | 62 ++++++++++++++++++++++++++++++++++++++++++
2 files changed, 63 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/mach-mx5/pm-imx51.c
diff --git a/arch/arm/mach-mx5/Makefile b/arch/arm/mach-mx5/Makefile
index 1106acd..2f6258e 100644
--- a/arch/arm/mach-mx5/Makefile
+++ b/arch/arm/mach-mx5/Makefile
@@ -6,6 +6,7 @@
obj-y := cpu.o mm.o clock-mx51-mx53.o devices.o system.o
obj-$(CONFIG_SOC_IMX50) += mm-mx50.o
+obj-$(CONFIG_PM) += pm-imx51.o
obj-$(CONFIG_CPU_FREQ_IMX) += cpu_op-mx51.o
obj-$(CONFIG_MACH_MX51_BABBAGE) += board-mx51_babbage.o
obj-$(CONFIG_MACH_MX51_3DS) += board-mx51_3ds.o
diff --git a/arch/arm/mach-mx5/pm-imx51.c b/arch/arm/mach-mx5/pm-imx51.c
new file mode 100644
index 0000000..6bb76e2
--- /dev/null
+++ b/arch/arm/mach-mx5/pm-imx51.c
@@ -0,0 +1,62 @@
+/*
+ * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+#include <linux/suspend.h>
+#include <asm/mach/map.h>
+#include <asm/cacheflush.h>
+#include <asm/tlb.h>
+#include <mach/system.h>
+#include "crm_regs.h"
+
+static int mx5_suspend_enter(suspend_state_t state)
+{
+ switch (state) {
+ case PM_SUSPEND_MEM:
+ mx5_cpu_lp_set(STOP_POWER_OFF);
+ break;
+ case PM_SUSPEND_STANDBY:
+ mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF);
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ if (state == PM_SUSPEND_MEM) {
+ local_flush_tlb_all();
+ flush_cache_all();
+
+ /*clear the EMPGC0/1 bits */
+ __raw_writel(0, MXC_SRPG_EMPGC0_SRPGCR);
+ __raw_writel(0, MXC_SRPG_EMPGC1_SRPGCR);
+ }
+
+ cpu_do_idle();
+
+ return 0;
+}
+
+static int mx5_pm_valid(suspend_state_t state)
+{
+ return (state > PM_SUSPEND_ON && state <= PM_SUSPEND_MAX);
+}
+
+static const struct platform_suspend_ops mx5_suspend_ops = {
+ .valid = mx5_pm_valid,
+ .enter = mx5_suspend_enter,
+};
+
+static int __init mx5_pm_init(void)
+{
+ if (cpu_is_mx51())
+ suspend_set_ops(&mx5_suspend_ops);
+
+ return 0;
+}
+device_initcall(mx5_pm_init);
--
1.6.0.4
Hi Arnaud,
I just sent out a 2nd set of the MX51 LPM patch. I have tested successfully on my mx51 babbage without any code modifications.
If you would kindly verify on your side, that would great.
You need both patches:
[PATCHv2 1/2] ARM: mx51: Implement code to allow mx51 to enter WFI
[PATCHv2 2/2] ARM: mx51: Add support for low power suspend on MX51
Thanks,
Dinh
>-----Original Message-----
>From: Nguyen Dinh-R00091
>Sent: Friday, March 04, 2011 5:30 PM
>To: [email protected]
>Cc: [email protected]; [email protected]; [email protected]; u.kleine-
>[email protected]; Zhang Lily-R58066; Vaidyanathan Ranjani-RA5478; Nguyen Dinh-R00091
>Subject: [PATCHv2 1/2] ARM: mx51: Implement code to allow mx51 to enter WFI
>
>From: Dinh Nguyen <[email protected]>
>
>Implement code for MX51 that allows the SoC to enter WFI when
>arch_idle is called.
>
>This patch is also necessary for correctly suspending the system.
>
>Signed-off-by: Dinh Nguyen <[email protected]>
>---
> arch/arm/mach-mx5/Makefile | 2 +-
> arch/arm/mach-mx5/system.c | 84 +++++++++++++++++++++++++++++++
> arch/arm/plat-mxc/include/mach/mxc.h | 9 +++
> arch/arm/plat-mxc/include/mach/system.h | 6 ++-
> 4 files changed, 99 insertions(+), 2 deletions(-)
> create mode 100644 arch/arm/mach-mx5/system.c
>
>diff --git a/arch/arm/mach-mx5/Makefile b/arch/arm/mach-mx5/Makefile
>index 0d43be9..1106acd 100644
>--- a/arch/arm/mach-mx5/Makefile
>+++ b/arch/arm/mach-mx5/Makefile
>@@ -3,7 +3,7 @@
> #
>
> # Object file lists.
>-obj-y := cpu.o mm.o clock-mx51-mx53.o devices.o
>+obj-y := cpu.o mm.o clock-mx51-mx53.o devices.o system.o
> obj-$(CONFIG_SOC_IMX50) += mm-mx50.o
>
> obj-$(CONFIG_CPU_FREQ_IMX) += cpu_op-mx51.o
>diff --git a/arch/arm/mach-mx5/system.c b/arch/arm/mach-mx5/system.c
>new file mode 100644
>index 0000000..06d306b
>--- /dev/null
>+++ b/arch/arm/mach-mx5/system.c
>@@ -0,0 +1,84 @@
>+/*
>+ * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
>+ */
>+
>+/*
>+ * The code contained herein is licensed under the GNU General Public
>+ * License. You may obtain a copy of the GNU General Public License
>+ * Version 2 or later at the following locations:
>+ *
>+ * http://www.opensource.org/licenses/gpl-license.html
>+ * http://www.gnu.org/copyleft/gpl.html
>+ */
>+#include <linux/platform_device.h>
>+#include <asm/io.h>
>+#include <mach/hardware.h>
>+#include "crm_regs.h"
>+
>+/* set cpu low power mode before WFI instruction. This function is called mx5 because
>+ it can be used for mx50, mx51, and mx53.*/
>+void mx5_cpu_lp_set(enum mxc_cpu_pwr_mode mode)
>+{
>+ u32 plat_lpc, arm_srpgcr, ccm_clpcr;
>+ u32 empgc0, empgc1;
>+ int stop_mode = 0;
>+
>+ /* always allow platform to issue a deep sleep mode request */
>+ plat_lpc = __raw_readl(MXC_CORTEXA8_PLAT_LPC) &
>+ ~(MXC_CORTEXA8_PLAT_LPC_DSM);
>+ ccm_clpcr = __raw_readl(MXC_CCM_CLPCR) & ~(MXC_CCM_CLPCR_LPM_MASK);
>+ arm_srpgcr = __raw_readl(MXC_SRPG_ARM_SRPGCR) & ~(MXC_SRPGCR_PCR);
>+ empgc0 = __raw_readl(MXC_SRPG_EMPGC0_SRPGCR) & ~(MXC_SRPGCR_PCR);
>+ empgc1 = __raw_readl(MXC_SRPG_EMPGC1_SRPGCR) & ~(MXC_SRPGCR_PCR);
>+
>+ switch (mode) {
>+ case WAIT_CLOCKED:
>+ break;
>+ case WAIT_UNCLOCKED:
>+ ccm_clpcr |= 0x1 << MXC_CCM_CLPCR_LPM_OFFSET;
>+ break;
>+ case WAIT_UNCLOCKED_POWER_OFF:
>+ case STOP_POWER_OFF:
>+ plat_lpc |= MXC_CORTEXA8_PLAT_LPC_DSM
>+ | MXC_CORTEXA8_PLAT_LPC_DBG_DSM;
>+ if (mode == WAIT_UNCLOCKED_POWER_OFF) {
>+ ccm_clpcr |= 0x1 << MXC_CCM_CLPCR_LPM_OFFSET;
>+ ccm_clpcr &= ~MXC_CCM_CLPCR_VSTBY;
>+ ccm_clpcr &= ~MXC_CCM_CLPCR_SBYOS;
>+ stop_mode = 0;
>+ } else {
>+ ccm_clpcr |= 0x2 << MXC_CCM_CLPCR_LPM_OFFSET;
>+ ccm_clpcr |= 0x3 << MXC_CCM_CLPCR_STBY_COUNT_OFFSET;
>+ ccm_clpcr |= MXC_CCM_CLPCR_VSTBY;
>+ ccm_clpcr |= MXC_CCM_CLPCR_SBYOS;
>+ stop_mode = 1;
>+ }
>+
>+ arm_srpgcr |= MXC_SRPGCR_PCR;
>+ if (stop_mode) {
>+ empgc0 |= MXC_SRPGCR_PCR;
>+ empgc1 |= MXC_SRPGCR_PCR;
>+ }
>+
>+ if (tzic_enable_wake(1) != 0)
>+ return;
>+ break;
>+ case STOP_POWER_ON:
>+ ccm_clpcr |= 0x2 << MXC_CCM_CLPCR_LPM_OFFSET;
>+ break;
>+ default:
>+ printk(KERN_WARNING "UNKNOWN cpu power mode: %d\n", mode);
>+ return;
>+ }
>+
>+ __raw_writel(plat_lpc, MXC_CORTEXA8_PLAT_LPC);
>+ __raw_writel(ccm_clpcr, MXC_CCM_CLPCR);
>+ __raw_writel(arm_srpgcr, MXC_SRPG_ARM_SRPGCR);
>+ /* Enable NEON SRPG for all but MX50TO1.0. */
>+ __raw_writel(arm_srpgcr, MXC_SRPG_NEON_SRPGCR);
>+ if (stop_mode) {
>+ __raw_writel(empgc0, MXC_SRPG_EMPGC0_SRPGCR);
>+ __raw_writel(empgc1, MXC_SRPG_EMPGC1_SRPGCR);
>+ }
>+}
>+
>diff --git a/arch/arm/plat-mxc/include/mach/mxc.h b/arch/arm/plat-mxc/include/mach/mxc.h
>index 04c7a26..8a8970d 100644
>--- a/arch/arm/plat-mxc/include/mach/mxc.h
>+++ b/arch/arm/plat-mxc/include/mach/mxc.h
>@@ -181,6 +181,15 @@ struct cpu_op {
> u32 cpu_rate;
> };
>
>+int tzic_enable_wake(int is_idle);
>+enum mxc_cpu_pwr_mode {
>+ WAIT_CLOCKED, /* wfi only */
>+ WAIT_UNCLOCKED, /* WAIT */
>+ WAIT_UNCLOCKED_POWER_OFF, /* WAIT + SRPG */
>+ STOP_POWER_ON, /* just STOP */
>+ STOP_POWER_OFF, /* STOP + SRPG */
>+};
>+
> extern struct cpu_op *(*get_cpu_op)(int *op);
> #endif
>
>diff --git a/arch/arm/plat-mxc/include/mach/system.h b/arch/arm/plat-mxc/include/mach/system.h
>index 95be51b..35283a4 100644
>--- a/arch/arm/plat-mxc/include/mach/system.h
>+++ b/arch/arm/plat-mxc/include/mach/system.h
>@@ -20,6 +20,8 @@
> #include <mach/hardware.h>
> #include <mach/common.h>
>
>+extern void mx5_cpu_lp_set(enum mxc_cpu_pwr_mode mode);
>+
> static inline void arch_idle(void)
> {
> #ifdef CONFIG_ARCH_MXC91231
>@@ -54,7 +56,9 @@ static inline void arch_idle(void)
> "orr %0, %0, #0x00000004\n"
> "mcr p15, 0, %0, c1, c0, 0\n"
> : "=r" (reg));
>- } else
>+ } else if (cpu_is_mx51())
>+ mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF);
>+ else
> cpu_do_idle();
> }
>
>--
>1.6.0.4
Nguyen Dinh-R00091 <[email protected]> writes:
> Hi Arnaud,
Hi,
>
> I just sent out a 2nd set of the MX51 LPM patch. I have tested successfully on my mx51 babbage without any code modifications.
>
> If you would kindly verify on your side, that would great.
>
> You need both patches:
>
> [PATCHv2 1/2] ARM: mx51: Implement code to allow mx51 to enter WFI
> [PATCHv2 2/2] ARM: mx51: Add support for low power suspend on MX51
No success. I even tried disabling nearly all drivers and nothing. The
last line I have in the serial console is :
PM: late suspend of devices complete after 0.354 msecs
So, I still don't know if the system is crashing while suspending or if
the system is suspended but doesn't wake up.
Arnaud
Hi Arnaud,
Just to verify that you are testing on an MX51-Babbage board? Here's my log:
root@freescale ~$ uname -a
Linux freescale 2.6.38-rc1+ #93 Fri Mar 4 17:18:15 CST 2011 armv7l GNU/Linux
root@freescale ~$ echo mem > /sys/power/state
PM: Syncing filesystems ... done.
Freezing user space processes ... (elapsed 0.01 seconds) done.
Freezing remaining freezable tasks ... (elapsed 0.01 seconds) done.
Suspending console(s) (use no_console_suspend to debug)
<Press power key here, and the wake up is the bottom>.
PM: suspend of devices complete after 0.835 msecs
PM: suspend devices took 0.000 seconds
PM: late suspend of devices complete after 0.159 msecs
PM: early resume of devices complete after 0.187 msecs
PM: resume of devices complete after 81.911 msecs
PM: resume devices took 0.090 seconds
Restarting tasks ... done.
root@freescale ~$
Thanks,
Dinh
>-----Original Message-----
>From: Arnaud Patard [mailto:[email protected]]
>Sent: Saturday, March 05, 2011 2:47 PM
>To: Nguyen Dinh-R00091
>Cc: [email protected]; [email protected]; [email protected];
>[email protected]; [email protected]; Zhang Lily-R58066; Vaidyanathan Ranjani-RA5478
>Subject: Re: [PATCHv2 1/2] ARM: mx51: Implement code to allow mx51 to enter WFI
>
>Nguyen Dinh-R00091 <[email protected]> writes:
>
>> Hi Arnaud,
>
>Hi,
>
>>
>> I just sent out a 2nd set of the MX51 LPM patch. I have tested successfully on my mx51 babbage
>without any code modifications.
>>
>> If you would kindly verify on your side, that would great.
>>
>> You need both patches:
>>
>> [PATCHv2 1/2] ARM: mx51: Implement code to allow mx51 to enter WFI
>> [PATCHv2 2/2] ARM: mx51: Add support for low power suspend on MX51
>
>No success. I even tried disabling nearly all drivers and nothing. The
>last line I have in the serial console is :
>
>PM: late suspend of devices complete after 0.354 msecs
>
>So, I still don't know if the system is crashing while suspending or if
>the system is suspended but doesn't wake up.
>
>Arnaud
Nguyen Dinh-R00091 <[email protected]> writes:
> Hi Arnaud,
Hi,
>
> Just to verify that you are testing on an MX51-Babbage board? Here's my log:
I never said I was testing on babbage. The reason is because I'm using a
efika smartbook and not a babbage.
>
> root@freescale ~$ uname -a
> Linux freescale 2.6.38-rc1+ #93 Fri Mar 4 17:18:15 CST 2011 armv7l GNU/Linux
2.6.38-rc1+ ? which tree are you using ? The for-next branch of Sascha
Hauer's tree is at least 2.6.38-rc5 so you're trying to merge something
without even testing it on the current tree. Can you please test suspend
with current imx for-next tree (with no other patches than theses 2
patches if possible), in order to make sure that it's still working with it ?
Thanks,
Arnaud
Hi Arnaud,
>-----Original Message-----
>From: [email protected] [mailto:linux-arm-kernel-
>[email protected]] On Behalf Of Arnaud Patard
>Sent: Monday, March 07, 2011 10:02 AM
>To: Nguyen Dinh-R00091
>Cc: [email protected]; [email protected]; [email protected]; Vaidyanathan
>Ranjani-RA5478; [email protected]; Zhang Lily-R58066; linux-arm-
>[email protected]
>Subject: Re: [PATCHv2 1/2] ARM: mx51: Implement code to allow mx51 to enter WFI
>
>Nguyen Dinh-R00091 <[email protected]> writes:
>
>> Hi Arnaud,
>
>Hi,
>>
>> Just to verify that you are testing on an MX51-Babbage board? Here's my log:
>
>I never said I was testing on babbage. The reason is because I'm using a
>efika smartbook and not a babbage.
>
>>
>> root@freescale ~$ uname -a
>> Linux freescale 2.6.38-rc1+ #93 Fri Mar 4 17:18:15 CST 2011 armv7l GNU/Linux
>
>2.6.38-rc1+ ? which tree are you using ? The for-next branch of Sascha
>Hauer's tree is at least 2.6.38-rc5 so you're trying to merge something
>without even testing it on the current tree. Can you please test suspend
>with current imx for-next tree (with no other patches than theses 2
>patches if possible), in order to make sure that it's still working with it ?
>
The current imx for-next tree is not booting on my Babbage board. Is it okay for you with your HW. I'll have to debug the booting part first.
>Thanks,
>Arnaud
>
>_______________________________________________
>linux-arm-kernel mailing list
>[email protected]
>http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
On Mon, Mar 07, 2011 at 04:35:48PM +0000, Nguyen Dinh-R00091 wrote:
> Hi Arnaud,
>
>
> >-----Original Message-----
> >From: [email protected] [mailto:linux-arm-kernel-
> >[email protected]] On Behalf Of Arnaud Patard
> >Sent: Monday, March 07, 2011 10:02 AM
> >To: Nguyen Dinh-R00091
> >Cc: [email protected]; [email protected]; [email protected]; Vaidyanathan
> >Ranjani-RA5478; [email protected]; Zhang Lily-R58066; linux-arm-
> >[email protected]
> >Subject: Re: [PATCHv2 1/2] ARM: mx51: Implement code to allow mx51 to enter WFI
> >
> >Nguyen Dinh-R00091 <[email protected]> writes:
> >
> >> Hi Arnaud,
> >
> >Hi,
> >>
> >> Just to verify that you are testing on an MX51-Babbage board? Here's my log:
> >
> >I never said I was testing on babbage. The reason is because I'm using a
> >efika smartbook and not a babbage.
> >
> >>
> >> root@freescale ~$ uname -a
> >> Linux freescale 2.6.38-rc1+ #93 Fri Mar 4 17:18:15 CST 2011 armv7l GNU/Linux
> >
> >2.6.38-rc1+ ? which tree are you using ? The for-next branch of Sascha
> >Hauer's tree is at least 2.6.38-rc5 so you're trying to merge something
> >without even testing it on the current tree. Can you please test suspend
> >with current imx for-next tree (with no other patches than theses 2
> >patches if possible), in order to make sure that it's still working with it ?
> >
>
> The current imx for-next tree is not booting on my Babbage board. Is
> it okay for you with your HW. I'll have to debug the booting part
> first.
Probably because other than kconfig states i.MX51 and i.MX53 cannot be
compiled in one kernel. the for-next branch boots fine on my babbage.
Sascha
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
Hi Sascha,
>-----Original Message-----
>From: [email protected] [mailto:[email protected]]
>Sent: Monday, March 07, 2011 12:07 PM
>To: Nguyen Dinh-R00091
>Cc: Arnaud Patard; [email protected]; [email protected]; Vaidyanathan Ranjani-RA5478;
>[email protected]; Zhang Lily-R58066; [email protected]
>Subject: Re: [PATCHv2 1/2] ARM: mx51: Implement code to allow mx51 to enter WFI
>
>On Mon, Mar 07, 2011 at 04:35:48PM +0000, Nguyen Dinh-R00091 wrote:
>> Hi Arnaud,
>>
>>
>> >-----Original Message-----
>> >From: [email protected] [mailto:linux-arm-kernel-
>> >[email protected]] On Behalf Of Arnaud Patard
>> >Sent: Monday, March 07, 2011 10:02 AM
>> >To: Nguyen Dinh-R00091
>> >Cc: [email protected]; [email protected]; [email protected]; Vaidyanathan
>> >Ranjani-RA5478; [email protected]; Zhang Lily-R58066; linux-arm-
>> >[email protected]
>> >Subject: Re: [PATCHv2 1/2] ARM: mx51: Implement code to allow mx51 to enter WFI
>> >
>> >Nguyen Dinh-R00091 <[email protected]> writes:
>> >
>> >> Hi Arnaud,
>> >
>> >Hi,
>> >>
>> >> Just to verify that you are testing on an MX51-Babbage board? Here's my log:
>> >
>> >I never said I was testing on babbage. The reason is because I'm using a
>> >efika smartbook and not a babbage.
>> >
>> >>
>> >> root@freescale ~$ uname -a
>> >> Linux freescale 2.6.38-rc1+ #93 Fri Mar 4 17:18:15 CST 2011 armv7l GNU/Linux
>> >
>> >2.6.38-rc1+ ? which tree are you using ? The for-next branch of Sascha
>> >Hauer's tree is at least 2.6.38-rc5 so you're trying to merge something
>> >without even testing it on the current tree. Can you please test suspend
>> >with current imx for-next tree (with no other patches than theses 2
>> >patches if possible), in order to make sure that it's still working with it ?
>> >
>>
>> The current imx for-next tree is not booting on my Babbage board. Is
>> it okay for you with your HW. I'll have to debug the booting part
>> first.
>
>Probably because other than kconfig states i.MX51 and i.MX53 cannot be
>compiled in one kernel. the for-next branch boots fine on my babbage.
>
This doesn't seem right. When I do a "make mx51_defconfig", I see that mx51 and mx53 are selected, which is odd but should be okay if you move mx51_defconfig->mx5_defconfig. After doing a "make mx51_defconfig", I have go unselect mx53 in the menuconfig and the image can boot for me on my MX51 HW. I didn't have to do in 2.6.38-rc1? Shouldn't the image generated from mx51_defconfig be bootable on both mx51 and mx53?
I thought we were going the down the path of a single kernel for mx50, mx51, and mx53? Am I missing the correct steps for a single kernel all the mx5 series SoCs?
Internally, we have a single mx5_defconfig for all MX5 SOCs. Is that something we should look to do?
Thanks,
Dinh
>Sascha
>
>
>--
>Pengutronix e.K. | |
>Industrial Linux Solutions | http://www.pengutronix.de/ |
>Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
>Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
Hi Arnaud,
>-----Original Message-----
>From: [email protected] [mailto:linux-arm-kernel-
>[email protected]] On Behalf Of Arnaud Patard
>Sent: Monday, March 07, 2011 10:02 AM
>To: Nguyen Dinh-R00091
>Cc: [email protected]; [email protected]; [email protected]; Vaidyanathan
>Ranjani-RA5478; [email protected]; Zhang Lily-R58066; linux-arm-
>[email protected]
>Subject: Re: [PATCHv2 1/2] ARM: mx51: Implement code to allow mx51 to enter WFI
>
>Nguyen Dinh-R00091 <[email protected]> writes:
>
>> Hi Arnaud,
>
>Hi,
>>
>> Just to verify that you are testing on an MX51-Babbage board? Here's my log:
>
>I never said I was testing on babbage. The reason is because I'm using a
>efika smartbook and not a babbage.
>
>>
>> root@freescale ~$ uname -a
>> Linux freescale 2.6.38-rc1+ #93 Fri Mar 4 17:18:15 CST 2011 armv7l GNU/Linux
>
>2.6.38-rc1+ ? which tree are you using ? The for-next branch of Sascha
>Hauer's tree is at least 2.6.38-rc5 so you're trying to merge something
>without even testing it on the current tree. Can you please test suspend
>with current imx for-next tree (with no other patches than theses 2
>patches if possible), in order to make sure that it's still working with it ?
>
I just tested the same 2 patches on Sascha's imx for-next branch and its working fine. I used a lab power supply to measure that the system did indeed suspend and wakeup. When the Babbage is running at 5V, its drawing 900 mA, after putting the system in suspend, it draws 200 mA.
And I can wakeup just fine using a irq from a gpio. Perhaps you IRQ source is not capable of waking up the system?
Dinh
>Thanks,
>Arnaud
>
>_______________________________________________
>linux-arm-kernel mailing list
>[email protected]
>http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
Hi Sascha,
On Mon, 7 Mar 2011 19:07:00 +0100
"[email protected]" <[email protected]> wrote:
>[...]
> > The current imx for-next tree is not booting on my Babbage board. Is
> > it okay for you with your HW. I'll have to debug the booting part
> > first.
>
> Probably because other than kconfig states i.MX51 and i.MX53 cannot be
> compiled in one kernel. the for-next branch boots fine on my babbage.
Would you mind explaining (or pointing to an explanation) as to why this is
not supposed to work? Given the high level of compatibility between MX51 and
MX53, I'd say there must be a very good reason not to enable a single binary
kernel for both. Or is this just temporary brokenness?
Best regards,
--
David Jander
Protonic Holland.
Hi David,
On Tue, Mar 08, 2011 at 12:40:23PM +0100, David Jander wrote:
>
> Hi Sascha,
>
> On Mon, 7 Mar 2011 19:07:00 +0100
> "[email protected]" <[email protected]> wrote:
> >[...]
> > > The current imx for-next tree is not booting on my Babbage board. Is
> > > it okay for you with your HW. I'll have to debug the booting part
> > > first.
> >
> > Probably because other than kconfig states i.MX51 and i.MX53 cannot be
> > compiled in one kernel. the for-next branch boots fine on my babbage.
>
> Would you mind explaining (or pointing to an explanation) as to why this is
> not supposed to work? Given the high level of compatibility between MX51 and
> MX53, I'd say there must be a very good reason not to enable a single binary
> kernel for both. Or is this just temporary brokenness?
i.MX51 and i.MX53 have different phys_offsets. Look at
arch/arm/mach-mx5/Makefile.boot:
zreladdr-$(CONFIG_ARCH_MX50) := 0x70008000
params_phys-$(CONFIG_ARCH_MX50) := 0x70000100
initrd_phys-$(CONFIG_ARCH_MX50) := 0x70800000
zreladdr-$(CONFIG_ARCH_MX51) := 0x90008000
params_phys-$(CONFIG_ARCH_MX51) := 0x90000100
initrd_phys-$(CONFIG_ARCH_MX51) := 0x90800000
zreladdr-$(CONFIG_ARCH_MX53) := 0x70008000
params_phys-$(CONFIG_ARCH_MX53) := 0x70000100
initrd_phys-$(CONFIG_ARCH_MX53) := 0x70800000
Compiling a kernel for i.MX50 and i.MX53 will work, but compiling a
kernel for i.MX51 and i.MX53 will and up with a kernel assuming SDRAM
at 0x70000000 which will fail on a i.MX51. We need
phys_to_virt/virt_to_phys runtime patching to get this right. This
will be merged in the next merge window.
Sascha
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
Hi Uwe/Sascha,
Just wondering if you had a chance to review this patch series?
Thanks,
Dinh
>-----Original Message-----
>From: Nguyen Dinh-R00091
>Sent: Friday, March 04, 2011 5:30 PM
>To: [email protected]
>Cc: [email protected]; [email protected]; [email protected]; u.kleine-
>[email protected]; Zhang Lily-R58066; Vaidyanathan Ranjani-RA5478; Nguyen Dinh-R00091
>Subject: [PATCHv2 1/2] ARM: mx51: Implement code to allow mx51 to enter WFI
>
>From: Dinh Nguyen <[email protected]>
>
>Implement code for MX51 that allows the SoC to enter WFI when
>arch_idle is called.
>
>This patch is also necessary for correctly suspending the system.
>
>Signed-off-by: Dinh Nguyen <[email protected]>
>---
> arch/arm/mach-mx5/Makefile | 2 +-
> arch/arm/mach-mx5/system.c | 84 +++++++++++++++++++++++++++++++
> arch/arm/plat-mxc/include/mach/mxc.h | 9 +++
> arch/arm/plat-mxc/include/mach/system.h | 6 ++-
> 4 files changed, 99 insertions(+), 2 deletions(-)
> create mode 100644 arch/arm/mach-mx5/system.c
>
>diff --git a/arch/arm/mach-mx5/Makefile b/arch/arm/mach-mx5/Makefile
>index 0d43be9..1106acd 100644
>--- a/arch/arm/mach-mx5/Makefile
>+++ b/arch/arm/mach-mx5/Makefile
>@@ -3,7 +3,7 @@
> #
>
> # Object file lists.
>-obj-y := cpu.o mm.o clock-mx51-mx53.o devices.o
>+obj-y := cpu.o mm.o clock-mx51-mx53.o devices.o system.o
> obj-$(CONFIG_SOC_IMX50) += mm-mx50.o
>
> obj-$(CONFIG_CPU_FREQ_IMX) += cpu_op-mx51.o
>diff --git a/arch/arm/mach-mx5/system.c b/arch/arm/mach-mx5/system.c
>new file mode 100644
>index 0000000..06d306b
>--- /dev/null
>+++ b/arch/arm/mach-mx5/system.c
>@@ -0,0 +1,84 @@
>+/*
>+ * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
>+ */
>+
>+/*
>+ * The code contained herein is licensed under the GNU General Public
>+ * License. You may obtain a copy of the GNU General Public License
>+ * Version 2 or later at the following locations:
>+ *
>+ * http://www.opensource.org/licenses/gpl-license.html
>+ * http://www.gnu.org/copyleft/gpl.html
>+ */
>+#include <linux/platform_device.h>
>+#include <asm/io.h>
>+#include <mach/hardware.h>
>+#include "crm_regs.h"
>+
>+/* set cpu low power mode before WFI instruction. This function is called mx5 because
>+ it can be used for mx50, mx51, and mx53.*/
>+void mx5_cpu_lp_set(enum mxc_cpu_pwr_mode mode)
>+{
>+ u32 plat_lpc, arm_srpgcr, ccm_clpcr;
>+ u32 empgc0, empgc1;
>+ int stop_mode = 0;
>+
>+ /* always allow platform to issue a deep sleep mode request */
>+ plat_lpc = __raw_readl(MXC_CORTEXA8_PLAT_LPC) &
>+ ~(MXC_CORTEXA8_PLAT_LPC_DSM);
>+ ccm_clpcr = __raw_readl(MXC_CCM_CLPCR) & ~(MXC_CCM_CLPCR_LPM_MASK);
>+ arm_srpgcr = __raw_readl(MXC_SRPG_ARM_SRPGCR) & ~(MXC_SRPGCR_PCR);
>+ empgc0 = __raw_readl(MXC_SRPG_EMPGC0_SRPGCR) & ~(MXC_SRPGCR_PCR);
>+ empgc1 = __raw_readl(MXC_SRPG_EMPGC1_SRPGCR) & ~(MXC_SRPGCR_PCR);
>+
>+ switch (mode) {
>+ case WAIT_CLOCKED:
>+ break;
>+ case WAIT_UNCLOCKED:
>+ ccm_clpcr |= 0x1 << MXC_CCM_CLPCR_LPM_OFFSET;
>+ break;
>+ case WAIT_UNCLOCKED_POWER_OFF:
>+ case STOP_POWER_OFF:
>+ plat_lpc |= MXC_CORTEXA8_PLAT_LPC_DSM
>+ | MXC_CORTEXA8_PLAT_LPC_DBG_DSM;
>+ if (mode == WAIT_UNCLOCKED_POWER_OFF) {
>+ ccm_clpcr |= 0x1 << MXC_CCM_CLPCR_LPM_OFFSET;
>+ ccm_clpcr &= ~MXC_CCM_CLPCR_VSTBY;
>+ ccm_clpcr &= ~MXC_CCM_CLPCR_SBYOS;
>+ stop_mode = 0;
>+ } else {
>+ ccm_clpcr |= 0x2 << MXC_CCM_CLPCR_LPM_OFFSET;
>+ ccm_clpcr |= 0x3 << MXC_CCM_CLPCR_STBY_COUNT_OFFSET;
>+ ccm_clpcr |= MXC_CCM_CLPCR_VSTBY;
>+ ccm_clpcr |= MXC_CCM_CLPCR_SBYOS;
>+ stop_mode = 1;
>+ }
>+
>+ arm_srpgcr |= MXC_SRPGCR_PCR;
>+ if (stop_mode) {
>+ empgc0 |= MXC_SRPGCR_PCR;
>+ empgc1 |= MXC_SRPGCR_PCR;
>+ }
>+
>+ if (tzic_enable_wake(1) != 0)
>+ return;
>+ break;
>+ case STOP_POWER_ON:
>+ ccm_clpcr |= 0x2 << MXC_CCM_CLPCR_LPM_OFFSET;
>+ break;
>+ default:
>+ printk(KERN_WARNING "UNKNOWN cpu power mode: %d\n", mode);
>+ return;
>+ }
>+
>+ __raw_writel(plat_lpc, MXC_CORTEXA8_PLAT_LPC);
>+ __raw_writel(ccm_clpcr, MXC_CCM_CLPCR);
>+ __raw_writel(arm_srpgcr, MXC_SRPG_ARM_SRPGCR);
>+ /* Enable NEON SRPG for all but MX50TO1.0. */
>+ __raw_writel(arm_srpgcr, MXC_SRPG_NEON_SRPGCR);
>+ if (stop_mode) {
>+ __raw_writel(empgc0, MXC_SRPG_EMPGC0_SRPGCR);
>+ __raw_writel(empgc1, MXC_SRPG_EMPGC1_SRPGCR);
>+ }
>+}
>+
>diff --git a/arch/arm/plat-mxc/include/mach/mxc.h b/arch/arm/plat-mxc/include/mach/mxc.h
>index 04c7a26..8a8970d 100644
>--- a/arch/arm/plat-mxc/include/mach/mxc.h
>+++ b/arch/arm/plat-mxc/include/mach/mxc.h
>@@ -181,6 +181,15 @@ struct cpu_op {
> u32 cpu_rate;
> };
>
>+int tzic_enable_wake(int is_idle);
>+enum mxc_cpu_pwr_mode {
>+ WAIT_CLOCKED, /* wfi only */
>+ WAIT_UNCLOCKED, /* WAIT */
>+ WAIT_UNCLOCKED_POWER_OFF, /* WAIT + SRPG */
>+ STOP_POWER_ON, /* just STOP */
>+ STOP_POWER_OFF, /* STOP + SRPG */
>+};
>+
> extern struct cpu_op *(*get_cpu_op)(int *op);
> #endif
>
>diff --git a/arch/arm/plat-mxc/include/mach/system.h b/arch/arm/plat-mxc/include/mach/system.h
>index 95be51b..35283a4 100644
>--- a/arch/arm/plat-mxc/include/mach/system.h
>+++ b/arch/arm/plat-mxc/include/mach/system.h
>@@ -20,6 +20,8 @@
> #include <mach/hardware.h>
> #include <mach/common.h>
>
>+extern void mx5_cpu_lp_set(enum mxc_cpu_pwr_mode mode);
>+
> static inline void arch_idle(void)
> {
> #ifdef CONFIG_ARCH_MXC91231
>@@ -54,7 +56,9 @@ static inline void arch_idle(void)
> "orr %0, %0, #0x00000004\n"
> "mcr p15, 0, %0, c1, c0, 0\n"
> : "=r" (reg));
>- } else
>+ } else if (cpu_is_mx51())
>+ mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF);
>+ else
> cpu_do_idle();
> }
>
>--
>1.6.0.4
On Thu, 10 Mar 2011 14:37:15 +0100
"[email protected]" <[email protected]> wrote:
> Hi David,
>
> On Tue, Mar 08, 2011 at 12:40:23PM +0100, David Jander wrote:
> >
> > Hi Sascha,
> >
> > On Mon, 7 Mar 2011 19:07:00 +0100
> > "[email protected]" <[email protected]> wrote:
> > >[...]
> > > > The current imx for-next tree is not booting on my Babbage board. Is
> > > > it okay for you with your HW. I'll have to debug the booting part
> > > > first.
> > >
> > > Probably because other than kconfig states i.MX51 and i.MX53 cannot be
> > > compiled in one kernel. the for-next branch boots fine on my babbage.
> >
> > Would you mind explaining (or pointing to an explanation) as to why this is
> > not supposed to work? Given the high level of compatibility between MX51
> > and MX53, I'd say there must be a very good reason not to enable a single
> > binary kernel for both. Or is this just temporary brokenness?
>
> i.MX51 and i.MX53 have different phys_offsets. Look at
> arch/arm/mach-mx5/Makefile.boot:
>
> zreladdr-$(CONFIG_ARCH_MX50) := 0x70008000
> params_phys-$(CONFIG_ARCH_MX50) := 0x70000100
> initrd_phys-$(CONFIG_ARCH_MX50) := 0x70800000
> zreladdr-$(CONFIG_ARCH_MX51) := 0x90008000
> params_phys-$(CONFIG_ARCH_MX51) := 0x90000100
> initrd_phys-$(CONFIG_ARCH_MX51) := 0x90800000
> zreladdr-$(CONFIG_ARCH_MX53) := 0x70008000
> params_phys-$(CONFIG_ARCH_MX53) := 0x70000100
> initrd_phys-$(CONFIG_ARCH_MX53) := 0x70800000
>
> Compiling a kernel for i.MX50 and i.MX53 will work, but compiling a
> kernel for i.MX51 and i.MX53 will and up with a kernel assuming SDRAM
> at 0x70000000 which will fail on a i.MX51. We need
> phys_to_virt/virt_to_phys runtime patching to get this right. This
> will be merged in the next merge window.
Ok, so it classifies as "temporary brokenness" ;-)
Thanks a lot for clarifying.
Best regards,
--
David Jander
Protonic Holland.
<[email protected]> writes:
Hi,
> From: Dinh Nguyen <[email protected]>
>
> Adds initial low power suspend functionality to MX51.
> Supports "mem" and "standby" modes.
>
> Tested on mx51-babbage.
>
> Signed-off-by: Dinh Nguyen <[email protected]>
> ---
> arch/arm/mach-mx5/Makefile | 1 +
> arch/arm/mach-mx5/pm-imx51.c | 62 ++++++++++++++++++++++++++++++++++++++++++
> 2 files changed, 63 insertions(+), 0 deletions(-)
> create mode 100644 arch/arm/mach-mx5/pm-imx51.c
>
> diff --git a/arch/arm/mach-mx5/Makefile b/arch/arm/mach-mx5/Makefile
> index 1106acd..2f6258e 100644
> --- a/arch/arm/mach-mx5/Makefile
> +++ b/arch/arm/mach-mx5/Makefile
> @@ -6,6 +6,7 @@
> obj-y := cpu.o mm.o clock-mx51-mx53.o devices.o system.o
> obj-$(CONFIG_SOC_IMX50) += mm-mx50.o
>
> +obj-$(CONFIG_PM) += pm-imx51.o
> obj-$(CONFIG_CPU_FREQ_IMX) += cpu_op-mx51.o
> obj-$(CONFIG_MACH_MX51_BABBAGE) += board-mx51_babbage.o
> obj-$(CONFIG_MACH_MX51_3DS) += board-mx51_3ds.o
> diff --git a/arch/arm/mach-mx5/pm-imx51.c b/arch/arm/mach-mx5/pm-imx51.c
> new file mode 100644
> index 0000000..6bb76e2
> --- /dev/null
> +++ b/arch/arm/mach-mx5/pm-imx51.c
> @@ -0,0 +1,62 @@
> +/*
> + * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
> + *
> + * The code contained herein is licensed under the GNU General Public
> + * License. You may obtain a copy of the GNU General Public License
> + * Version 2 or later at the following locations:
> + *
> + * http://www.opensource.org/licenses/gpl-license.html
> + * http://www.gnu.org/copyleft/gpl.html
> + */
> +#include <linux/suspend.h>
> +#include <asm/mach/map.h>
> +#include <asm/cacheflush.h>
> +#include <asm/tlb.h>
> +#include <mach/system.h>
> +#include "crm_regs.h"
> +
> +static int mx5_suspend_enter(suspend_state_t state)
> +{
In your tree, here the gpc clock is enabled with a comment saying:
/* gpc clock is needed for SRPG */
and someone choose to not handle that, I guess because your uboot or
someone else is already enabling it. Assuming that all boards will
behave like yours is not a good idea because enabling the clock here
allowed me to get suspend to mem work.
I'll do more tests over the week end to confirm this because I've done
some other changes in my tree (in this version, you removed the
tzic_enable_wake() call here so I added it back) and keep you
informed. At least, it really looks like enabling the gpc clock was the
missing piece.
Arnaud