This series is responsible for adding support for Wave5 driver[0]
across numerous TI K3 platforms.
[0]: https://lore.kernel.org/all/[email protected]/
Changes since v2:
=================
* Remove reference to k3 as requested
* Rebase on v6.8-rc2 where new bindings are present
* Remove am62a dts entry until hrtimer[1] patch gets merged
[1]: https://patchwork.kernel.org/project/linux-media/patch/[email protected]/
Changes since v1:
=================
* Remove sram parameters
- sram-size property not included in bindings. Without this, size
will default to 0 so no point in specifying until binding is added.
* Remove global CMA pools for each platform
- This is something that has been added in TI backport of driver
and does not yet have reliable support in upstream version.
- Removing for now with intention to add back once 48-bit
addressing is supported in upstream Wave5 driver.
Brandon Brnich (5):
arm64: dts: ti: k3-j784s4: Add Wave5 Video Encoder/Decoder Node
arm64: dts: ti: k3-am69-sk: Enable Wave5 Video Encoder/Decoder
arm64: dts: ti: k3-am68-sk: Enable Wave5 Video Encoder/Decoder
arm64: dts: ti: k3-am62p: Add Wave5 Video Encoder/Decoder Node
arm64: defconfig: Enable Wave5 Video Encoder/Decoder
Darren Etheridge (1):
arm64: dts: ti: k3-j721s2-main: Add Wave5 Video Encoder/Decoder Node
arch/arm64/boot/dts/ti/k3-am62p-main.dtsi | 10 ++++++++++
arch/arm64/boot/dts/ti/k3-am62p5-sk.dts | 4 ++++
.../boot/dts/ti/k3-am68-sk-base-board.dts | 4 ++++
arch/arm64/boot/dts/ti/k3-am69-sk.dts | 8 ++++++++
.../dts/ti/k3-j721s2-common-proc-board.dts | 4 ++++
arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 10 ++++++++++
arch/arm64/boot/dts/ti/k3-j784s4-evm.dts | 8 ++++++++
arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 20 +++++++++++++++++++
arch/arm64/boot/dts/ti/k3-j784s4.dtsi | 2 ++
arch/arm64/configs/defconfig | 1 +
10 files changed, 71 insertions(+)
--
2.34.1
This patch adds support for the Wave521cl on the J784S4-evm.
Signed-off-by: Brandon Brnich <[email protected]>
---
arch/arm64/boot/dts/ti/k3-j784s4-evm.dts | 8 ++++++++
arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 20 ++++++++++++++++++++
arch/arm64/boot/dts/ti/k3-j784s4.dtsi | 2 ++
3 files changed, 30 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
index f34b92acc56d..7d37c11b4df4 100644
--- a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
@@ -784,6 +784,14 @@ &main_gpio0 {
status = "okay";
};
+&vpu0 {
+ status = "okay";
+};
+
+&vpu1 {
+ status = "okay";
+};
+
&mcu_cpsw {
status = "okay";
pinctrl-names = "default";
diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
index f2b720ed1e4f..8b2623ac8160 100644
--- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
@@ -662,6 +662,26 @@ main_i2c6: i2c@2060000 {
status = "disabled";
};
+ vpu0: video-codec@4210000 {
+ compatible = "ti,j721s2-wave521c", "cnm,wave521c";
+ reg = <0x00 0x4210000 0x00 0x10000>;
+ interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&k3_clks 241 2>;
+ clock-names = "vcodec";
+ power-domains = <&k3_pds 241 TI_SCI_PD_EXCLUSIVE>;
+ status = "disabled";
+ };
+
+ vpu1: video-codec@4220000 {
+ compatible = "ti,j721s2-wave521c", "cnm,wave521c";
+ reg = <0x00 0x4220000 0x00 0x10000>;
+ interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&k3_clks 242 2>;
+ clock-names = "vcodec";
+ power-domains = <&k3_pds 242 TI_SCI_PD_EXCLUSIVE>;
+ status = "disabled";
+ };
+
main_sdhci0: mmc@4f80000 {
compatible = "ti,j721e-sdhci-8bit";
reg = <0x00 0x04f80000 0x00 0x1000>,
diff --git a/arch/arm64/boot/dts/ti/k3-j784s4.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4.dtsi
index 4398c3a463e1..93bb0cba1b48 100644
--- a/arch/arm64/boot/dts/ti/k3-j784s4.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j784s4.dtsi
@@ -247,6 +247,8 @@ cbass_main: bus@100000 {
<0x00 0x30000000 0x00 0x30000000 0x00 0x0c400000>, /* MAIN NAVSS */
<0x41 0x00000000 0x41 0x00000000 0x01 0x00000000>, /* PCIe1 DAT1 */
<0x4e 0x20000000 0x4e 0x20000000 0x00 0x00080000>, /* GPU */
+ <0x00 0x04210000 0x00 0x04210000 0x00 0x00010000>, /* VPU0 */
+ <0x00 0x04220000 0x00 0x04220000 0x00 0x00010000>, /* VPU1 */
/* MCUSS_WKUP Range */
<0x00 0x28380000 0x00 0x28380000 0x00 0x03880000>,
--
2.34.1
Update status for both Wave5 VPUs on AM69.
Signed-off-by: Brandon Brnich <[email protected]>
---
arch/arm64/boot/dts/ti/k3-am69-sk.dts | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am69-sk.dts b/arch/arm64/boot/dts/ti/k3-am69-sk.dts
index 8da591579868..6abfc0630f7c 100644
--- a/arch/arm64/boot/dts/ti/k3-am69-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am69-sk.dts
@@ -800,6 +800,14 @@ &main_gpio0 {
pinctrl-0 = <&rpi_header_gpio0_pins_default>;
};
+&vpu0 {
+ status = "okay";
+};
+
+&vpu1 {
+ status = "okay";
+};
+
&mcu_cpsw {
status = "okay";
pinctrl-names = "default";
--
2.34.1
From: Darren Etheridge <[email protected]>
Add the Chips and Media wave521cl video decoder/encoder node on J721S2.
Signed-off-by: Darren Etheridge <[email protected]>
Signed-off-by: Brandon Brnich <[email protected]>
---
arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts | 4 ++++
arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 10 ++++++++++
2 files changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts
index c6b85bbf9a17..0b1bcb4b5b57 100644
--- a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts
@@ -502,3 +502,7 @@ &main_mcan5 {
pinctrl-0 = <&main_mcan5_pins_default>;
phys = <&transceiver4>;
};
+
+&vpu {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
index ea7f2b2ab165..5b4cd3dc3b60 100644
--- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
@@ -716,6 +716,16 @@ main_i2c6: i2c@2060000 {
status = "disabled";
};
+ vpu: video-codec@4210000 {
+ compatible = "ti,j721s2-wave521c", "cnm,wave521c";
+ reg = <0x00 0x4210000 0x00 0x10000>;
+ interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&k3_clks 179 2>;
+ clock-names = "vcodec";
+ power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>;
+ status = "disabled";
+ };
+
main_sdhci0: mmc@4f80000 {
compatible = "ti,j721e-sdhci-8bit";
reg = <0x00 0x04f80000 0x00 0x1000>,
--
2.34.1
This patch adds support for the Wave521cl on the AM62P.
Signed-off-by: Brandon Brnich <[email protected]>
---
arch/arm64/boot/dts/ti/k3-am62p-main.dtsi | 10 ++++++++++
arch/arm64/boot/dts/ti/k3-am62p5-sk.dts | 4 ++++
2 files changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
index 4c51bae06b57..94c89699b35f 100644
--- a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
@@ -891,4 +891,14 @@ mcasp2: audio-controller@2b20000 {
power-domains = <&k3_pds 192 TI_SCI_PD_EXCLUSIVE>;
status = "disabled";
};
+
+ vpu: video-codec@30210000 {
+ compatible = "ti,j721s2-wave521c", "cnm,wave521c";
+ reg = <0x00 0x30210000 0x00 0x10000>;
+ interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&k3_clks 204 2>;
+ clock-names = "vcodec";
+ power-domains = <&k3_pds 204 TI_SCI_PD_EXCLUSIVE>;
+ status = "disabled";
+ };
};
diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
index 1773c05f752c..0aec79ed5578 100644
--- a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
@@ -569,6 +569,10 @@ &main_uart0 {
bootph-all;
};
+&vpu {
+ status = "okay";
+};
+
&main_uart1 {
pinctrl-names = "default";
pinctrl-0 = <&main_uart1_pins_default>;
--
2.34.1
Update status for Wave5 VPU on AM68.
Signed-off-by: Brandon Brnich <[email protected]>
---
arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts b/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts
index d0cfdeac21fb..b4f8e50bc40f 100644
--- a/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts
@@ -610,3 +610,7 @@ &usb0 {
phys = <&serdes0_usb_link>;
phy-names = "cdns3,usb3-phy";
};
+
+&vpu {
+ status = "okay";
+};
--
2.34.1
Enable Wave521c video decoder/encoder driver on all TI
K3 platforms that contain the IP.
Signed-off-by: Brandon Brnich <[email protected]>
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index e6cf3e5d63c3..6fe4f2da4aca 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -795,6 +795,7 @@ CONFIG_V4L_MEM2MEM_DRIVERS=y
CONFIG_VIDEO_CADENCE_CSI2RX=m
CONFIG_VIDEO_MEDIATEK_JPEG=m
CONFIG_VIDEO_MEDIATEK_VCODEC=m
+CONFIG_VIDEO_WAVE_VPU=m
CONFIG_VIDEO_IMX7_CSI=m
CONFIG_VIDEO_IMX_MIPI_CSIS=m
CONFIG_VIDEO_IMX8_ISI=m
--
2.34.1
Hi Brandon,
Thank you for the patch.
On mer., janv. 31, 2024 at 15:26, Brandon Brnich <[email protected]> wrote:
> This patch adds support for the Wave521cl on the AM62P.
>
> Signed-off-by: Brandon Brnich <[email protected]>
Reviewed-by: Mattijs Korpershoek <[email protected]>
> ---
> arch/arm64/boot/dts/ti/k3-am62p-main.dtsi | 10 ++++++++++
> arch/arm64/boot/dts/ti/k3-am62p5-sk.dts | 4 ++++
> 2 files changed, 14 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
> index 4c51bae06b57..94c89699b35f 100644
> --- a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
> @@ -891,4 +891,14 @@ mcasp2: audio-controller@2b20000 {
> power-domains = <&k3_pds 192 TI_SCI_PD_EXCLUSIVE>;
> status = "disabled";
> };
> +
> + vpu: video-codec@30210000 {
> + compatible = "ti,j721s2-wave521c", "cnm,wave521c";
> + reg = <0x00 0x30210000 0x00 0x10000>;
> + interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&k3_clks 204 2>;
> + clock-names = "vcodec";
> + power-domains = <&k3_pds 204 TI_SCI_PD_EXCLUSIVE>;
> + status = "disabled";
> + };
> };
> diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
> index 1773c05f752c..0aec79ed5578 100644
> --- a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
> +++ b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
> @@ -569,6 +569,10 @@ &main_uart0 {
> bootph-all;
> };
>
> +&vpu {
> + status = "okay";
> +};
> +
> &main_uart1 {
> pinctrl-names = "default";
> pinctrl-0 = <&main_uart1_pins_default>;
> --
> 2.34.1
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> [email protected]
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
On 1/31/24 3:26 PM, Brandon Brnich wrote:
> This patch adds support for the Wave521cl on the J784S4-evm.
>
> Signed-off-by: Brandon Brnich <[email protected]>
> ---
> arch/arm64/boot/dts/ti/k3-j784s4-evm.dts | 8 ++++++++
> arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 20 ++++++++++++++++++++
> arch/arm64/boot/dts/ti/k3-j784s4.dtsi | 2 ++
> 3 files changed, 30 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
> index f34b92acc56d..7d37c11b4df4 100644
> --- a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
> @@ -784,6 +784,14 @@ &main_gpio0 {
> status = "okay";
> };
>
> +&vpu0 {
> + status = "okay";
> +};
> +
> +&vpu1 {
> + status = "okay";
> +};
> +
> &mcu_cpsw {
> status = "okay";
> pinctrl-names = "default";
> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
> index f2b720ed1e4f..8b2623ac8160 100644
> --- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
> @@ -662,6 +662,26 @@ main_i2c6: i2c@2060000 {
> status = "disabled";
> };
>
> + vpu0: video-codec@4210000 {
> + compatible = "ti,j721s2-wave521c", "cnm,wave521c";
> + reg = <0x00 0x4210000 0x00 0x10000>;
> + interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&k3_clks 241 2>;
> + clock-names = "vcodec";
> + power-domains = <&k3_pds 241 TI_SCI_PD_EXCLUSIVE>;
> + status = "disabled";
Why are these default disabled? I don't see anything missing that
would need to be added at the board level. You disable them
just to re-enable them in the next patch. Leave these default
enabled.
> + };
> +
> + vpu1: video-codec@4220000 {
> + compatible = "ti,j721s2-wave521c", "cnm,wave521c";
> + reg = <0x00 0x4220000 0x00 0x10000>;
> + interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&k3_clks 242 2>;
> + clock-names = "vcodec";
> + power-domains = <&k3_pds 242 TI_SCI_PD_EXCLUSIVE>;
> + status = "disabled";
> + };
> +
> main_sdhci0: mmc@4f80000 {
> compatible = "ti,j721e-sdhci-8bit";
> reg = <0x00 0x04f80000 0x00 0x1000>,
> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4.dtsi
> index 4398c3a463e1..93bb0cba1b48 100644
> --- a/arch/arm64/boot/dts/ti/k3-j784s4.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j784s4.dtsi
> @@ -247,6 +247,8 @@ cbass_main: bus@100000 {
> <0x00 0x30000000 0x00 0x30000000 0x00 0x0c400000>, /* MAIN NAVSS */
> <0x41 0x00000000 0x41 0x00000000 0x01 0x00000000>, /* PCIe1 DAT1 */
> <0x4e 0x20000000 0x4e 0x20000000 0x00 0x00080000>, /* GPU */
> + <0x00 0x04210000 0x00 0x04210000 0x00 0x00010000>, /* VPU0 */
> + <0x00 0x04220000 0x00 0x04220000 0x00 0x00010000>, /* VPU1 */
Add these in sorted by memory address order.
Andrew
>
> /* MCUSS_WKUP Range */
> <0x00 0x28380000 0x00 0x28380000 0x00 0x03880000>,
Hi Andrew,
> -----Original Message-----
> From: Davis, Andrew <[email protected]>
> Sent: Thursday, February 1, 2024 12:35 PM
> To: Brnich, Brandon <[email protected]>; Menon, Nishanth <[email protected]>;
> Raghavendra, Vignesh <[email protected]>; Tero Kristo <[email protected]>;
> Rob Herring <[email protected]>; Krzysztof Kozlowski
> <[email protected]>; Conor Dooley <[email protected]>;
> Catalin Marinas <[email protected]>; Will Deacon
> <[email protected]>; Bjorn Andersson <[email protected]>; Geert
> Uytterhoeven <[email protected]>; Arnd Bergmann
> <[email protected]>; Konrad Dybcio <[email protected]>; Neil
> Armstrong <[email protected]>; Nícolas F . R . A . Prado
> <[email protected]>; Marek Szyprowski
> <[email protected]>; [email protected];
> [email protected]; [email protected]; Etheridge, Darren
> <[email protected]>
> Subject: Re: [PATCH v3 1/6] arm64: dts: ti: k3-j784s4: Add Wave5 Video
> Encoder/Decoder Node
>
> On 1/31/24 3:26 PM, Brandon Brnich wrote:
> > This patch adds support for the Wave521cl on the J784S4-evm.
> >
> > Signed-off-by: Brandon Brnich <[email protected]>
> > ---
> > arch/arm64/boot/dts/ti/k3-j784s4-evm.dts | 8 ++++++++
> > arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 20 ++++++++++++++++++++
> > arch/arm64/boot/dts/ti/k3-j784s4.dtsi | 2 ++
> > 3 files changed, 30 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
> > b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
> > index f34b92acc56d..7d37c11b4df4 100644
> > --- a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
> > +++ b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
> > @@ -784,6 +784,14 @@ &main_gpio0 {
> > status = "okay";
> > };
> >
> > +&vpu0 {
> > + status = "okay";
> > +};
> > +
> > +&vpu1 {
> > + status = "okay";
> > +};
> > +
> > &mcu_cpsw {
> > status = "okay";
> > pinctrl-names = "default";
> > diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
> > b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
> > index f2b720ed1e4f..8b2623ac8160 100644
> > --- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
> > +++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
> > @@ -662,6 +662,26 @@ main_i2c6: i2c@2060000 {
> > status = "disabled";
> > };
> >
> > + vpu0: video-codec@4210000 {
> > + compatible = "ti,j721s2-wave521c", "cnm,wave521c";
> > + reg = <0x00 0x4210000 0x00 0x10000>;
> > + interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&k3_clks 241 2>;
> > + clock-names = "vcodec";
> > + power-domains = <&k3_pds 241 TI_SCI_PD_EXCLUSIVE>;
> > + status = "disabled";
>
> Why are these default disabled? I don't see anything missing that would
> need to be added at the board level. You disable them just to re-enable them
> in the next patch. Leave these default enabled.
I thought that disabled by default was the standard for node in dtsi files, where
they get specifically enabled in the particular dts file for the SoC.
In V4 I will remove the disabled by default. Should this apply to all platforms in
the series?
> > + };
> > +
> > + vpu1: video-codec@4220000 {
> > + compatible = "ti,j721s2-wave521c", "cnm,wave521c";
> > + reg = <0x00 0x4220000 0x00 0x10000>;
> > + interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&k3_clks 242 2>;
> > + clock-names = "vcodec";
> > + power-domains = <&k3_pds 242 TI_SCI_PD_EXCLUSIVE>;
> > + status = "disabled";
> > + };
> > +
> > main_sdhci0: mmc@4f80000 {
> > compatible = "ti,j721e-sdhci-8bit";
> > reg = <0x00 0x04f80000 0x00 0x1000>, diff --git
> > a/arch/arm64/boot/dts/ti/k3-j784s4.dtsi
> > b/arch/arm64/boot/dts/ti/k3-j784s4.dtsi
> > index 4398c3a463e1..93bb0cba1b48 100644
> > --- a/arch/arm64/boot/dts/ti/k3-j784s4.dtsi
> > +++ b/arch/arm64/boot/dts/ti/k3-j784s4.dtsi
> > @@ -247,6 +247,8 @@ cbass_main: bus@100000 {
> > <0x00 0x30000000 0x00 0x30000000 0x00
> 0x0c400000>, /* MAIN NAVSS */
> > <0x41 0x00000000 0x41 0x00000000 0x01
> 0x00000000>, /* PCIe1 DAT1 */
> > <0x4e 0x20000000 0x4e 0x20000000 0x00
> 0x00080000>, /* GPU */
> > + <0x00 0x04210000 0x00 0x04210000 0x00
> 0x00010000>, /* VPU0 */
> > + <0x00 0x04220000 0x00 0x04220000 0x00
> 0x00010000>, /* VPU1 */
>
> Add these in sorted by memory address order.
Will do in V4 as well.
>
> Andrew
>
> >
> > /* MCUSS_WKUP Range */
> > <0x00 0x28380000 0x00 0x28380000 0x00
> 0x03880000>,
Brandon
On 2/1/24 1:13 PM, Brnich, Brandon wrote:
> Hi Andrew,
>
>> -----Original Message-----
>> From: Davis, Andrew <[email protected]>
>> Sent: Thursday, February 1, 2024 12:35 PM
>> To: Brnich, Brandon <[email protected]>; Menon, Nishanth <[email protected]>;
>> Raghavendra, Vignesh <[email protected]>; Tero Kristo <[email protected]>;
>> Rob Herring <[email protected]>; Krzysztof Kozlowski
>> <[email protected]>; Conor Dooley <[email protected]>;
>> Catalin Marinas <[email protected]>; Will Deacon
>> <[email protected]>; Bjorn Andersson <[email protected]>; Geert
>> Uytterhoeven <[email protected]>; Arnd Bergmann
>> <[email protected]>; Konrad Dybcio <[email protected]>; Neil
>> Armstrong <[email protected]>; Nícolas F . R . A . Prado
>> <[email protected]>; Marek Szyprowski
>> <[email protected]>; [email protected];
>> [email protected]; [email protected]; Etheridge, Darren
>> <[email protected]>
>> Subject: Re: [PATCH v3 1/6] arm64: dts: ti: k3-j784s4: Add Wave5 Video
>> Encoder/Decoder Node
>>
>> On 1/31/24 3:26 PM, Brandon Brnich wrote:
>>> This patch adds support for the Wave521cl on the J784S4-evm.
>>>
>>> Signed-off-by: Brandon Brnich <[email protected]>
>>> ---
>>> arch/arm64/boot/dts/ti/k3-j784s4-evm.dts | 8 ++++++++
>>> arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 20 ++++++++++++++++++++
>>> arch/arm64/boot/dts/ti/k3-j784s4.dtsi | 2 ++
>>> 3 files changed, 30 insertions(+)
>>>
>>> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
>>> b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
>>> index f34b92acc56d..7d37c11b4df4 100644
>>> --- a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
>>> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
>>> @@ -784,6 +784,14 @@ &main_gpio0 {
>>> status = "okay";
>>> };
>>>
>>> +&vpu0 {
>>> + status = "okay";
>>> +};
>>> +
>>> +&vpu1 {
>>> + status = "okay";
>>> +};
>>> +
>>> &mcu_cpsw {
>>> status = "okay";
>>> pinctrl-names = "default";
>>> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
>>> b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
>>> index f2b720ed1e4f..8b2623ac8160 100644
>>> --- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
>>> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
>>> @@ -662,6 +662,26 @@ main_i2c6: i2c@2060000 {
>>> status = "disabled";
>>> };
>>>
>>> + vpu0: video-codec@4210000 {
>>> + compatible = "ti,j721s2-wave521c", "cnm,wave521c";
>>> + reg = <0x00 0x4210000 0x00 0x10000>;
>>> + interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>;
>>> + clocks = <&k3_clks 241 2>;
>>> + clock-names = "vcodec";
>>> + power-domains = <&k3_pds 241 TI_SCI_PD_EXCLUSIVE>;
>>> + status = "disabled";
>>
>> Why are these default disabled? I don't see anything missing that would
>> need to be added at the board level. You disable them just to re-enable them
>> in the next patch. Leave these default enabled.
>
> I thought that disabled by default was the standard for node in dtsi files, where
> they get specifically enabled in the particular dts file for the SoC.
>
Only disabled if there is missing information needed for the node to function
that can only be added at the board level, e.g. pinmux usually.
> In V4 I will remove the disabled by default. Should this apply to all platforms in
> the series?
Yes
Andrew
>
>>> + };
>>> +
>>> + vpu1: video-codec@4220000 {
>>> + compatible = "ti,j721s2-wave521c", "cnm,wave521c";
>>> + reg = <0x00 0x4220000 0x00 0x10000>;
>>> + interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>;
>>> + clocks = <&k3_clks 242 2>;
>>> + clock-names = "vcodec";
>>> + power-domains = <&k3_pds 242 TI_SCI_PD_EXCLUSIVE>;
>>> + status = "disabled";
>>> + };
>>> +
>>> main_sdhci0: mmc@4f80000 {
>>> compatible = "ti,j721e-sdhci-8bit";
>>> reg = <0x00 0x04f80000 0x00 0x1000>, diff --git
>>> a/arch/arm64/boot/dts/ti/k3-j784s4.dtsi
>>> b/arch/arm64/boot/dts/ti/k3-j784s4.dtsi
>>> index 4398c3a463e1..93bb0cba1b48 100644
>>> --- a/arch/arm64/boot/dts/ti/k3-j784s4.dtsi
>>> +++ b/arch/arm64/boot/dts/ti/k3-j784s4.dtsi
>>> @@ -247,6 +247,8 @@ cbass_main: bus@100000 {
>>> <0x00 0x30000000 0x00 0x30000000 0x00
>> 0x0c400000>, /* MAIN NAVSS */
>>> <0x41 0x00000000 0x41 0x00000000 0x01
>> 0x00000000>, /* PCIe1 DAT1 */
>>> <0x4e 0x20000000 0x4e 0x20000000 0x00
>> 0x00080000>, /* GPU */
>>> + <0x00 0x04210000 0x00 0x04210000 0x00
>> 0x00010000>, /* VPU0 */
>>> + <0x00 0x04220000 0x00 0x04220000 0x00
>> 0x00010000>, /* VPU1 */
>>
>> Add these in sorted by memory address order.
>
> Will do in V4 as well.
>
>>
>> Andrew
>>
>>>
>>> /* MCUSS_WKUP Range */
>>> <0x00 0x28380000 0x00 0x28380000 0x00
>> 0x03880000>,
>
> Brandon