2023-11-27 15:51:22

by Linus Walleij

[permalink] [raw]
Subject: [PATCH v9 0/3] ARM/ARM64: dts: mv88e6xxx fixes for Marvell

This fixes and adjusts a few Marvell platform device trees
to the new bindings which will be merged separately to the
netdev tree.

The last patch adds the special compatibles we need to avoid
the annoying warnings on nonstandard ABI nodenames used by
U-Boot

This patch set mixes ARM and ARM64 DTS changes but I am
sure the maintainers can sort it out.

Link to v9 bindings patches:
https://lore.kernel.org/r/[email protected]

Signed-off-by: Linus Walleij <[email protected]>
---
Linus Walleij (3):
ARM: dts: marvell: Fix some common switch mistakes
ARM64: dts: marvell: Fix some common switch mistakes
ARM64: dts: Add special compatibles for the Turris Mox

arch/arm/boot/dts/marvell/armada-370-rd.dts | 24 +++---
.../dts/marvell/armada-381-netgear-gs110emx.dts | 44 +++++-----
.../dts/marvell/armada-385-clearfog-gtr-l8.dts | 38 ++++-----
.../dts/marvell/armada-385-clearfog-gtr-s4.dts | 22 ++---
arch/arm/boot/dts/marvell/armada-385-linksys.dtsi | 18 ++--
.../boot/dts/marvell/armada-385-turris-omnia.dts | 20 ++---
arch/arm/boot/dts/marvell/armada-388-clearfog.dts | 20 ++---
.../boot/dts/marvell/armada-xp-linksys-mamba.dts | 18 ++--
.../dts/marvell/armada-3720-espressobin-ultra.dts | 14 ++--
.../boot/dts/marvell/armada-3720-espressobin.dtsi | 20 ++---
.../boot/dts/marvell/armada-3720-gl-mv1000.dts | 20 ++---
.../boot/dts/marvell/armada-3720-turris-mox.dts | 97 ++++++++++++----------
.../boot/dts/marvell/armada-7040-mochabin.dts | 24 +++---
.../dts/marvell/armada-8040-clearfog-gt-8k.dts | 22 ++---
arch/arm64/boot/dts/marvell/cn9130-crb.dtsi | 42 +++++-----
15 files changed, 217 insertions(+), 226 deletions(-)
---
base-commit: b85ea95d086471afb4ad062012a4d73cd328fa86
change-id: 20231127-mv88e6xxx-mvebu-fixes-45af7324c481

Best regards,
--
Linus Walleij <[email protected]>


2023-11-27 15:51:44

by Linus Walleij

[permalink] [raw]
Subject: [PATCH v9 2/3] ARM64: dts: marvell: Fix some common switch mistakes

Fix some errors in the Marvell MV88E6xxx switch descriptions:
- The top node had no address size or cells.
- switch0@0 is not OK, should be ethernet-switch@0.
- ports should be ethernet-ports
- port@0 should be ethernet-port@0
- PHYs should be named ethernet-phy@

Reviewed-by: Andrew Lunn <[email protected]>
Reviewed-by: Florian Fainelli <[email protected]>
Signed-off-by: Linus Walleij <[email protected]>
---
.../dts/marvell/armada-3720-espressobin-ultra.dts | 14 ++--
.../boot/dts/marvell/armada-3720-espressobin.dtsi | 20 +++--
.../boot/dts/marvell/armada-3720-gl-mv1000.dts | 20 +++--
.../boot/dts/marvell/armada-3720-turris-mox.dts | 85 ++++++++++++----------
.../boot/dts/marvell/armada-7040-mochabin.dts | 24 +++---
.../dts/marvell/armada-8040-clearfog-gt-8k.dts | 22 +++---
arch/arm64/boot/dts/marvell/cn9130-crb.dtsi | 42 +++++------
7 files changed, 115 insertions(+), 112 deletions(-)

diff --git a/arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts b/arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts
index f9abef8dcc94..870bb380a40a 100644
--- a/arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts
+++ b/arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts
@@ -126,32 +126,32 @@ &switch0 {

reset-gpios = <&gpiosb 23 GPIO_ACTIVE_LOW>;

- ports {
- switch0port1: port@1 {
+ ethernet-ports {
+ switch0port1: ethernet-port@1 {
reg = <1>;
label = "lan0";
phy-handle = <&switch0phy0>;
};

- switch0port2: port@2 {
+ switch0port2: ethernet-port@2 {
reg = <2>;
label = "lan1";
phy-handle = <&switch0phy1>;
};

- switch0port3: port@3 {
+ switch0port3: ethernet-port@3 {
reg = <3>;
label = "lan2";
phy-handle = <&switch0phy2>;
};

- switch0port4: port@4 {
+ switch0port4: ethernet-port@4 {
reg = <4>;
label = "lan3";
phy-handle = <&switch0phy3>;
};

- switch0port5: port@5 {
+ switch0port5: ethernet-port@5 {
reg = <5>;
label = "wan";
phy-handle = <&extphy>;
@@ -160,7 +160,7 @@ switch0port5: port@5 {
};

mdio {
- switch0phy3: switch0phy3@14 {
+ switch0phy3: ethernet-phy@14 {
reg = <0x14>;
};
};
diff --git a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dtsi b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dtsi
index 49cbdb55b4b3..fed2dcecb323 100644
--- a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dtsi
@@ -145,19 +145,17 @@ &usb2 {
};

&mdio {
- switch0: switch0@1 {
+ switch0: ethernet-switch@1 {
compatible = "marvell,mv88e6085";
- #address-cells = <1>;
- #size-cells = <0>;
reg = <1>;

dsa,member = <0 0>;

- ports {
+ ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;

- switch0port0: port@0 {
+ switch0port0: ethernet-port@0 {
reg = <0>;
label = "cpu";
ethernet = <&eth0>;
@@ -168,19 +166,19 @@ fixed-link {
};
};

- switch0port1: port@1 {
+ switch0port1: ethernet-port@1 {
reg = <1>;
label = "wan";
phy-handle = <&switch0phy0>;
};

- switch0port2: port@2 {
+ switch0port2: ethernet-port@2 {
reg = <2>;
label = "lan0";
phy-handle = <&switch0phy1>;
};

- switch0port3: port@3 {
+ switch0port3: ethernet-port@3 {
reg = <3>;
label = "lan1";
phy-handle = <&switch0phy2>;
@@ -192,13 +190,13 @@ mdio {
#address-cells = <1>;
#size-cells = <0>;

- switch0phy0: switch0phy0@11 {
+ switch0phy0: ethernet-phy@11 {
reg = <0x11>;
};
- switch0phy1: switch0phy1@12 {
+ switch0phy1: ethernet-phy@12 {
reg = <0x12>;
};
- switch0phy2: switch0phy2@13 {
+ switch0phy2: ethernet-phy@13 {
reg = <0x13>;
};
};
diff --git a/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts b/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts
index b1b45b4fa9d4..63fbc8352161 100644
--- a/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts
+++ b/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts
@@ -152,31 +152,29 @@ &uart0 {
};

&mdio {
- switch0: switch0@1 {
+ switch0: ethernet-switch@1 {
compatible = "marvell,mv88e6085";
- #address-cells = <1>;
- #size-cells = <0>;
reg = <1>;

dsa,member = <0 0>;

- ports: ports {
+ ports: ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;

- port@0 {
+ ethernet-port@0 {
reg = <0>;
label = "cpu";
ethernet = <&eth0>;
};

- port@1 {
+ ethernet-port@1 {
reg = <1>;
label = "wan";
phy-handle = <&switch0phy0>;
};

- port@2 {
+ ethernet-port@2 {
reg = <2>;
label = "lan0";
phy-handle = <&switch0phy1>;
@@ -185,7 +183,7 @@ port@2 {
nvmem-cell-names = "mac-address";
};

- port@3 {
+ ethernet-port@3 {
reg = <3>;
label = "lan1";
phy-handle = <&switch0phy2>;
@@ -199,13 +197,13 @@ mdio {
#address-cells = <1>;
#size-cells = <0>;

- switch0phy0: switch0phy0@11 {
+ switch0phy0: ethernet-phy@11 {
reg = <0x11>;
};
- switch0phy1: switch0phy1@12 {
+ switch0phy1: ethernet-phy@12 {
reg = <0x12>;
};
- switch0phy2: switch0phy2@13 {
+ switch0phy2: ethernet-phy@13 {
reg = <0x13>;
};
};
diff --git a/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts b/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts
index 9eab2bb22134..66cd98b67744 100644
--- a/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts
+++ b/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts
@@ -304,7 +304,13 @@ phy1: ethernet-phy@1 {
reg = <1>;
};

- /* switch nodes are enabled by U-Boot if modules are present */
+ /*
+ * NOTE: switch nodes are enabled by U-Boot if modules are present
+ * DO NOT change this node name (switch0@10) even if it is not following
+ * conventions! Deployed U-Boot binaries are explicitly looking for
+ * this node in order to augment the device tree!
+ * Also do not touch the "ports" or "port@n" nodes. These are also ABI.
+ */
switch0@10 {
compatible = "marvell,mv88e6190";
reg = <0x10>;
@@ -317,35 +323,35 @@ mdio {
#address-cells = <1>;
#size-cells = <0>;

- switch0phy1: switch0phy1@1 {
+ switch0phy1: ethernet-phy@1 {
reg = <0x1>;
};

- switch0phy2: switch0phy2@2 {
+ switch0phy2: ethernet-phy@2 {
reg = <0x2>;
};

- switch0phy3: switch0phy3@3 {
+ switch0phy3: ethernet-phy@3 {
reg = <0x3>;
};

- switch0phy4: switch0phy4@4 {
+ switch0phy4: ethernet-phy@4 {
reg = <0x4>;
};

- switch0phy5: switch0phy5@5 {
+ switch0phy5: ethernet-phy@5 {
reg = <0x5>;
};

- switch0phy6: switch0phy6@6 {
+ switch0phy6: ethernet-phy@6 {
reg = <0x6>;
};

- switch0phy7: switch0phy7@7 {
+ switch0phy7: ethernet-phy@7 {
reg = <0x7>;
};

- switch0phy8: switch0phy8@8 {
+ switch0phy8: ethernet-phy@8 {
reg = <0x8>;
};
};
@@ -430,6 +436,7 @@ port-sfp@a {
};
};

+ /* NOTE: this node name is ABI, don't change it! */
switch0@2 {
compatible = "marvell,mv88e6085";
reg = <0x2>;
@@ -442,19 +449,19 @@ mdio {
#address-cells = <1>;
#size-cells = <0>;

- switch0phy1_topaz: switch0phy1@11 {
+ switch0phy1_topaz: ethernet-phy@11 {
reg = <0x11>;
};

- switch0phy2_topaz: switch0phy2@12 {
+ switch0phy2_topaz: ethernet-phy@12 {
reg = <0x12>;
};

- switch0phy3_topaz: switch0phy3@13 {
+ switch0phy3_topaz: ethernet-phy@13 {
reg = <0x13>;
};

- switch0phy4_topaz: switch0phy4@14 {
+ switch0phy4_topaz: ethernet-phy@14 {
reg = <0x14>;
};
};
@@ -497,6 +504,7 @@ port@5 {
};
};

+ /* NOTE: this node name is ABI, don't change it! */
switch1@11 {
compatible = "marvell,mv88e6190";
reg = <0x11>;
@@ -509,35 +517,35 @@ mdio {
#address-cells = <1>;
#size-cells = <0>;

- switch1phy1: switch1phy1@1 {
+ switch1phy1: ethernet-phy@1 {
reg = <0x1>;
};

- switch1phy2: switch1phy2@2 {
+ switch1phy2: ethernet-phy@2 {
reg = <0x2>;
};

- switch1phy3: switch1phy3@3 {
+ switch1phy3: ethernet-phy@3 {
reg = <0x3>;
};

- switch1phy4: switch1phy4@4 {
+ switch1phy4: ethernet-phy@4 {
reg = <0x4>;
};

- switch1phy5: switch1phy5@5 {
+ switch1phy5: ethernet-phy@5 {
reg = <0x5>;
};

- switch1phy6: switch1phy6@6 {
+ switch1phy6: ethernet-phy@6 {
reg = <0x6>;
};

- switch1phy7: switch1phy7@7 {
+ switch1phy7: ethernet-phy@7 {
reg = <0x7>;
};

- switch1phy8: switch1phy8@8 {
+ switch1phy8: ethernet-phy@8 {
reg = <0x8>;
};
};
@@ -622,6 +630,7 @@ port-sfp@a {
};
};

+ /* NOTE: this node name is ABI, don't change it! */
switch1@2 {
compatible = "marvell,mv88e6085";
reg = <0x2>;
@@ -634,19 +643,19 @@ mdio {
#address-cells = <1>;
#size-cells = <0>;

- switch1phy1_topaz: switch1phy1@11 {
+ switch1phy1_topaz: ethernet-phy@11 {
reg = <0x11>;
};

- switch1phy2_topaz: switch1phy2@12 {
+ switch1phy2_topaz: ethernet-phy@12 {
reg = <0x12>;
};

- switch1phy3_topaz: switch1phy3@13 {
+ switch1phy3_topaz: ethernet-phy@13 {
reg = <0x13>;
};

- switch1phy4_topaz: switch1phy4@14 {
+ switch1phy4_topaz: ethernet-phy@14 {
reg = <0x14>;
};
};
@@ -689,6 +698,7 @@ port@5 {
};
};

+ /* NOTE: this node name is ABI, don't change it! */
switch2@12 {
compatible = "marvell,mv88e6190";
reg = <0x12>;
@@ -701,35 +711,35 @@ mdio {
#address-cells = <1>;
#size-cells = <0>;

- switch2phy1: switch2phy1@1 {
+ switch2phy1: ethernet-phy@1 {
reg = <0x1>;
};

- switch2phy2: switch2phy2@2 {
+ switch2phy2: ethernet-phy@2 {
reg = <0x2>;
};

- switch2phy3: switch2phy3@3 {
+ switch2phy3: ethernet-phy@3 {
reg = <0x3>;
};

- switch2phy4: switch2phy4@4 {
+ switch2phy4: ethernet-phy@4 {
reg = <0x4>;
};

- switch2phy5: switch2phy5@5 {
+ switch2phy5: ethernet-phy@5 {
reg = <0x5>;
};

- switch2phy6: switch2phy6@6 {
+ switch2phy6: ethernet-phy@6 {
reg = <0x6>;
};

- switch2phy7: switch2phy7@7 {
+ switch2phy7: ethernet-phy@7 {
reg = <0x7>;
};

- switch2phy8: switch2phy8@8 {
+ switch2phy8: ethernet-phy@8 {
reg = <0x8>;
};
};
@@ -805,6 +815,7 @@ port-sfp@a {
};
};

+ /* NOTE: this node name is ABI, don't change it! */
switch2@2 {
compatible = "marvell,mv88e6085";
reg = <0x2>;
@@ -817,19 +828,19 @@ mdio {
#address-cells = <1>;
#size-cells = <0>;

- switch2phy1_topaz: switch2phy1@11 {
+ switch2phy1_topaz: ethernet-phy@11 {
reg = <0x11>;
};

- switch2phy2_topaz: switch2phy2@12 {
+ switch2phy2_topaz: ethernet-phy@12 {
reg = <0x12>;
};

- switch2phy3_topaz: switch2phy3@13 {
+ switch2phy3_topaz: ethernet-phy@13 {
reg = <0x13>;
};

- switch2phy4_topaz: switch2phy4@14 {
+ switch2phy4_topaz: ethernet-phy@14 {
reg = <0x14>;
};
};
diff --git a/arch/arm64/boot/dts/marvell/armada-7040-mochabin.dts b/arch/arm64/boot/dts/marvell/armada-7040-mochabin.dts
index 48202810bf78..40b7ee7ead72 100644
--- a/arch/arm64/boot/dts/marvell/armada-7040-mochabin.dts
+++ b/arch/arm64/boot/dts/marvell/armada-7040-mochabin.dts
@@ -301,10 +301,8 @@ eth2phy: ethernet-phy@1 {
};

/* 88E6141 Topaz switch */
- switch: switch@3 {
+ switch: ethernet-switch@3 {
compatible = "marvell,mv88e6085";
- #address-cells = <1>;
- #size-cells = <0>;
reg = <3>;

pinctrl-names = "default";
@@ -314,35 +312,35 @@ switch: switch@3 {
interrupt-parent = <&cp0_gpio1>;
interrupts = <1 IRQ_TYPE_LEVEL_LOW>;

- ports {
+ ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;

- swport1: port@1 {
+ swport1: ethernet-port@1 {
reg = <1>;
label = "lan0";
phy-handle = <&swphy1>;
};

- swport2: port@2 {
+ swport2: ethernet-port@2 {
reg = <2>;
label = "lan1";
phy-handle = <&swphy2>;
};

- swport3: port@3 {
+ swport3: ethernet-port@3 {
reg = <3>;
label = "lan2";
phy-handle = <&swphy3>;
};

- swport4: port@4 {
+ swport4: ethernet-port@4 {
reg = <4>;
label = "lan3";
phy-handle = <&swphy4>;
};

- port@5 {
+ ethernet-port@5 {
reg = <5>;
label = "cpu";
ethernet = <&cp0_eth1>;
@@ -355,19 +353,19 @@ mdio {
#address-cells = <1>;
#size-cells = <0>;

- swphy1: swphy1@17 {
+ swphy1: ethernet-phy@17 {
reg = <17>;
};

- swphy2: swphy2@18 {
+ swphy2: ethernet-phy@18 {
reg = <18>;
};

- swphy3: swphy3@19 {
+ swphy3: ethernet-phy@19 {
reg = <19>;
};

- swphy4: swphy4@20 {
+ swphy4: ethernet-phy@20 {
reg = <20>;
};
};
diff --git a/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts b/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts
index 4125202028c8..67892f0d2863 100644
--- a/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts
+++ b/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts
@@ -497,42 +497,42 @@ ge_phy: ethernet-phy@0 {
reset-deassert-us = <10000>;
};

- switch0: switch0@4 {
+ switch0: ethernet-switch@4 {
compatible = "marvell,mv88e6085";
reg = <4>;
pinctrl-names = "default";
pinctrl-0 = <&cp1_switch_reset_pins>;
reset-gpios = <&cp1_gpio1 24 GPIO_ACTIVE_LOW>;

- ports {
+ ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;

- port@1 {
+ ethernet-port@1 {
reg = <1>;
label = "lan2";
phy-handle = <&switch0phy0>;
};

- port@2 {
+ ethernet-port@2 {
reg = <2>;
label = "lan1";
phy-handle = <&switch0phy1>;
};

- port@3 {
+ ethernet-port@3 {
reg = <3>;
label = "lan4";
phy-handle = <&switch0phy2>;
};

- port@4 {
+ ethernet-port@4 {
reg = <4>;
label = "lan3";
phy-handle = <&switch0phy3>;
};

- port@5 {
+ ethernet-port@5 {
reg = <5>;
label = "cpu";
ethernet = <&cp1_eth2>;
@@ -545,19 +545,19 @@ mdio {
#address-cells = <1>;
#size-cells = <0>;

- switch0phy0: switch0phy0@11 {
+ switch0phy0: ethernet-phy@11 {
reg = <0x11>;
};

- switch0phy1: switch0phy1@12 {
+ switch0phy1: ethernet-phy@12 {
reg = <0x12>;
};

- switch0phy2: switch0phy2@13 {
+ switch0phy2: ethernet-phy@13 {
reg = <0x13>;
};

- switch0phy3: switch0phy3@14 {
+ switch0phy3: ethernet-phy@14 {
reg = <0x14>;
};
};
diff --git a/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi b/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi
index 47d45ff3d6f5..6fcc34f7b464 100644
--- a/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi
+++ b/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi
@@ -207,11 +207,9 @@ phy0: ethernet-phy@0 {
reg = <0>;
};

- switch6: switch0@6 {
+ switch6: ethernet-switch@6 {
/* Actual device is MV88E6393X */
compatible = "marvell,mv88e6190";
- #address-cells = <1>;
- #size-cells = <0>;
reg = <6>;
interrupt-parent = <&cp0_gpio1>;
interrupts = <28 IRQ_TYPE_LEVEL_LOW>;
@@ -220,59 +218,59 @@ switch6: switch0@6 {

dsa,member = <0 0>;

- ports {
+ ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;

- port@1 {
+ ethernet-port@1 {
reg = <1>;
label = "p1";
phy-handle = <&switch0phy1>;
};

- port@2 {
+ ethernet-port@2 {
reg = <2>;
label = "p2";
phy-handle = <&switch0phy2>;
};

- port@3 {
+ ethernet-port@3 {
reg = <3>;
label = "p3";
phy-handle = <&switch0phy3>;
};

- port@4 {
+ ethernet-port@4 {
reg = <4>;
label = "p4";
phy-handle = <&switch0phy4>;
};

- port@5 {
+ ethernet-port@5 {
reg = <5>;
label = "p5";
phy-handle = <&switch0phy5>;
};

- port@6 {
+ ethernet-port@6 {
reg = <6>;
label = "p6";
phy-handle = <&switch0phy6>;
};

- port@7 {
+ ethernet-port@7 {
reg = <7>;
label = "p7";
phy-handle = <&switch0phy7>;
};

- port@8 {
+ ethernet-port@8 {
reg = <8>;
label = "p8";
phy-handle = <&switch0phy8>;
};

- port@9 {
+ ethernet-port@9 {
reg = <9>;
label = "p9";
phy-mode = "10gbase-r";
@@ -280,7 +278,7 @@ port@9 {
managed = "in-band-status";
};

- port@a {
+ ethernet-port@a {
reg = <10>;
ethernet = <&cp0_eth0>;
phy-mode = "10gbase-r";
@@ -293,35 +291,35 @@ mdio {
#address-cells = <1>;
#size-cells = <0>;

- switch0phy1: switch0phy1@1 {
+ switch0phy1: ethernet-phy@1 {
reg = <0x1>;
};

- switch0phy2: switch0phy2@2 {
+ switch0phy2: ethernet-phy@2 {
reg = <0x2>;
};

- switch0phy3: switch0phy3@3 {
+ switch0phy3: ethernet-phy@3 {
reg = <0x3>;
};

- switch0phy4: switch0phy4@4 {
+ switch0phy4: ethernet-phy@4 {
reg = <0x4>;
};

- switch0phy5: switch0phy5@5 {
+ switch0phy5: ethernet-phy@5 {
reg = <0x5>;
};

- switch0phy6: switch0phy6@6 {
+ switch0phy6: ethernet-phy@6 {
reg = <0x6>;
};

- switch0phy7: switch0phy7@7 {
+ switch0phy7: ethernet-phy@7 {
reg = <0x7>;
};

- switch0phy8: switch0phy8@8 {
+ switch0phy8: ethernet-phy@8 {
reg = <0x8>;
};
};

--
2.34.1

2023-11-27 15:52:21

by Linus Walleij

[permalink] [raw]
Subject: [PATCH v9 1/3] ARM: dts: marvell: Fix some common switch mistakes

Fix some errors in the Marvell MV88E6xxx switch descriptions:
- The top node had no address size or cells.
- switch0@0 is not OK, should be ethernet-switch@0.
- The ports node should be named ethernet-ports
- The ethernet-ports node should have port@0 etc children, no
plural "ports" in the children.
- Ports should be named ethernet-port@0 etc
- PHYs should be named ethernet-phy@0 etc

This serves as an example of fixes needed for introducing a
schema for the bindings, but the patch can simply be applied.

Reviewed-by: Andrew Lunn <[email protected]>
Reviewed-by: Florian Fainelli <[email protected]>
Signed-off-by: Linus Walleij <[email protected]>
---
arch/arm/boot/dts/marvell/armada-370-rd.dts | 24 ++++++------
.../dts/marvell/armada-381-netgear-gs110emx.dts | 44 +++++++++++-----------
.../dts/marvell/armada-385-clearfog-gtr-l8.dts | 38 +++++++++----------
.../dts/marvell/armada-385-clearfog-gtr-s4.dts | 22 +++++------
arch/arm/boot/dts/marvell/armada-385-linksys.dtsi | 18 ++++-----
.../boot/dts/marvell/armada-385-turris-omnia.dts | 20 +++++-----
arch/arm/boot/dts/marvell/armada-388-clearfog.dts | 20 +++++-----
.../boot/dts/marvell/armada-xp-linksys-mamba.dts | 18 ++++-----
8 files changed, 96 insertions(+), 108 deletions(-)

diff --git a/arch/arm/boot/dts/marvell/armada-370-rd.dts b/arch/arm/boot/dts/marvell/armada-370-rd.dts
index b459a670f615..1b241da11e94 100644
--- a/arch/arm/boot/dts/marvell/armada-370-rd.dts
+++ b/arch/arm/boot/dts/marvell/armada-370-rd.dts
@@ -149,39 +149,37 @@ led@0 {
};
};

- switch: switch@10 {
+ switch: ethernet-switch@10 {
compatible = "marvell,mv88e6085";
- #address-cells = <1>;
- #size-cells = <0>;
reg = <0x10>;
interrupt-controller;
#interrupt-cells = <2>;

- ports {
+ ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;

- port@0 {
+ ethernet-port@0 {
reg = <0>;
label = "lan0";
};

- port@1 {
+ ethernet-port@1 {
reg = <1>;
label = "lan1";
};

- port@2 {
+ ethernet-port@2 {
reg = <2>;
label = "lan2";
};

- port@3 {
+ ethernet-port@3 {
reg = <3>;
label = "lan3";
};

- port@5 {
+ ethernet-port@5 {
reg = <5>;
ethernet = <&eth1>;
phy-mode = "rgmii-id";
@@ -196,25 +194,25 @@ mdio {
#address-cells = <1>;
#size-cells = <0>;

- switchphy0: switchphy@0 {
+ switchphy0: ethernet-phy@0 {
reg = <0>;
interrupt-parent = <&switch>;
interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
};

- switchphy1: switchphy@1 {
+ switchphy1: ethernet-phy@1 {
reg = <1>;
interrupt-parent = <&switch>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
};

- switchphy2: switchphy@2 {
+ switchphy2: ethernet-phy@2 {
reg = <2>;
interrupt-parent = <&switch>;
interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
};

- switchphy3: switchphy@3 {
+ switchphy3: ethernet-phy@3 {
reg = <3>;
interrupt-parent = <&switch>;
interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm/boot/dts/marvell/armada-381-netgear-gs110emx.dts b/arch/arm/boot/dts/marvell/armada-381-netgear-gs110emx.dts
index f4c4b213ef4e..5baf83e5253d 100644
--- a/arch/arm/boot/dts/marvell/armada-381-netgear-gs110emx.dts
+++ b/arch/arm/boot/dts/marvell/armada-381-netgear-gs110emx.dts
@@ -77,51 +77,49 @@ &mdio {
pinctrl-0 = <&mdio_pins>;
status = "okay";

- switch@0 {
+ ethernet-switch@0 {
compatible = "marvell,mv88e6190";
- #address-cells = <1>;
#interrupt-cells = <2>;
interrupt-controller;
interrupt-parent = <&gpio1>;
interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
pinctrl-0 = <&switch_interrupt_pins>;
pinctrl-names = "default";
- #size-cells = <0>;
reg = <0>;

mdio {
#address-cells = <1>;
#size-cells = <0>;

- switch0phy1: switch0phy1@1 {
+ switch0phy1: ethernet-phy@1 {
reg = <0x1>;
};

- switch0phy2: switch0phy2@2 {
+ switch0phy2: ethernet-phy@2 {
reg = <0x2>;
};

- switch0phy3: switch0phy3@3 {
+ switch0phy3: ethernet-phy@3 {
reg = <0x3>;
};

- switch0phy4: switch0phy4@4 {
+ switch0phy4: ethernet-phy@4 {
reg = <0x4>;
};

- switch0phy5: switch0phy5@5 {
+ switch0phy5: ethernet-phy@5 {
reg = <0x5>;
};

- switch0phy6: switch0phy6@6 {
+ switch0phy6: ethernet-phy@6 {
reg = <0x6>;
};

- switch0phy7: switch0phy7@7 {
+ switch0phy7: ethernet-phy@7 {
reg = <0x7>;
};

- switch0phy8: switch0phy8@8 {
+ switch0phy8: ethernet-phy@8 {
reg = <0x8>;
};
};
@@ -142,11 +140,11 @@ phy2: ethernet-phy@c {
};
};

- ports {
+ ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;

- port@0 {
+ ethernet-port@0 {
ethernet = <&eth0>;
phy-mode = "rgmii";
reg = <0>;
@@ -158,55 +156,55 @@ fixed-link {
};
};

- port@1 {
+ ethernet-port@1 {
label = "lan1";
phy-handle = <&switch0phy1>;
reg = <1>;
};

- port@2 {
+ ethernet-port@2 {
label = "lan2";
phy-handle = <&switch0phy2>;
reg = <2>;
};

- port@3 {
+ ethernet-port@3 {
label = "lan3";
phy-handle = <&switch0phy3>;
reg = <3>;
};

- port@4 {
+ ethernet-port@4 {
label = "lan4";
phy-handle = <&switch0phy4>;
reg = <4>;
};

- port@5 {
+ ethernet-port@5 {
label = "lan5";
phy-handle = <&switch0phy5>;
reg = <5>;
};

- port@6 {
+ ethernet-port@6 {
label = "lan6";
phy-handle = <&switch0phy6>;
reg = <6>;
};

- port@7 {
+ ethernet-port@7 {
label = "lan7";
phy-handle = <&switch0phy7>;
reg = <7>;
};

- port@8 {
+ ethernet-port@8 {
label = "lan8";
phy-handle = <&switch0phy8>;
reg = <8>;
};

- port@9 {
+ ethernet-port@9 {
/* 88X3310P external phy */
label = "lan9";
phy-handle = <&phy1>;
@@ -214,7 +212,7 @@ port@9 {
reg = <9>;
};

- port@a {
+ ethernet-port@a {
/* 88X3310P external phy */
label = "lan10";
phy-handle = <&phy2>;
diff --git a/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-l8.dts b/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-l8.dts
index 1990f7d0cc79..1707d1b01545 100644
--- a/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-l8.dts
+++ b/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-l8.dts
@@ -7,66 +7,66 @@ / {
};

&mdio {
- switch0: switch0@4 {
+ switch0: ethernet-switch@4 {
compatible = "marvell,mv88e6190";
reg = <4>;
pinctrl-names = "default";
pinctrl-0 = <&cf_gtr_switch_reset_pins>;
reset-gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;

- ports {
+ ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;

- port@1 {
+ ethernet-port@1 {
reg = <1>;
label = "lan8";
phy-handle = <&switch0phy0>;
};

- port@2 {
+ ethernet-port@2 {
reg = <2>;
label = "lan7";
phy-handle = <&switch0phy1>;
};

- port@3 {
+ ethernet-port@3 {
reg = <3>;
label = "lan6";
phy-handle = <&switch0phy2>;
};

- port@4 {
+ ethernet-port@4 {
reg = <4>;
label = "lan5";
phy-handle = <&switch0phy3>;
};

- port@5 {
+ ethernet-port@5 {
reg = <5>;
label = "lan4";
phy-handle = <&switch0phy4>;
};

- port@6 {
+ ethernet-port@6 {
reg = <6>;
label = "lan3";
phy-handle = <&switch0phy5>;
};

- port@7 {
+ ethernet-port@7 {
reg = <7>;
label = "lan2";
phy-handle = <&switch0phy6>;
};

- port@8 {
+ ethernet-port@8 {
reg = <8>;
label = "lan1";
phy-handle = <&switch0phy7>;
};

- port@10 {
+ ethernet-port@10 {
reg = <10>;
phy-mode = "2500base-x";

@@ -83,35 +83,35 @@ mdio {
#address-cells = <1>;
#size-cells = <0>;

- switch0phy0: switch0phy0@1 {
+ switch0phy0: ethernet-phy@1 {
reg = <0x1>;
};

- switch0phy1: switch0phy1@2 {
+ switch0phy1: ethernet-phy@2 {
reg = <0x2>;
};

- switch0phy2: switch0phy2@3 {
+ switch0phy2: ethernet-phy@3 {
reg = <0x3>;
};

- switch0phy3: switch0phy3@4 {
+ switch0phy3: ethernet-phy@4 {
reg = <0x4>;
};

- switch0phy4: switch0phy4@5 {
+ switch0phy4: ethernet-phy@5 {
reg = <0x5>;
};

- switch0phy5: switch0phy5@6 {
+ switch0phy5: ethernet-phy@6 {
reg = <0x6>;
};

- switch0phy6: switch0phy6@7 {
+ switch0phy6: ethernet-phy@7 {
reg = <0x7>;
};

- switch0phy7: switch0phy7@8 {
+ switch0phy7: ethernet-phy@8 {
reg = <0x8>;
};
};
diff --git a/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-s4.dts b/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-s4.dts
index b795ad573891..a7678a784c18 100644
--- a/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-s4.dts
+++ b/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-s4.dts
@@ -11,42 +11,42 @@ &sfp0 {
};

&mdio {
- switch0: switch0@4 {
+ switch0: ethernet-switch@4 {
compatible = "marvell,mv88e6085";
reg = <4>;
pinctrl-names = "default";
pinctrl-0 = <&cf_gtr_switch_reset_pins>;
reset-gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;

- ports {
+ ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;

- port@1 {
+ ethernet-port@1 {
reg = <1>;
label = "lan2";
phy-handle = <&switch0phy0>;
};

- port@2 {
+ ethernet-port@2 {
reg = <2>;
label = "lan1";
phy-handle = <&switch0phy1>;
};

- port@3 {
+ ethernet-port@3 {
reg = <3>;
label = "lan4";
phy-handle = <&switch0phy2>;
};

- port@4 {
+ ethernet-port@4 {
reg = <4>;
label = "lan3";
phy-handle = <&switch0phy3>;
};

- port@5 {
+ ethernet-port@5 {
reg = <5>;
phy-mode = "2500base-x";
ethernet = <&eth1>;
@@ -63,19 +63,19 @@ mdio {
#address-cells = <1>;
#size-cells = <0>;

- switch0phy0: switch0phy0@11 {
+ switch0phy0: ethernet-phy@11 {
reg = <0x11>;
};

- switch0phy1: switch0phy1@12 {
+ switch0phy1: ethernet-phy@12 {
reg = <0x12>;
};

- switch0phy2: switch0phy2@13 {
+ switch0phy2: ethernet-phy@13 {
reg = <0x13>;
};

- switch0phy3: switch0phy3@14 {
+ switch0phy3: ethernet-phy@14 {
reg = <0x14>;
};
};
diff --git a/arch/arm/boot/dts/marvell/armada-385-linksys.dtsi b/arch/arm/boot/dts/marvell/armada-385-linksys.dtsi
index fc8216fd9f60..4116ed60f709 100644
--- a/arch/arm/boot/dts/marvell/armada-385-linksys.dtsi
+++ b/arch/arm/boot/dts/marvell/armada-385-linksys.dtsi
@@ -158,42 +158,40 @@ nand: nand@0 {
&mdio {
status = "okay";

- switch@0 {
+ ethernet-switch@0 {
compatible = "marvell,mv88e6085";
- #address-cells = <1>;
- #size-cells = <0>;
reg = <0>;

- ports {
+ ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;

- port@0 {
+ ethernet-port@0 {
reg = <0>;
label = "lan4";
};

- port@1 {
+ ethernet-port@1 {
reg = <1>;
label = "lan3";
};

- port@2 {
+ ethernet-port@2 {
reg = <2>;
label = "lan2";
};

- port@3 {
+ ethernet-port@3 {
reg = <3>;
label = "lan1";
};

- port@4 {
+ ethernet-port@4 {
reg = <4>;
label = "wan";
};

- port@5 {
+ ethernet-port@5 {
reg = <5>;
phy-mode = "sgmii";
ethernet = <&eth2>;
diff --git a/arch/arm/boot/dts/marvell/armada-385-turris-omnia.dts b/arch/arm/boot/dts/marvell/armada-385-turris-omnia.dts
index 2d8d319bec83..7b755bb4e4e7 100644
--- a/arch/arm/boot/dts/marvell/armada-385-turris-omnia.dts
+++ b/arch/arm/boot/dts/marvell/armada-385-turris-omnia.dts
@@ -435,12 +435,10 @@ phy1: ethernet-phy@1 {
};

/* Switch MV88E6176 at address 0x10 */
- switch@10 {
+ ethernet-switch@10 {
pinctrl-names = "default";
pinctrl-0 = <&swint_pins>;
compatible = "marvell,mv88e6085";
- #address-cells = <1>;
- #size-cells = <0>;

dsa,member = <0 0>;
reg = <0x10>;
@@ -448,36 +446,36 @@ switch@10 {
interrupt-parent = <&gpio1>;
interrupts = <13 IRQ_TYPE_LEVEL_LOW>;

- ports {
+ ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;

- ports@0 {
+ ethernet-port@0 {
reg = <0>;
label = "lan0";
};

- ports@1 {
+ ethernet-port@1 {
reg = <1>;
label = "lan1";
};

- ports@2 {
+ ethernet-port@2 {
reg = <2>;
label = "lan2";
};

- ports@3 {
+ ethernet-port@3 {
reg = <3>;
label = "lan3";
};

- ports@4 {
+ ethernet-port@4 {
reg = <4>;
label = "lan4";
};

- ports@5 {
+ ethernet-port@5 {
reg = <5>;
ethernet = <&eth1>;
phy-mode = "rgmii-id";
@@ -488,7 +486,7 @@ fixed-link {
};
};

- ports@6 {
+ ethernet-port@6 {
reg = <6>;
ethernet = <&eth0>;
phy-mode = "rgmii-id";
diff --git a/arch/arm/boot/dts/marvell/armada-388-clearfog.dts b/arch/arm/boot/dts/marvell/armada-388-clearfog.dts
index 32c569df142f..3290ccad2374 100644
--- a/arch/arm/boot/dts/marvell/armada-388-clearfog.dts
+++ b/arch/arm/boot/dts/marvell/armada-388-clearfog.dts
@@ -92,44 +92,42 @@ pcie2-0-w-disable-hog {
&mdio {
status = "okay";

- switch@4 {
+ ethernet-switch@4 {
compatible = "marvell,mv88e6085";
- #address-cells = <1>;
- #size-cells = <0>;
reg = <4>;
pinctrl-0 = <&clearfog_dsa0_clk_pins &clearfog_dsa0_pins>;
pinctrl-names = "default";

- ports {
+ ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;

- port@0 {
+ ethernet-port@0 {
reg = <0>;
label = "lan5";
};

- port@1 {
+ ethernet-port@1 {
reg = <1>;
label = "lan4";
};

- port@2 {
+ ethernet-port@2 {
reg = <2>;
label = "lan3";
};

- port@3 {
+ ethernet-port@3 {
reg = <3>;
label = "lan2";
};

- port@4 {
+ ethernet-port@4 {
reg = <4>;
label = "lan1";
};

- port@5 {
+ ethernet-port@5 {
reg = <5>;
ethernet = <&eth1>;
phy-mode = "1000base-x";
@@ -140,7 +138,7 @@ fixed-link {
};
};

- port@6 {
+ ethernet-port@6 {
/* 88E1512 external phy */
reg = <6>;
label = "lan6";
diff --git a/arch/arm/boot/dts/marvell/armada-xp-linksys-mamba.dts b/arch/arm/boot/dts/marvell/armada-xp-linksys-mamba.dts
index 7a0614fd0c93..ea859f7ea042 100644
--- a/arch/arm/boot/dts/marvell/armada-xp-linksys-mamba.dts
+++ b/arch/arm/boot/dts/marvell/armada-xp-linksys-mamba.dts
@@ -265,42 +265,40 @@ flash@0 {
&mdio {
status = "okay";

- switch@0 {
+ ethernet-switch@0 {
compatible = "marvell,mv88e6085";
- #address-cells = <1>;
- #size-cells = <0>;
reg = <0>;

- ports {
+ ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;

- port@0 {
+ ethernet-port@0 {
reg = <0>;
label = "lan4";
};

- port@1 {
+ ethernet-port@1 {
reg = <1>;
label = "lan3";
};

- port@2 {
+ ethernet-port@2 {
reg = <2>;
label = "lan2";
};

- port@3 {
+ ethernet-port@3 {
reg = <3>;
label = "lan1";
};

- port@4 {
+ ethernet-port@4 {
reg = <4>;
label = "internet";
};

- port@5 {
+ ethernet-port@5 {
reg = <5>;
phy-mode = "rgmii-id";
ethernet = <&eth0>;

--
2.34.1

2023-11-27 15:52:29

by Linus Walleij

[permalink] [raw]
Subject: [PATCH v9 3/3] ARM64: dts: Add special compatibles for the Turris Mox

These special compatibles are added to the Marvell Armada 3720
Turris Mox in order to be able to special-case and avoid
warnings on the non-standard nodenames that are ABI on this
one board due to being used in deployed versions of U-Boot.

Signed-off-by: Linus Walleij <[email protected]>
---
arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts b/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts
index 66cd98b67744..a89747d2a600 100644
--- a/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts
+++ b/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts
@@ -312,7 +312,7 @@ phy1: ethernet-phy@1 {
* Also do not touch the "ports" or "port@n" nodes. These are also ABI.
*/
switch0@10 {
- compatible = "marvell,mv88e6190";
+ compatible = "marvell,turris-mox-mv88e6190", "marvell,mv88e6190";
reg = <0x10>;
dsa,member = <0 0>;
interrupt-parent = <&moxtet>;
@@ -438,7 +438,7 @@ port-sfp@a {

/* NOTE: this node name is ABI, don't change it! */
switch0@2 {
- compatible = "marvell,mv88e6085";
+ compatible = "marvell,turris-mox-mv88e6085", "marvell,mv88e6085";
reg = <0x2>;
dsa,member = <0 0>;
interrupt-parent = <&moxtet>;
@@ -506,7 +506,7 @@ port@5 {

/* NOTE: this node name is ABI, don't change it! */
switch1@11 {
- compatible = "marvell,mv88e6190";
+ compatible = "marvell,turris-mox-mv88e6190", "marvell,mv88e6190";
reg = <0x11>;
dsa,member = <0 1>;
interrupt-parent = <&moxtet>;
@@ -632,7 +632,7 @@ port-sfp@a {

/* NOTE: this node name is ABI, don't change it! */
switch1@2 {
- compatible = "marvell,mv88e6085";
+ compatible = "marvell,turris-mox-mv88e6085", "marvell,mv88e6085";
reg = <0x2>;
dsa,member = <0 1>;
interrupt-parent = <&moxtet>;
@@ -700,7 +700,7 @@ port@5 {

/* NOTE: this node name is ABI, don't change it! */
switch2@12 {
- compatible = "marvell,mv88e6190";
+ compatible = "marvell,turris-mox-mv88e6190", "marvell,mv88e6190";
reg = <0x12>;
dsa,member = <0 2>;
interrupt-parent = <&moxtet>;
@@ -817,7 +817,7 @@ port-sfp@a {

/* NOTE: this node name is ABI, don't change it! */
switch2@2 {
- compatible = "marvell,mv88e6085";
+ compatible = "marvell,turris-mox-mv88e6085", "marvell,mv88e6085";
reg = <0x2>;
dsa,member = <0 2>;
interrupt-parent = <&moxtet>;

--
2.34.1

2023-11-27 22:13:04

by Andrew Lunn

[permalink] [raw]
Subject: Re: [PATCH v9 3/3] ARM64: dts: Add special compatibles for the Turris Mox

On Mon, Nov 27, 2023 at 04:51:02PM +0100, Linus Walleij wrote:
> These special compatibles are added to the Marvell Armada 3720
> Turris Mox in order to be able to special-case and avoid
> warnings on the non-standard nodenames that are ABI on this
> one board due to being used in deployed versions of U-Boot.
>
> Signed-off-by: Linus Walleij <[email protected]>

Reviewed-by: Andrew Lunn <[email protected]>

Andrew

2023-12-08 15:12:22

by Gregory CLEMENT

[permalink] [raw]
Subject: Re: [PATCH v9 1/3] ARM: dts: marvell: Fix some common switch mistakes

Linus Walleij <[email protected]> writes:

> Fix some errors in the Marvell MV88E6xxx switch descriptions:
> - The top node had no address size or cells.
> - switch0@0 is not OK, should be ethernet-switch@0.
> - The ports node should be named ethernet-ports
> - The ethernet-ports node should have port@0 etc children, no
> plural "ports" in the children.
> - Ports should be named ethernet-port@0 etc
> - PHYs should be named ethernet-phy@0 etc
>
> This serves as an example of fixes needed for introducing a
> schema for the bindings, but the patch can simply be applied.
>
> Reviewed-by: Andrew Lunn <[email protected]>
> Reviewed-by: Florian Fainelli <[email protected]>
> Signed-off-by: Linus Walleij <[email protected]>

Applied on mvebu/dt

Thanks,

Gregory

--
Gregory Clement, Bootlin
Embedded Linux and Kernel engineering
http://bootlin.com

2023-12-08 15:12:57

by Gregory CLEMENT

[permalink] [raw]
Subject: Re: [PATCH v9 2/3] ARM64: dts: marvell: Fix some common switch mistakes

Linus Walleij <[email protected]> writes:

> Fix some errors in the Marvell MV88E6xxx switch descriptions:
> - The top node had no address size or cells.
> - switch0@0 is not OK, should be ethernet-switch@0.
> - ports should be ethernet-ports
> - port@0 should be ethernet-port@0
> - PHYs should be named ethernet-phy@
>
> Reviewed-by: Andrew Lunn <[email protected]>
> Reviewed-by: Florian Fainelli <[email protected]>
> Signed-off-by: Linus Walleij <[email protected]>

Applied on mvebu/dt64

Thanks,

Gregory

> ---
> .../dts/marvell/armada-3720-espressobin-ultra.dts | 14 ++--
> .../boot/dts/marvell/armada-3720-espressobin.dtsi | 20 +++--
> .../boot/dts/marvell/armada-3720-gl-mv1000.dts | 20 +++--
> .../boot/dts/marvell/armada-3720-turris-mox.dts | 85 ++++++++++++----------
> .../boot/dts/marvell/armada-7040-mochabin.dts | 24 +++---
> .../dts/marvell/armada-8040-clearfog-gt-8k.dts | 22 +++---
> arch/arm64/boot/dts/marvell/cn9130-crb.dtsi | 42 +++++------
> 7 files changed, 115 insertions(+), 112 deletions(-)

--
Gregory Clement, Bootlin
Embedded Linux and Kernel engineering
http://bootlin.com

2023-12-08 15:13:23

by Gregory CLEMENT

[permalink] [raw]
Subject: Re: [PATCH v9 3/3] ARM64: dts: Add special compatibles for the Turris Mox

Linus Walleij <[email protected]> writes:

> These special compatibles are added to the Marvell Armada 3720
> Turris Mox in order to be able to special-case and avoid
> warnings on the non-standard nodenames that are ABI on this
> one board due to being used in deployed versions of U-Boot.
>
> Signed-off-by: Linus Walleij <[email protected]>

Applied on mvebu/dt64

Thanks,

Gregory
> ---
> arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts | 12 ++++++------
> 1 file changed, 6 insertions(+), 6 deletions(-)
--
Gregory Clement, Bootlin
Embedded Linux and Kernel engineering
http://bootlin.com