Hi all,
In commit
4ce937160ba0 ("irqchip/riscv-intc: Fix use of AIA interrupts 32-63 on riscv32")
Fixes tags
Fixes: bb7921cdea12 ("irqchip/riscv-intc: Add support for RISC-V AIA")
Fixes: e6bd9b966dc8 ("irqchip/riscv-intc: Fix low-level interrupt handler setup for AIA")
have this problem:
- Target SHA1s do not exist
Maybe you meant
Fixes: 3c46fc5b5507 ("irqchip/riscv-intc: Add support for RISC-V AIA")
Fixes: 678c607ecf8a ("irqchip/riscv-intc: Fix low-level interrupt handler setup for AIA")
--
Cheers,
Stephen Rothwell
On Fri, Mar 15 2024 at 08:09, Stephen Rothwell wrote:
> 4ce937160ba0 ("irqchip/riscv-intc: Fix use of AIA interrupts 32-63 on riscv32")
>
> Fixes tags
>
> Fixes: bb7921cdea12 ("irqchip/riscv-intc: Add support for RISC-V AIA")
> Fixes: e6bd9b966dc8 ("irqchip/riscv-intc: Fix low-level interrupt handler setup for AIA")
>
> have this problem:
>
> - Target SHA1s do not exist
>
> Maybe you meant
>
> Fixes: 3c46fc5b5507 ("irqchip/riscv-intc: Add support for RISC-V AIA")
> Fixes: 678c607ecf8a ("irqchip/riscv-intc: Fix low-level interrupt handler setup for AIA")
Indeed. Fixed now.
Thanks
tglx