* Hisaaki Shibata:
>> + /* According to the technical support people at Genesys Logic,
>> + * devices using their chips have problems transferring more
>> + * than 32 KB at a time. In practice people have found that
>> + * 64 KB works okay and that's what Windows does. But we'll
>> + * be conservative.
>> + */
>> + if (ss->pusb_dev->descriptor.idVendor == USB_VENDOR_ID_GENESYS)
>> + ss->htmplt->max_sectors = 64;
>
> + ss->htmplt.max_sectors = 64;
>
>> +
Christoph Biedl discovered that it's likely that a a similar
workaround is needed in the IEEE 1394 code:
http://sourceforge.net/mailarchive/forum.php?thread_id=5128811&forum_id=5389
On Wed, 22 Sep 2004, Florian Weimer wrote:
> * Hisaaki Shibata:
>
> >> + /* According to the technical support people at Genesys Logic,
> >> + * devices using their chips have problems transferring more
> >> + * than 32 KB at a time. In practice people have found that
> >> + * 64 KB works okay and that's what Windows does. But we'll
> >> + * be conservative.
> >> + */
> >> + if (ss->pusb_dev->descriptor.idVendor == USB_VENDOR_ID_GENESYS)
> >> + ss->htmplt->max_sectors = 64;
> >
> > + ss->htmplt.max_sectors = 64;
> >
> >> +
>
> Christoph Biedl discovered that it's likely that a a similar
> workaround is needed in the IEEE 1394 code:
>
> http://sourceforge.net/mailarchive/forum.php?thread_id=5128811&forum_id=5389
That change was not the important one. The important part of the patch
was this:
+ /* Genesys Logic interface chips need a 100us delay between
+ * the command phase and the data phase */
+ if (us->pusb_dev->descriptor.idVendor == USB_VENDOR_ID_GENESYS)
+ udelay(100);
This is what affects the timing problem, by adding a 100-microsecond
delay.
Alan Stern