Hi,
This patch aims to add NXP i.MX93 parallel display format configuration
DRM bridge driver support. i.MX93 mediamix blk-ctrl contains one
DISPLAY_MUX register which configures parallel display format by using
the "PARALLEL_DISP_FORMAT" field. i.MX93 LCDIF display controller's
parallel output connects with this piece of small logic to configure
parallel display format.
Patch 1/2 adds NXP i.MX93 parallel display format configuration dt-bindings.
Patch 2/2 adds NXP i.MX93 parallel display format configuration DRM bridge
driver support.
Liu Ying (2):
dt-bindings: display: bridge: Add NXP i.MX93 parallel display format
configuration
drm/bridge: imx: Add i.MX93 parallel display format configuration
support
.../display/bridge/nxp,imx93-pdfc.yaml | 78 +++++++
drivers/gpu/drm/bridge/imx/Kconfig | 8 +
drivers/gpu/drm/bridge/imx/Makefile | 1 +
drivers/gpu/drm/bridge/imx/imx93-pdfc.c | 209 ++++++++++++++++++
4 files changed, 296 insertions(+)
create mode 100644 Documentation/devicetree/bindings/display/bridge/nxp,imx93-pdfc.yaml
create mode 100644 drivers/gpu/drm/bridge/imx/imx93-pdfc.c
--
2.37.1
NXP i.MX93 mediamix blk-ctrl contains one DISPLAY_MUX register which
configures parallel display format by using the "PARALLEL_DISP_FORMAT"
field. Add device tree bindings for the display format configuration.
Signed-off-by: Liu Ying <[email protected]>
---
.../display/bridge/nxp,imx93-pdfc.yaml | 78 +++++++++++++++++++
1 file changed, 78 insertions(+)
create mode 100644 Documentation/devicetree/bindings/display/bridge/nxp,imx93-pdfc.yaml
diff --git a/Documentation/devicetree/bindings/display/bridge/nxp,imx93-pdfc.yaml b/Documentation/devicetree/bindings/display/bridge/nxp,imx93-pdfc.yaml
new file mode 100644
index 000000000000..a84bfb46b01d
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/bridge/nxp,imx93-pdfc.yaml
@@ -0,0 +1,78 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/bridge/nxp,imx93-pdfc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NXP i.MX93 Parallel Display Format Configuration
+
+maintainers:
+ - Liu Ying <[email protected]>
+
+description: |
+ The i.MX93 mediamix blk-ctrl contains one DISPLAY_MUX register which
+ configures parallel display format by using the "PARALLEL_DISP_FORMAT"
+ field.
+
+properties:
+ compatible:
+ const: nxp,imx93-pdfc
+
+ reg:
+ maxItems: 1
+
+ ports:
+ $ref: /schemas/graph.yaml#/properties/ports
+
+ properties:
+ port@0:
+ $ref: /schemas/graph.yaml#/properties/port
+ description: Input port node to receive pixel data.
+
+ port@1:
+ $ref: /schemas/graph.yaml#/properties/port
+ description: Output port node to downstream pixel data receivers.
+
+ required:
+ - port@0
+ - port@1
+
+required:
+ - compatible
+ - ports
+
+additionalProperties: false
+
+examples:
+ - |
+
+ blk-ctrl {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ bridge@60 {
+ compatible = "nxp,imx93-pdfc";
+ reg = <0x60 0x4>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ pdfc_from_lcdif: endpoint {
+ remote-endpoint = <&lcdif_to_pdfc>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ pdfc_to_panel: endpoint {
+ remote-endpoint = <&panel_from_pdfc>;
+ };
+ };
+ };
+ };
+ };
--
2.37.1
NXP i.MX93 mediamix blk-ctrl contains one DISPLAY_MUX register which
configures parallel display format by using the "PARALLEL_DISP_FORMAT"
field. Add a DRM bridge driver to support the display format configuration.
Signed-off-by: Liu Ying <[email protected]>
---
drivers/gpu/drm/bridge/imx/Kconfig | 8 +
drivers/gpu/drm/bridge/imx/Makefile | 1 +
drivers/gpu/drm/bridge/imx/imx93-pdfc.c | 209 ++++++++++++++++++++++++
3 files changed, 218 insertions(+)
create mode 100644 drivers/gpu/drm/bridge/imx/imx93-pdfc.c
diff --git a/drivers/gpu/drm/bridge/imx/Kconfig b/drivers/gpu/drm/bridge/imx/Kconfig
index 608f47f41bcd..adbd75a924d1 100644
--- a/drivers/gpu/drm/bridge/imx/Kconfig
+++ b/drivers/gpu/drm/bridge/imx/Kconfig
@@ -44,4 +44,12 @@ config DRM_IMX8QXP_PIXEL_LINK_TO_DPI
Choose this to enable pixel link to display pixel interface(PXL2DPI)
found in Freescale i.MX8qxp processor.
+config DRM_IMX93_PARALLEL_DISP_FMT_CONFIG
+ tristate "NXP i.MX93 parallel display format configuration"
+ depends on OF
+ select DRM_KMS_HELPER
+ help
+ Choose this to enable parallel display format configuration
+ found in NXP i.MX93 processor.
+
endif # ARCH_MXC || COMPILE_TEST
diff --git a/drivers/gpu/drm/bridge/imx/Makefile b/drivers/gpu/drm/bridge/imx/Makefile
index aa90ec8d5433..e88821733770 100644
--- a/drivers/gpu/drm/bridge/imx/Makefile
+++ b/drivers/gpu/drm/bridge/imx/Makefile
@@ -7,3 +7,4 @@ obj-$(CONFIG_DRM_IMX8QXP_LDB) += imx8qxp-ldb.o
obj-$(CONFIG_DRM_IMX8QXP_PIXEL_COMBINER) += imx8qxp-pixel-combiner.o
obj-$(CONFIG_DRM_IMX8QXP_PIXEL_LINK) += imx8qxp-pixel-link.o
obj-$(CONFIG_DRM_IMX8QXP_PIXEL_LINK_TO_DPI) += imx8qxp-pxl2dpi.o
+obj-$(CONFIG_DRM_IMX93_PARALLEL_DISP_FMT_CONFIG) += imx93-pdfc.o
diff --git a/drivers/gpu/drm/bridge/imx/imx93-pdfc.c b/drivers/gpu/drm/bridge/imx/imx93-pdfc.c
new file mode 100644
index 000000000000..a891b1f6743a
--- /dev/null
+++ b/drivers/gpu/drm/bridge/imx/imx93-pdfc.c
@@ -0,0 +1,209 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+/*
+ * Copyright 2022,2023 NXP
+ */
+
+#include <linux/media-bus-format.h>
+#include <linux/mfd/syscon.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/regmap.h>
+
+#include <drm/drm_atomic_state_helper.h>
+#include <drm/drm_bridge.h>
+#include <drm/drm_print.h>
+
+#define DRIVER_NAME "imx93_pdfc"
+
+#define DISPLAY_MUX 0x60
+#define PARALLEL_DISP_FORMAT 0x700
+
+enum imx93_pdfc_format {
+ RGB888_TO_RGB888 = 0x0,
+ RGB888_TO_RGB666 = 0x1 << 8,
+ RGB565_TO_RGB565 = 0x2 << 8,
+};
+
+struct imx93_pdfc {
+ struct drm_bridge bridge;
+ struct drm_bridge *next_bridge;
+ struct device *dev;
+ struct regmap *regmap;
+ u32 format;
+};
+
+static int imx93_pdfc_bridge_attach(struct drm_bridge *bridge,
+ enum drm_bridge_attach_flags flags)
+{
+ struct imx93_pdfc *pdfc = bridge->driver_private;
+
+ return drm_bridge_attach(bridge->encoder, pdfc->next_bridge, bridge, flags);
+}
+
+static void
+imx93_pdfc_bridge_atomic_enable(struct drm_bridge *bridge,
+ struct drm_bridge_state *old_bridge_state)
+{
+ struct imx93_pdfc *pdfc = bridge->driver_private;
+
+ regmap_update_bits(pdfc->regmap, DISPLAY_MUX, PARALLEL_DISP_FORMAT,
+ pdfc->format);
+}
+
+static const u32 imx93_pdfc_bus_output_fmts[] = {
+ MEDIA_BUS_FMT_RGB888_1X24,
+ MEDIA_BUS_FMT_RGB666_1X18,
+ MEDIA_BUS_FMT_RGB565_1X16,
+ MEDIA_BUS_FMT_FIXED
+};
+
+static bool imx93_pdfc_bus_output_fmt_supported(u32 fmt)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(imx93_pdfc_bus_output_fmts); i++) {
+ if (imx93_pdfc_bus_output_fmts[i] == fmt)
+ return true;
+ }
+
+ return false;
+}
+
+static u32 *
+imx93_pdfc_bridge_atomic_get_input_bus_fmts(struct drm_bridge *bridge,
+ struct drm_bridge_state *bridge_state,
+ struct drm_crtc_state *crtc_state,
+ struct drm_connector_state *conn_state,
+ u32 output_fmt,
+ unsigned int *num_input_fmts)
+{
+ u32 *input_fmts;
+
+ if (!imx93_pdfc_bus_output_fmt_supported(output_fmt))
+ return NULL;
+
+ input_fmts = kmalloc(sizeof(*input_fmts), GFP_KERNEL);
+ if (!input_fmts)
+ return NULL;
+
+ switch (output_fmt) {
+ case MEDIA_BUS_FMT_RGB888_1X24:
+ case MEDIA_BUS_FMT_RGB565_1X16:
+ input_fmts[0] = output_fmt;
+ break;
+ case MEDIA_BUS_FMT_RGB666_1X18:
+ case MEDIA_BUS_FMT_FIXED:
+ input_fmts[0] = MEDIA_BUS_FMT_RGB888_1X24;
+ break;
+ }
+
+ *num_input_fmts = 1;
+
+ return input_fmts;
+}
+
+static int imx93_pdfc_bridge_atomic_check(struct drm_bridge *bridge,
+ struct drm_bridge_state *bridge_state,
+ struct drm_crtc_state *crtc_state,
+ struct drm_connector_state *conn_state)
+{
+ struct imx93_pdfc *pdfc = bridge->driver_private;
+
+ switch (bridge_state->output_bus_cfg.format) {
+ case MEDIA_BUS_FMT_RGB888_1X24:
+ pdfc->format = RGB888_TO_RGB888;
+ break;
+ case MEDIA_BUS_FMT_RGB666_1X18:
+ pdfc->format = RGB888_TO_RGB666;
+ break;
+ case MEDIA_BUS_FMT_RGB565_1X16:
+ pdfc->format = RGB565_TO_RGB565;
+ break;
+ default:
+ DRM_DEV_DEBUG_DRIVER(pdfc->dev, "Unsupported output bus format: 0x%x\n",
+ bridge_state->output_bus_cfg.format);
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static const struct drm_bridge_funcs imx93_pdfc_bridge_funcs = {
+ .attach = imx93_pdfc_bridge_attach,
+ .atomic_enable = imx93_pdfc_bridge_atomic_enable,
+ .atomic_duplicate_state = drm_atomic_helper_bridge_duplicate_state,
+ .atomic_destroy_state = drm_atomic_helper_bridge_destroy_state,
+ .atomic_get_input_bus_fmts = imx93_pdfc_bridge_atomic_get_input_bus_fmts,
+ .atomic_check = imx93_pdfc_bridge_atomic_check,
+ .atomic_reset = drm_atomic_helper_bridge_reset,
+};
+
+static int imx93_pdfc_bridge_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct imx93_pdfc *pdfc;
+ int ret;
+
+ pdfc = devm_kzalloc(dev, sizeof(*pdfc), GFP_KERNEL);
+ if (!pdfc)
+ return -ENOMEM;
+
+ pdfc->regmap = syscon_node_to_regmap(dev->of_node->parent);
+ if (IS_ERR(pdfc->regmap)) {
+ ret = PTR_ERR(pdfc->regmap);
+ if (ret != -EPROBE_DEFER)
+ DRM_DEV_ERROR(dev, "failed to get regmap: %d\n", ret);
+ return ret;
+ }
+
+ pdfc->next_bridge = devm_drm_of_get_bridge(dev, dev->of_node, 1, 0);
+ if (IS_ERR(pdfc->next_bridge)) {
+ ret = PTR_ERR(pdfc->next_bridge);
+ if (ret != -EPROBE_DEFER)
+ DRM_DEV_ERROR(dev, "failed to get next bridge: %d\n", ret);
+ return ret;
+ }
+
+ platform_set_drvdata(pdev, pdfc);
+
+ pdfc->dev = dev;
+ pdfc->bridge.driver_private = pdfc;
+ pdfc->bridge.funcs = &imx93_pdfc_bridge_funcs;
+ pdfc->bridge.of_node = dev->of_node;
+
+ drm_bridge_add(&pdfc->bridge);
+
+ return 0;
+}
+
+static int imx93_pdfc_bridge_remove(struct platform_device *pdev)
+{
+ struct imx93_pdfc *pdfc = platform_get_drvdata(pdev);
+
+ drm_bridge_remove(&pdfc->bridge);
+
+ return 0;
+}
+
+static const struct of_device_id imx93_pdfc_dt_ids[] = {
+ { .compatible = "nxp,imx93-pdfc", },
+ { /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, imx93_pdfc_dt_ids);
+
+static struct platform_driver imx93_pdfc_bridge_driver = {
+ .probe = imx93_pdfc_bridge_probe,
+ .remove = imx93_pdfc_bridge_remove,
+ .driver = {
+ .of_match_table = imx93_pdfc_dt_ids,
+ .name = DRIVER_NAME,
+ },
+};
+module_platform_driver(imx93_pdfc_bridge_driver);
+
+MODULE_DESCRIPTION("NXP i.MX93 parallel display format configuration driver");
+MODULE_AUTHOR("Liu Ying <[email protected]>");
+MODULE_LICENSE("GPL v2");
+MODULE_ALIAS("platform:" DRIVER_NAME);
--
2.37.1
On 28/01/2023 04:47, Liu Ying wrote:
> NXP i.MX93 mediamix blk-ctrl contains one DISPLAY_MUX register which
> configures parallel display format by using the "PARALLEL_DISP_FORMAT"
> field. Add device tree bindings for the display format configuration.
>
> Signed-off-by: Liu Ying <[email protected]>
> ---
> .../display/bridge/nxp,imx93-pdfc.yaml | 78 +++++++++++++++++++
> 1 file changed, 78 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/display/bridge/nxp,imx93-pdfc.yaml
>
> diff --git a/Documentation/devicetree/bindings/display/bridge/nxp,imx93-pdfc.yaml b/Documentation/devicetree/bindings/display/bridge/nxp,imx93-pdfc.yaml
> new file mode 100644
> index 000000000000..a84bfb46b01d
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/bridge/nxp,imx93-pdfc.yaml
> @@ -0,0 +1,78 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/display/bridge/nxp,imx93-pdfc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: NXP i.MX93 Parallel Display Format Configuration
> +
> +maintainers:
> + - Liu Ying <[email protected]>
> +
> +description: |
> + The i.MX93 mediamix blk-ctrl contains one DISPLAY_MUX register which
> + configures parallel display format by using the "PARALLEL_DISP_FORMAT"
> + field.
> +
> +properties:
> + compatible:
> + const: nxp,imx93-pdfc
Based on description, I have doubts this is a separate bridge device.
Why this is not part of display driver/bindings?
We do not create usually devices for single registers, because they are
not a devices. Devices are a bit more complex - have some pin
inputs/outputs, not a register only. Of course there are exception, but
this one does not look like one.
> +
> + reg:
> + maxItems: 1
Your driver tells different story:
syscon_node_to_regmap(dev->of_node->parent);
(which also points to fact this is not a separate device)
Best regards,
Krzysztof
On Sun, 2023-01-29 at 12:46 +0100, Krzysztof Kozlowski wrote:
> On 28/01/2023 04:47, Liu Ying wrote:
> > NXP i.MX93 mediamix blk-ctrl contains one DISPLAY_MUX register
> > which
> > configures parallel display format by using the
> > "PARALLEL_DISP_FORMAT"
> > field. Add device tree bindings for the display format
> > configuration.
> >
> > Signed-off-by: Liu Ying <[email protected]>
> > ---
> > .../display/bridge/nxp,imx93-pdfc.yaml | 78
> > +++++++++++++++++++
> > 1 file changed, 78 insertions(+)
> > create mode 100644
> > Documentation/devicetree/bindings/display/bridge/nxp,imx93-
> > pdfc.yaml
> >
> > diff --git
> > a/Documentation/devicetree/bindings/display/bridge/nxp,imx93-
> > pdfc.yaml
> > b/Documentation/devicetree/bindings/display/bridge/nxp,imx93-
> > pdfc.yaml
> > new file mode 100644
> > index 000000000000..a84bfb46b01d
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/display/bridge/nxp,imx93-
> > pdfc.yaml
> > @@ -0,0 +1,78 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id:
> > https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevicetree.org%2Fschemas%2Fdisplay%2Fbridge%2Fnxp%2Cimx93-pdfc.yaml%23&data=05%7C01%7Cvictor.liu%40nxp.com%7C7fb1b69849974435787008db01ee832c%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C638105896131701918%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=kkX5B45NTsmDKKzxjOiE6MaE4zkMVbMe4ILammVSwMc%3D&reserved=0
> > +$schema:
> > https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevicetree.org%2Fmeta-schemas%2Fcore.yaml%23&data=05%7C01%7Cvictor.liu%40nxp.com%7C7fb1b69849974435787008db01ee832c%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C638105896131701918%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=vIVpdEjIo6H3V8T7iTbDwz4Bmn0d%2BQB4BCJNJ0OzKJw%3D&reserved=0
> > +
> > +title: NXP i.MX93 Parallel Display Format Configuration
> > +
> > +maintainers:
> > + - Liu Ying <[email protected]>
> > +
> > +description: |
> > + The i.MX93 mediamix blk-ctrl contains one DISPLAY_MUX register
> > which
> > + configures parallel display format by using the
> > "PARALLEL_DISP_FORMAT"
> > + field.
> > +
> > +properties:
> > + compatible:
> > + const: nxp,imx93-pdfc
>
>
> Based on description, I have doubts this is a separate bridge device.
> Why this is not part of display driver/bindings?
The relevant display controller in i.MX93 SoC is LCDIF. From hardware
design PoV, the parallel display format configuration logic is not a
part of LCDIF. Instead, it's a part of i.MX93 mediamix blk-ctrl. The
blk-ctrl includes controls for miscellaneous devices with small logics,
like this parallel display format configuration, LVDS Display
Bridge(LDB, see fsl,ldb.yaml) and so on. The below pipeline describes
data flow of a parallel display LCD panel:
DRAM -> LCDIF -> parallel display format configuration -> LCD panel
So, the parallel display format configuration appears to be a separate
bridge.
>
> We do not create usually devices for single registers, because they
> are
> not a devices. Devices are a bit more complex - have some pin
> inputs/outputs, not a register only. Of course there are exception,
> but
> this one does not look like one.
IMHO, this one is a standalone device although it is controlled by one
single register. It's input pins connect to LCDIF and output pins
connect to i.MX93 SoC's pins/pads.
>
> > +
> > + reg:
> > + maxItems: 1
>
> Your driver tells different story:
>
> syscon_node_to_regmap(dev->of_node->parent);
>
> (which also points to fact this is not a separate device)
This function call gets the parent device's(mediamix blk-ctrl's)
regmap, like fsl-ldb.c does. Same to LDB, the parallel display format
configuration device is a child device of the mediamix blk-ctrl device.
Regards,
Liu Ying
>
> Best regards,
> Krzysztof
>
On Mon, Jan 30, 2023 at 04:39:05PM +0800, Liu Ying wrote:
> On Sun, 2023-01-29 at 12:46 +0100, Krzysztof Kozlowski wrote:
> > On 28/01/2023 04:47, Liu Ying wrote:
> > > NXP i.MX93 mediamix blk-ctrl contains one DISPLAY_MUX register
> > > which
> > > configures parallel display format by using the
> > > "PARALLEL_DISP_FORMAT"
> > > field. Add device tree bindings for the display format
> > > configuration.
> > >
> > > Signed-off-by: Liu Ying <[email protected]>
> > > ---
> > > .../display/bridge/nxp,imx93-pdfc.yaml | 78
> > > +++++++++++++++++++
> > > 1 file changed, 78 insertions(+)
> > > create mode 100644
> > > Documentation/devicetree/bindings/display/bridge/nxp,imx93-
> > > pdfc.yaml
> > >
> > > diff --git
> > > a/Documentation/devicetree/bindings/display/bridge/nxp,imx93-
> > > pdfc.yaml
> > > b/Documentation/devicetree/bindings/display/bridge/nxp,imx93-
> > > pdfc.yaml
> > > new file mode 100644
> > > index 000000000000..a84bfb46b01d
> > > --- /dev/null
> > > +++ b/Documentation/devicetree/bindings/display/bridge/nxp,imx93-
> > > pdfc.yaml
> > > @@ -0,0 +1,78 @@
> > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > > +%YAML 1.2
> > > +---
> > > +$id:
> > > https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevicetree.org%2Fschemas%2Fdisplay%2Fbridge%2Fnxp%2Cimx93-pdfc.yaml%23&data=05%7C01%7Cvictor.liu%40nxp.com%7C7fb1b69849974435787008db01ee832c%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C638105896131701918%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=kkX5B45NTsmDKKzxjOiE6MaE4zkMVbMe4ILammVSwMc%3D&reserved=0
> > > +$schema:
> > > https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevicetree.org%2Fmeta-schemas%2Fcore.yaml%23&data=05%7C01%7Cvictor.liu%40nxp.com%7C7fb1b69849974435787008db01ee832c%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C638105896131701918%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=vIVpdEjIo6H3V8T7iTbDwz4Bmn0d%2BQB4BCJNJ0OzKJw%3D&reserved=0
> > > +
> > > +title: NXP i.MX93 Parallel Display Format Configuration
> > > +
> > > +maintainers:
> > > + - Liu Ying <[email protected]>
> > > +
> > > +description: |
> > > + The i.MX93 mediamix blk-ctrl contains one DISPLAY_MUX register
> > > which
> > > + configures parallel display format by using the
> > > "PARALLEL_DISP_FORMAT"
> > > + field.
> > > +
> > > +properties:
> > > + compatible:
> > > + const: nxp,imx93-pdfc
> >
> >
> > Based on description, I have doubts this is a separate bridge device.
> > Why this is not part of display driver/bindings?
>
> The relevant display controller in i.MX93 SoC is LCDIF. From hardware
> design PoV, the parallel display format configuration logic is not a
> part of LCDIF. Instead, it's a part of i.MX93 mediamix blk-ctrl. The
> blk-ctrl includes controls for miscellaneous devices with small logics,
> like this parallel display format configuration, LVDS Display
> Bridge(LDB, see fsl,ldb.yaml) and so on. The below pipeline describes
> data flow of a parallel display LCD panel:
>
> DRAM -> LCDIF -> parallel display format configuration -> LCD panel
>
> So, the parallel display format configuration appears to be a separate
> bridge.
>
> >
> > We do not create usually devices for single registers, because they
> > are
> > not a devices. Devices are a bit more complex - have some pin
> > inputs/outputs, not a register only. Of course there are exception,
> > but
> > this one does not look like one.
>
> IMHO, this one is a standalone device although it is controlled by one
> single register. It's input pins connect to LCDIF and output pins
> connect to i.MX93 SoC's pins/pads.
Fair enough. It needs to be defined as part of the mediamix blkctrl
schema though.
Rob
On Mon, 2023-01-30 at 15:39 -0600, Rob Herring wrote:
> On Mon, Jan 30, 2023 at 04:39:05PM +0800, Liu Ying wrote:
> > On Sun, 2023-01-29 at 12:46 +0100, Krzysztof Kozlowski wrote:
> > > On 28/01/2023 04:47, Liu Ying wrote:
> > > > NXP i.MX93 mediamix blk-ctrl contains one DISPLAY_MUX register
> > > > which
> > > > configures parallel display format by using the
> > > > "PARALLEL_DISP_FORMAT"
> > > > field. Add device tree bindings for the display format
> > > > configuration.
> > > >
> > > > Signed-off-by: Liu Ying <[email protected]>
> > > > ---
> > > > .../display/bridge/nxp,imx93-pdfc.yaml | 78
> > > > +++++++++++++++++++
> > > > 1 file changed, 78 insertions(+)
> > > > create mode 100644
> > > > Documentation/devicetree/bindings/display/bridge/nxp,imx93-
> > > > pdfc.yaml
> > > >
> > > > diff --git
> > > > a/Documentation/devicetree/bindings/display/bridge/nxp,imx93-
> > > > pdfc.yaml
> > > > b/Documentation/devicetree/bindings/display/bridge/nxp,imx93-
> > > > pdfc.yaml
> > > > new file mode 100644
> > > > index 000000000000..a84bfb46b01d
> > > > --- /dev/null
> > > > +++
> > > > b/Documentation/devicetree/bindings/display/bridge/nxp,imx93-
> > > > pdfc.yaml
> > > > @@ -0,0 +1,78 @@
> > > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > > > +%YAML 1.2
> > > > +---
> > > > +$id:
> > > >
https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevicetree.org%2Fschemas%2Fdisplay%2Fbridge%2Fnxp%2Cimx93-pdfc.yaml%23&data=05%7C01%7Cvictor.liu%40nxp.com%7C3e8db7ce3170451bc0e208db030a6ad0%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C638107115502467822%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=c%2BQ%2Bhpov6L9b905ozKPrkWiTzaRD3ZFsEh0urw5evsQ%3D&reserved=0
> > > > +$schema:
> > > >
https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevicetree.org%2Fmeta-schemas%2Fcore.yaml%23&data=05%7C01%7Cvictor.liu%40nxp.com%7C3e8db7ce3170451bc0e208db030a6ad0%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C638107115502467822%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=SkPZLJIR9uoqk4mRqSsfu963S%2Baa7xXmyCqzR36LJ30%3D&reserved=0
> > > > +
> > > > +title: NXP i.MX93 Parallel Display Format Configuration
> > > > +
> > > > +maintainers:
> > > > + - Liu Ying <[email protected]>
> > > > +
> > > > +description: |
> > > > + The i.MX93 mediamix blk-ctrl contains one DISPLAY_MUX
> > > > register
> > > > which
> > > > + configures parallel display format by using the
> > > > "PARALLEL_DISP_FORMAT"
> > > > + field.
> > > > +
> > > > +properties:
> > > > + compatible:
> > > > + const: nxp,imx93-pdfc
> > >
> > >
> > > Based on description, I have doubts this is a separate bridge
> > > device.
> > > Why this is not part of display driver/bindings?
> >
> > The relevant display controller in i.MX93 SoC is LCDIF. From
> > hardware
> > design PoV, the parallel display format configuration logic is not
> > a
> > part of LCDIF. Instead, it's a part of i.MX93 mediamix blk-ctrl.
> > The
> > blk-ctrl includes controls for miscellaneous devices with small
> > logics,
> > like this parallel display format configuration, LVDS Display
> > Bridge(LDB, see fsl,ldb.yaml) and so on. The below pipeline
> > describes
> > data flow of a parallel display LCD panel:
> >
> > DRAM -> LCDIF -> parallel display format configuration -> LCD panel
> >
> > So, the parallel display format configuration appears to be a
> > separate
> > bridge.
> >
> > >
> > > We do not create usually devices for single registers, because
> > > they
> > > are
> > > not a devices. Devices are a bit more complex - have some pin
> > > inputs/outputs, not a register only. Of course there are
> > > exception,
> > > but
> > > this one does not look like one.
> >
> > IMHO, this one is a standalone device although it is controlled by
> > one
> > single register. It's input pins connect to LCDIF and output pins
> > connect to i.MX93 SoC's pins/pads.
>
> Fair enough. It needs to be defined as part of the mediamix blkctrl
> schema though.
Do you mean that we can keep this schema and need to allow child
devices in fsl,imx93-media-blk-ctrl.yaml?
Cc'ing Peng.
Peng, it appears that you are listed in the maintainers of fsl,imx93-
media-blk-ctrl.yaml. I think it needs to be extended to allow child
devices. Do you consider to do that?
Regards,
Liu Ying
>
> Rob