Hi!
Looks like the code:
ALU_ARSH_X:
DST = (u64) (u32) ((*(s32 *) &DST) >> SRC);
CONT;
ALU_ARSH_K:
DST = (u64) (u32) ((*(s32 *) &DST) >> IMM);
CONT;
works incorrectly on BE arches since it must operate on lower
parts of 64bit registers.
See failure of test_verifier test 'arsh32 on imm 2' (#23 on
5.2-rc6).
--
WBR,
Yauheni Kaliuta
Yauheni Kaliuta writes:
> Hi!
>
> Looks like the code:
>
> ALU_ARSH_X:
> DST = (u64) (u32) ((*(s32 *) &DST) >> SRC);
> CONT;
> ALU_ARSH_K:
> DST = (u64) (u32) ((*(s32 *) &DST) >> IMM);
> CONT;
>
> works incorrectly on BE arches since it must operate on lower
> parts of 64bit registers.
>
> See failure of test_verifier test 'arsh32 on imm 2' (#23 on
> 5.2-rc6).
Ah, thanks for reporting this.
Should not taken the address directly, does the following fix resolved the
failure?
ALU_ARSH_X:
DST = (u64) (u32) ((s32) DST) >> SRC);
CONT;
ALU_ARSH_K:
DST = (u64) (u32) ((s32) DST) >> IMM);
CONT;
Regards,
Jiong
Hi, Jiong!
>>>>> On Tue, 25 Jun 2019 11:20:07 +0100, Jiong Wang wrote:
> Yauheni Kaliuta writes:
>> Hi!
>>
>> Looks like the code:
>>
>> ALU_ARSH_X:
>> DST = (u64) (u32) ((*(s32 *) &DST) >> SRC);
>> CONT;
>> ALU_ARSH_K:
>> DST = (u64) (u32) ((*(s32 *) &DST) >> IMM);
>> CONT;
>>
>> works incorrectly on BE arches since it must operate on lower
>> parts of 64bit registers.
>>
>> See failure of test_verifier test 'arsh32 on imm 2' (#23 on
>> 5.2-rc6).
> Ah, thanks for reporting this.
> Should not taken the address directly, does the following fix resolved the
> failure?
> ALU_ARSH_X:
> DST = (u64) (u32) ((s32) DST) >> SRC);
> CONT;
> ALU_ARSH_K:
> DST = (u64) (u32) ((s32) DST) >> IMM);
> CONT;
Yes, thanks (just add the missing braces).
--
WBR,
Yauheni Kaliuta