From: Cameron Nemo <[email protected]>
Document compatible for dwc3 on the Rockchip rk3328 platform.
Signed-off-by: Cameron Nemo <[email protected]>
---
Documentation/devicetree/bindings/usb/dwc3.txt | 1 +
Documentation/devicetree/bindings/usb/rockchip,dwc3.txt | 3 ++-
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt b/Documentation/devicetree/bindings/usb/dwc3.txt
index d03edf9d3935..d625cd5966e9 100644
--- a/Documentation/devicetree/bindings/usb/dwc3.txt
+++ b/Documentation/devicetree/bindings/usb/dwc3.txt
@@ -25,6 +25,7 @@ Exception for clocks:
"ti,am437x-dwc3"
"ti,dwc3"
"ti,keystone-dwc3"
+ "rockchip,rk3328-dwc3"
"rockchip,rk3399-dwc3"
"xlnx,zynqmp-dwc3"
diff --git a/Documentation/devicetree/bindings/usb/rockchip,dwc3.txt b/Documentation/devicetree/bindings/usb/rockchip,dwc3.txt
index 94520493233b..b41f30a61be6 100644
--- a/Documentation/devicetree/bindings/usb/rockchip,dwc3.txt
+++ b/Documentation/devicetree/bindings/usb/rockchip,dwc3.txt
@@ -1,7 +1,8 @@
Rockchip SuperSpeed DWC3 USB SoC controller
Required properties:
-- compatible: should contain "rockchip,rk3399-dwc3" for rk3399 SoC
+- compatible: should contain "rockchip,rk3328-dwc3" for rk3328 SoC
+ or "rockchip,rk3399-dwc3" for rk3399 SoC
- clocks: A list of phandle + clock-specifier pairs for the
clocks listed in clock-names
- clock-names: Should contain the following:
--
2.28.0
From: Cameron Nemo <[email protected]>
Add a compatible to be hooked into by the Rockchip rk3328 device tree.
The rk3399 compatible cannot be reused because the rk3328 SoCs may
require a specialized driver in the future, and old device trees must
remain compatible with newer kernels.
Signed-off-by: Cameron Nemo <[email protected]>
---
drivers/usb/dwc3/dwc3-of-simple.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/usb/dwc3/dwc3-of-simple.c b/drivers/usb/dwc3/dwc3-of-simple.c
index 7df115012935..0727bf2304b1 100644
--- a/drivers/usb/dwc3/dwc3-of-simple.c
+++ b/drivers/usb/dwc3/dwc3-of-simple.c
@@ -171,6 +171,7 @@ static const struct dev_pm_ops dwc3_of_simple_dev_pm_ops = {
};
static const struct of_device_id of_dwc3_simple_match[] = {
+ { .compatible = "rockchip,rk3328-dwc3" },
{ .compatible = "rockchip,rk3399-dwc3" },
{ .compatible = "xlnx,zynqmp-dwc3" },
{ .compatible = "cavium,octeon-7130-usb-uctl" },
--
2.28.0
From: Cameron Nemo <[email protected]>
Enable USB3 nodes for the rk3328-based PINE Rock64 board.
Signed-off-by: Heiko Stuebner <[email protected]>
Signed-off-by: Cameron Nemo <[email protected]>
---
arch/arm64/boot/dts/rockchip/rk3328-rock64.dts | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts b/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts
index 86cfb5c50a94..0cbf59efcef0 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts
@@ -384,6 +384,15 @@ &usb20_otg {
status = "okay";
};
+&usbdrd3 {
+ status = "okay";
+};
+
+&usbdrd_dwc3 {
+ dr_mode = "host";
+ status = "okay";
+};
+
&usb_host0_ehci {
status = "okay";
};
--
2.28.0
From: Cameron Nemo <[email protected]>
RK3328 SoCs have one USB 3.0 OTG controller which uses DWC_USB3
core's general architecture. It can act as static xHCI host
controller, static device controller, USB 3.0/2.0 OTG basing
on ID of USB3.0 PHY.
Signed-off-by: William Wu <[email protected]>
Signed-off-by: Heiko Stuebner <[email protected]>
Signed-off-by: Cameron Nemo <[email protected]>
---
arch/arm64/boot/dts/rockchip/rk3328.dtsi | 27 ++++++++++++++++++++++++
1 file changed, 27 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index bbdb19a3e85d..27e86bf06d3e 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -983,6 +983,33 @@ usb_host0_ohci: usb@ff5d0000 {
status = "disabled";
};
+ usbdrd3: usb@ff600000 {
+ compatible = "rockchip,rk3328-dwc3";
+ clocks = <&cru SCLK_USB3OTG_REF>, <&cru SCLK_USB3OTG_SUSPEND>,
+ <&cru ACLK_USB3OTG>;
+ clock-names = "ref_clk", "suspend_clk",
+ "bus_clk";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+ status = "disabled";
+
+ usbdrd_dwc3: dwc3@ff600000 {
+ compatible = "snps,dwc3";
+ reg = <0x0 0xff600000 0x0 0x100000>;
+ interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
+ dr_mode = "otg";
+ phy_type = "utmi_wide";
+ snps,dis_enblslpm_quirk;
+ snps,dis-u2-freeclk-exists-quirk;
+ snps,dis_u2_susphy_quirk;
+ snps,dis_u3_susphy_quirk;
+ snps,dis-del-phy-power-chg-quirk;
+ snps,dis-tx-ipgap-linecheck-quirk;
+ status = "disabled";
+ };
+ };
+
gic: interrupt-controller@ff811000 {
compatible = "arm,gic-400";
#interrupt-cells = <3>;
--
2.28.0
On Wed, 02 Sep 2020 11:12:31 -0700, [email protected] wrote:
> From: Cameron Nemo <[email protected]>
>
> Document compatible for dwc3 on the Rockchip rk3328 platform.
>
> Signed-off-by: Cameron Nemo <[email protected]>
> ---
> Documentation/devicetree/bindings/usb/dwc3.txt | 1 +
> Documentation/devicetree/bindings/usb/rockchip,dwc3.txt | 3 ++-
> 2 files changed, 3 insertions(+), 1 deletion(-)
>
Acked-by: Rob Herring <[email protected]>
On Wed, Sep 2, 2020 at 11:12 AM <[email protected]> wrote:
>
> From: Cameron Nemo <[email protected]>
>
> Document compatible for dwc3 on the Rockchip rk3328 platform.
Hi all,
Wanted to give this patch submission a gentle ping.
Rob Herring acked the documentation changes, but I have not heard
anything
from the USB or Rockchip maintainers. This patchset would facilitate USB3
support for Rockchip rk3328 devices like the Pine Rock64.
If there is anything I can do to help move this along, please let me know.
Thank you,
Cameron
>
> Signed-off-by: Cameron Nemo <[email protected]>
> ---
> Documentation/devicetree/bindings/usb/dwc3.txt | 1 +
> Documentation/devicetree/bindings/usb/rockchip,dwc3.txt | 3 ++-
> 2 files changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt b/Documentation/devicetree/bindings/usb/dwc3.txt
> index d03edf9d3935..d625cd5966e9 100644
> --- a/Documentation/devicetree/bindings/usb/dwc3.txt
> +++ b/Documentation/devicetree/bindings/usb/dwc3.txt
> @@ -25,6 +25,7 @@ Exception for clocks:
> "ti,am437x-dwc3"
> "ti,dwc3"
> "ti,keystone-dwc3"
> + "rockchip,rk3328-dwc3"
> "rockchip,rk3399-dwc3"
> "xlnx,zynqmp-dwc3"
>
> diff --git a/Documentation/devicetree/bindings/usb/rockchip,dwc3.txt b/Documentation/devicetree/bindings/usb/rockchip,dwc3.txt
> index 94520493233b..b41f30a61be6 100644
> --- a/Documentation/devicetree/bindings/usb/rockchip,dwc3.txt
> +++ b/Documentation/devicetree/bindings/usb/rockchip,dwc3.txt
> @@ -1,7 +1,8 @@
> Rockchip SuperSpeed DWC3 USB SoC controller
>
> Required properties:
> -- compatible: should contain "rockchip,rk3399-dwc3" for rk3399 SoC
> +- compatible: should contain "rockchip,rk3328-dwc3" for rk3328 SoC
> + or "rockchip,rk3399-dwc3" for rk3399 SoC
> - clocks: A list of phandle + clock-specifier pairs for the
> clocks listed in clock-names
> - clock-names: Should contain the following:
> --
> 2.28.0
>
Hi,
Lindsey Stanpoor <[email protected]> writes:
> On Wed, Sep 2, 2020 at 11:12 AM <[email protected]> wrote:
>>
>> From: Cameron Nemo <[email protected]>
>>
>> Document compatible for dwc3 on the Rockchip rk3328 platform.
>
> Hi all,
>
> Wanted to give this patch submission a gentle ping.
>
> Rob Herring acked the documentation changes, but I have not heard
> anything
> from the USB or Rockchip maintainers. This patchset would facilitate USB3
> support for Rockchip rk3328 devices like the Pine Rock64.
>
> If there is anything I can do to help move this along, please let me know.
Sorry, it had fallen through the cracks. It's now in my testing/next.
--
balbi
On Fri, Nov 6, 2020 at 11:42 PM Felipe Balbi <[email protected]> wrote:
>
>
> Hi,
>
> Lindsey Stanpoor <[email protected]> writes:
> > On Wed, Sep 2, 2020 at 11:12 AM <[email protected]> wrote:
> >>
> >> From: Cameron Nemo <[email protected]>
> >>
> >> Document compatible for dwc3 on the Rockchip rk3328 platform.
> >
> > Hi all,
> >
> > Wanted to give this patch submission a gentle ping.
> >
> > Rob Herring acked the documentation changes, but I have not heard
> > anything
> > from the USB or Rockchip maintainers. This patchset would facilitate USB3
> > support for Rockchip rk3328 devices like the Pine Rock64.
> >
> > If there is anything I can do to help move this along, please let me know.
>
> Sorry, it had fallen through the cracks. It's now in my testing/next.
Following up on this. Will this move out of your testing/next?
--
Cameron
On Thu, Jan 21, 2021 at 12:30 PM Lindsey Stanpoor
<[email protected]> wrote:
>
> On Fri, Nov 6, 2020 at 11:42 PM Felipe Balbi <[email protected]> wrote:
> >
> >
> > Hi,
> >
> > Lindsey Stanpoor <[email protected]> writes:
> > > On Wed, Sep 2, 2020 at 11:12 AM <[email protected]> wrote:
> > >>
> > >> From: Cameron Nemo <[email protected]>
> > >>
> > >> Document compatible for dwc3 on the Rockchip rk3328 platform.
> > >
> > > Hi all,
> > >
> > > Wanted to give this patch submission a gentle ping.
> > >
> > > Rob Herring acked the documentation changes, but I have not heard
> > > anything
> > > from the USB or Rockchip maintainers. This patchset would facilitate USB3
> > > support for Rockchip rk3328 devices like the Pine Rock64.
> > >
> > > If there is anything I can do to help move this along, please let me know.
> >
> > Sorry, it had fallen through the cracks. It's now in my testing/next.
>
> Following up on this. Will this move out of your testing/next?
The binding changes are likely stale now that the dwc3 binding has been
converted to YAML. See Greg's USB tree.
Also the DT changes should go through the arm-soc tree separately, so
we can stack on additional changes enabling USB3 on other boards.
ChenYu
> --
> Cameron
>
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