2023-01-13 15:14:58

by Björn Töpel

[permalink] [raw]
Subject: [PATCH 1/2] riscv: Add "Code:" to RISC-V splats

From: Björn Töpel <[email protected]>

Add "Code:" output to RISC-V splats. Mimic x86-64's byte-for-byte
dumps.

An example:
Unable to handle kernel NULL pointer dereference at virtual address 0000000000000000
Oops [#1]
Modules linked in:
CPU: 1 PID: 1 Comm: swapper/0 Not tainted 6.2.0-rc3-00063-g0ce8b1377b2b-dirty #3
Hardware name: riscv-virtio,qemu (DT)
epc : kernel_init+0xc8/0x10e
ra : kernel_init+0x70/0x10e
epc : ffffffff80bd9938 ra : ffffffff80bd98e0 sp : ff2000000060bec0
gp : ffffffff81730b28 tp : ff6000007ff00000 t0 : 7974697275636573
t1 : 0000000000000000 t2 : 3030303270393d6e s0 : ff2000000060bee0
s1 : ffffffff81732028 a0 : 0000000000000000 a1 : ff6000008157e600
a2 : 0000000000000002 a3 : ffffffff8176a470 a4 : 0000000000000000
a5 : 000000000000000a a6 : 0000000000000118 a7 : ff6000008157e600
s2 : 0000000000000000 s3 : 0000000000000000 s4 : 0000000000000000
s5 : 0000000000000000 s6 : 0000000000000000 s7 : 0000000000000000
s8 : 0000000000000000 s9 : 0000000000000000 s10: 0000000000000000
s11: 0000000000000000 t3 : ffffffff81185ff0 t4 : 0000000000000022
t5 : 000000000000003d t6 : 0000000000000000
status: 0000000200000120 badaddr: 0000000000000000 cause: 000000000000000f
[<ffffffff80003528>] ret_from_exception+0x0/0x16
Code: 2a 86 79 d1 8c 60 17 a5 69 00 13 05 65 38 ef d0 2e db a9 47 <1c> c1 17 a5
---[ end trace 0000000000000000 ]---
Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b
SMP: stopping secondary CPUs
---[ end Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b ]---

Signed-off-by: Björn Töpel <[email protected]>
---
arch/riscv/kernel/traps.c | 31 ++++++++++++++++++++++++++++++-
1 file changed, 30 insertions(+), 1 deletion(-)

diff --git a/arch/riscv/kernel/traps.c b/arch/riscv/kernel/traps.c
index 549bde5c970a..efadff4190e0 100644
--- a/arch/riscv/kernel/traps.c
+++ b/arch/riscv/kernel/traps.c
@@ -29,6 +29,33 @@ int show_unhandled_signals = 1;

static DEFINE_SPINLOCK(die_lock);

+static void dump_kernel_instr(const char *loglvl, struct pt_regs *regs)
+{
+#define PROLOGUE_SIZE 20
+#define EPILOGUE_SIZE 3
+#define OPCODE_BUFSIZE (PROLOGUE_SIZE + 1 + EPILOGUE_SIZE)
+ u8 opcodes[OPCODE_BUFSIZE];
+ unsigned long prologue = regs->epc - PROLOGUE_SIZE;
+
+ if (user_mode(regs))
+ return;
+
+ switch (copy_from_kernel_nofault(opcodes, (u8 *)prologue, sizeof(opcodes))) {
+ case 0:
+ printk("%sCode: %" __stringify(PROLOGUE_SIZE) "ph <%02x> %"
+ __stringify(EPILOGUE_SIZE) "ph\n", loglvl, opcodes,
+ opcodes[PROLOGUE_SIZE], opcodes + PROLOGUE_SIZE + 1);
+ break;
+ case -EPERM:
+ /* No access to the user space stack of other tasks. Ignore. */
+ break;
+ default:
+ printk("%sCode: Unable to access opcode bytes at 0x%lx.\n",
+ loglvl, prologue);
+ break;
+ }
+}
+
void die(struct pt_regs *regs, const char *str)
{
static int die_counter;
@@ -43,8 +70,10 @@ void die(struct pt_regs *regs, const char *str)

pr_emerg("%s [#%d]\n", str, ++die_counter);
print_modules();
- if (regs)
+ if (regs) {
show_regs(regs);
+ dump_kernel_instr(KERN_EMERG, regs);
+ }

cause = regs ? regs->cause : -1;
ret = notify_die(DIE_OOPS, str, regs, 0, cause, SIGSEGV);
--
2.37.2


2023-01-13 16:39:20

by Andreas Schwab

[permalink] [raw]
Subject: Re: [PATCH 1/2] riscv: Add "Code:" to RISC-V splats

On Jan 13 2023, Björn Töpel wrote:

> From: Björn Töpel <[email protected]>
>
> Add "Code:" output to RISC-V splats. Mimic x86-64's byte-for-byte
> dumps.

RISC-V insns are organised in 16-bit parcels, it probably make sense to
present them that way.

--
Andreas Schwab, [email protected]
GPG Key fingerprint = 7578 EB47 D4E5 4D69 2510 2552 DF73 E780 A9DA AEC1
"And now for something completely different."

2023-01-13 20:18:58

by Björn Töpel

[permalink] [raw]
Subject: Re: [PATCH 1/2] riscv: Add "Code:" to RISC-V splats

Andreas Schwab <[email protected]> writes:

>> Add "Code:" output to RISC-V splats. Mimic x86-64's byte-for-byte
>> dumps.
>
> RISC-V insns are organised in 16-bit parcels, it probably make sense to
> present them that way.

Good point! I'll spin a v2.


Thanks for having a look,
Björn