New HW platforms with multiple CS42L42 parts, faster CPU and i2c
requre some extra delay to allow PLL to settle and lock. Adding
extra 10ms delay.
Signed-off-by: Vitaly Rodionov <[email protected]>
---
sound/pci/hda/patch_cs8409.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/sound/pci/hda/patch_cs8409.c b/sound/pci/hda/patch_cs8409.c
index 754aa8ddd2e4..0ba1fbcbb21e 100644
--- a/sound/pci/hda/patch_cs8409.c
+++ b/sound/pci/hda/patch_cs8409.c
@@ -888,7 +888,7 @@ static void cs42l42_resume(struct sub_codec *cs42l42)
/* Initialize CS42L42 companion codec */
cs8409_i2c_bulk_write(cs42l42, cs42l42->init_seq, cs42l42->init_seq_num);
- usleep_range(20000, 25000);
+ usleep_range(30000, 35000);
/* Clear interrupts, by reading interrupt status registers */
cs8409_i2c_bulk_read(cs42l42, irq_regs, ARRAY_SIZE(irq_regs));
--
2.34.1
On Mon, 05 Dec 2022 15:57:13 +0100,
Vitaly Rodionov wrote:
>
> New HW platforms with multiple CS42L42 parts, faster CPU and i2c
> requre some extra delay to allow PLL to settle and lock. Adding
> extra 10ms delay.
>
> Signed-off-by: Vitaly Rodionov <[email protected]>
Thanks, applied.
Takashi