2024-03-27 07:27:43

by Ho-Ren (Jack) Chuang

[permalink] [raw]
Subject: [PATCH v6 0/2] Improved Memory Tier Creation for CPUless NUMA Nodes

When a memory device, such as CXL1.1 type3 memory, is emulated as
normal memory (E820_TYPE_RAM), the memory device is indistinguishable
from normal DRAM in terms of memory tiering with the current implementation.
The current memory tiering assigns all detected normal memory nodes
to the same DRAM tier. This results in normal memory devices with
different attributions being unable to be assigned to the correct memory tier,
leading to the inability to migrate pages between different types of memory.
https://lore.kernel.org/linux-mm/PH0PR08MB7955E9F08CCB64F23963B5C3A860A@PH0PR08MB7955.namprd08.prod.outlook.com/T/

This patchset automatically resolves the issues. It delays the initialization
of memory tiers for CPUless NUMA nodes until they obtain HMAT information
and after all devices are initialized at boot time, eliminating the need
for user intervention. If no HMAT is specified, it falls back to
using `default_dram_type`.

Example usecase:
We have CXL memory on the host, and we create VMs with a new system memory
device backed by host CXL memory. We inject CXL memory performance attributes
through QEMU, and the guest now sees memory nodes with performance attributes
in HMAT. With this change, we enable the guest kernel to construct
the correct memory tiering for the memory nodes.

-v6:
Thanks to Ying's comments,
* Move `default_dram_perf_lock` to the function's beginning for clarity
* Fix double unlocking at v5
-v5:
Thanks to Ying's comments,
* Add comments about what is protected by `default_dram_perf_lock`
* Fix an uninitialized pointer mtype
* Slightly shorten the time holding `default_dram_perf_lock`
* Fix a deadlock bug in `mt_perf_to_adistance`
* https://lore.kernel.org/lkml/[email protected]/T/#u
-v4:
Thanks to Ying's comments,
* Remove redundant code
* Reorganize patches accordingly
* https://lore.kernel.org/lkml/[email protected]/T/#u
-v3:
Thanks to Ying's comments,
* Make the newly added code independent of HMAT
* Upgrade set_node_memory_tier to support more cases
* Put all non-driver-initialized memory types into default_memory_types
instead of using hmat_memory_types
* find_alloc_memory_type -> mt_find_alloc_memory_type
* https://lore.kernel.org/lkml/[email protected]/T/#u
-v2:
Thanks to Ying's comments,
* Rewrite cover letter & patch description
* Rename functions, don't use _hmat
* Abstract common functions into find_alloc_memory_type()
* Use the expected way to use set_node_memory_tier instead of modifying it
* https://lore.kernel.org/lkml/[email protected]/T/#u
-v1:
* https://lore.kernel.org/lkml/[email protected]/T/#u

Ho-Ren (Jack) Chuang (2):
memory tier: dax/kmem: introduce an abstract layer for finding,
allocating, and putting memory types
memory tier: create CPUless memory tiers after obtaining HMAT info

drivers/dax/kmem.c | 20 +-----
include/linux/memory-tiers.h | 13 ++++
mm/memory-tiers.c | 126 ++++++++++++++++++++++++++++++-----
3 files changed, 125 insertions(+), 34 deletions(-)

--
Ho-Ren (Jack) Chuang



2024-03-27 07:27:55

by Ho-Ren (Jack) Chuang

[permalink] [raw]
Subject: [PATCH v6 1/2] memory tier: dax/kmem: introduce an abstract layer for finding, allocating, and putting memory types

Since different memory devices require finding, allocating, and putting
memory types, these common steps are abstracted in this patch,
enhancing the scalability and conciseness of the code.

Signed-off-by: Ho-Ren (Jack) Chuang <[email protected]>
---
drivers/dax/kmem.c | 20 ++------------------
include/linux/memory-tiers.h | 13 +++++++++++++
mm/memory-tiers.c | 32 ++++++++++++++++++++++++++++++++
3 files changed, 47 insertions(+), 18 deletions(-)

diff --git a/drivers/dax/kmem.c b/drivers/dax/kmem.c
index 42ee360cf4e3..01399e5b53b2 100644
--- a/drivers/dax/kmem.c
+++ b/drivers/dax/kmem.c
@@ -55,21 +55,10 @@ static LIST_HEAD(kmem_memory_types);

static struct memory_dev_type *kmem_find_alloc_memory_type(int adist)
{
- bool found = false;
struct memory_dev_type *mtype;

mutex_lock(&kmem_memory_type_lock);
- list_for_each_entry(mtype, &kmem_memory_types, list) {
- if (mtype->adistance == adist) {
- found = true;
- break;
- }
- }
- if (!found) {
- mtype = alloc_memory_type(adist);
- if (!IS_ERR(mtype))
- list_add(&mtype->list, &kmem_memory_types);
- }
+ mtype = mt_find_alloc_memory_type(adist, &kmem_memory_types);
mutex_unlock(&kmem_memory_type_lock);

return mtype;
@@ -77,13 +66,8 @@ static struct memory_dev_type *kmem_find_alloc_memory_type(int adist)

static void kmem_put_memory_types(void)
{
- struct memory_dev_type *mtype, *mtn;
-
mutex_lock(&kmem_memory_type_lock);
- list_for_each_entry_safe(mtype, mtn, &kmem_memory_types, list) {
- list_del(&mtype->list);
- put_memory_type(mtype);
- }
+ mt_put_memory_types(&kmem_memory_types);
mutex_unlock(&kmem_memory_type_lock);
}

diff --git a/include/linux/memory-tiers.h b/include/linux/memory-tiers.h
index 69e781900082..a44c03c2ba3a 100644
--- a/include/linux/memory-tiers.h
+++ b/include/linux/memory-tiers.h
@@ -48,6 +48,9 @@ int mt_calc_adistance(int node, int *adist);
int mt_set_default_dram_perf(int nid, struct access_coordinate *perf,
const char *source);
int mt_perf_to_adistance(struct access_coordinate *perf, int *adist);
+struct memory_dev_type *mt_find_alloc_memory_type(int adist,
+ struct list_head *memory_types);
+void mt_put_memory_types(struct list_head *memory_types);
#ifdef CONFIG_MIGRATION
int next_demotion_node(int node);
void node_get_allowed_targets(pg_data_t *pgdat, nodemask_t *targets);
@@ -136,5 +139,15 @@ static inline int mt_perf_to_adistance(struct access_coordinate *perf, int *adis
{
return -EIO;
}
+
+struct memory_dev_type *mt_find_alloc_memory_type(int adist, struct list_head *memory_types)
+{
+ return NULL;
+}
+
+void mt_put_memory_types(struct list_head *memory_types)
+{
+
+}
#endif /* CONFIG_NUMA */
#endif /* _LINUX_MEMORY_TIERS_H */
diff --git a/mm/memory-tiers.c b/mm/memory-tiers.c
index 0537664620e5..974af10cfdd8 100644
--- a/mm/memory-tiers.c
+++ b/mm/memory-tiers.c
@@ -623,6 +623,38 @@ void clear_node_memory_type(int node, struct memory_dev_type *memtype)
}
EXPORT_SYMBOL_GPL(clear_node_memory_type);

+struct memory_dev_type *mt_find_alloc_memory_type(int adist, struct list_head *memory_types)
+{
+ bool found = false;
+ struct memory_dev_type *mtype;
+
+ list_for_each_entry(mtype, memory_types, list) {
+ if (mtype->adistance == adist) {
+ found = true;
+ break;
+ }
+ }
+ if (!found) {
+ mtype = alloc_memory_type(adist);
+ if (!IS_ERR(mtype))
+ list_add(&mtype->list, memory_types);
+ }
+
+ return mtype;
+}
+EXPORT_SYMBOL_GPL(mt_find_alloc_memory_type);
+
+void mt_put_memory_types(struct list_head *memory_types)
+{
+ struct memory_dev_type *mtype, *mtn;
+
+ list_for_each_entry_safe(mtype, mtn, memory_types, list) {
+ list_del(&mtype->list);
+ put_memory_type(mtype);
+ }
+}
+EXPORT_SYMBOL_GPL(mt_put_memory_types);
+
static void dump_hmem_attrs(struct access_coordinate *coord, const char *prefix)
{
pr_info(
--
Ho-Ren (Jack) Chuang


2024-03-27 07:28:12

by Ho-Ren (Jack) Chuang

[permalink] [raw]
Subject: [PATCH v6 2/2] memory tier: create CPUless memory tiers after obtaining HMAT info

The current implementation treats emulated memory devices, such as
CXL1.1 type3 memory, as normal DRAM when they are emulated as normal memory
(E820_TYPE_RAM). However, these emulated devices have different
characteristics than traditional DRAM, making it important to
distinguish them. Thus, we modify the tiered memory initialization process
to introduce a delay specifically for CPUless NUMA nodes. This delay
ensures that the memory tier initialization for these nodes is deferred
until HMAT information is obtained during the boot process. Finally,
demotion tables are recalculated at the end.

* late_initcall(memory_tier_late_init);
Some device drivers may have initialized memory tiers between
`memory_tier_init()` and `memory_tier_late_init()`, potentially bringing
online memory nodes and configuring memory tiers. They should be excluded
in the late init.

* Handle cases where there is no HMAT when creating memory tiers
There is a scenario where a CPUless node does not provide HMAT information.
If no HMAT is specified, it falls back to using the default DRAM tier.

* Introduce another new lock `default_dram_perf_lock` for adist calculation
In the current implementation, iterating through CPUlist nodes requires
holding the `memory_tier_lock`. However, `mt_calc_adistance()` will end up
trying to acquire the same lock, leading to a potential deadlock.
Therefore, we propose introducing a standalone `default_dram_perf_lock` to
protect `default_dram_perf_*`. This approach not only avoids deadlock
but also prevents holding a large lock simultaneously.

* Upgrade `set_node_memory_tier` to support additional cases, including
default DRAM, late CPUless, and hot-plugged initializations.
To cover hot-plugged memory nodes, `mt_calc_adistance()` and
`mt_find_alloc_memory_type()` are moved into `set_node_memory_tier()` to
handle cases where memtype is not initialized and where HMAT information is
available.

* Introduce `default_memory_types` for those memory types that are not
initialized by device drivers.
Because late initialized memory and default DRAM memory need to be managed,
a default memory type is created for storing all memory types that are
not initialized by device drivers and as a fallback.

Signed-off-by: Ho-Ren (Jack) Chuang <[email protected]>
Signed-off-by: Hao Xiang <[email protected]>
---
mm/memory-tiers.c | 94 +++++++++++++++++++++++++++++++++++++++--------
1 file changed, 78 insertions(+), 16 deletions(-)

diff --git a/mm/memory-tiers.c b/mm/memory-tiers.c
index 974af10cfdd8..e24fc3bebae4 100644
--- a/mm/memory-tiers.c
+++ b/mm/memory-tiers.c
@@ -36,6 +36,11 @@ struct node_memory_type_map {

static DEFINE_MUTEX(memory_tier_lock);
static LIST_HEAD(memory_tiers);
+/*
+ * The list is used to store all memory types that are not created
+ * by a device driver.
+ */
+static LIST_HEAD(default_memory_types);
static struct node_memory_type_map node_memory_types[MAX_NUMNODES];
struct memory_dev_type *default_dram_type;

@@ -108,6 +113,8 @@ static struct demotion_nodes *node_demotion __read_mostly;

static BLOCKING_NOTIFIER_HEAD(mt_adistance_algorithms);

+/* The lock is used to protect `default_dram_perf*` info and nid. */
+static DEFINE_MUTEX(default_dram_perf_lock);
static bool default_dram_perf_error;
static struct access_coordinate default_dram_perf;
static int default_dram_perf_ref_nid = NUMA_NO_NODE;
@@ -505,7 +512,8 @@ static inline void __init_node_memory_type(int node, struct memory_dev_type *mem
static struct memory_tier *set_node_memory_tier(int node)
{
struct memory_tier *memtier;
- struct memory_dev_type *memtype;
+ struct memory_dev_type *mtype = default_dram_type;
+ int adist = MEMTIER_ADISTANCE_DRAM;
pg_data_t *pgdat = NODE_DATA(node);


@@ -514,11 +522,20 @@ static struct memory_tier *set_node_memory_tier(int node)
if (!node_state(node, N_MEMORY))
return ERR_PTR(-EINVAL);

- __init_node_memory_type(node, default_dram_type);
+ mt_calc_adistance(node, &adist);
+ if (node_memory_types[node].memtype == NULL) {
+ mtype = mt_find_alloc_memory_type(adist, &default_memory_types);
+ if (IS_ERR(mtype)) {
+ mtype = default_dram_type;
+ pr_info("Failed to allocate a memory type. Fall back.\n");
+ }
+ }
+
+ __init_node_memory_type(node, mtype);

- memtype = node_memory_types[node].memtype;
- node_set(node, memtype->nodes);
- memtier = find_create_memory_tier(memtype);
+ mtype = node_memory_types[node].memtype;
+ node_set(node, mtype->nodes);
+ memtier = find_create_memory_tier(mtype);
if (!IS_ERR(memtier))
rcu_assign_pointer(pgdat->memtier, memtier);
return memtier;
@@ -655,6 +672,34 @@ void mt_put_memory_types(struct list_head *memory_types)
}
EXPORT_SYMBOL_GPL(mt_put_memory_types);

+/*
+ * This is invoked via `late_initcall()` to initialize memory tiers for
+ * CPU-less memory nodes after driver initialization, which is
+ * expected to provide `adistance` algorithms.
+ */
+static int __init memory_tier_late_init(void)
+{
+ int nid;
+
+ mutex_lock(&memory_tier_lock);
+ for_each_node_state(nid, N_MEMORY)
+ if (!node_state(nid, N_CPU) &&
+ node_memory_types[nid].memtype == NULL)
+ /*
+ * Some device drivers may have initialized memory tiers
+ * between `memory_tier_init()` and `memory_tier_late_init()`,
+ * potentially bringing online memory nodes and
+ * configuring memory tiers. Exclude them here.
+ */
+ set_node_memory_tier(nid);
+
+ establish_demotion_targets();
+ mutex_unlock(&memory_tier_lock);
+
+ return 0;
+}
+late_initcall(memory_tier_late_init);
+
static void dump_hmem_attrs(struct access_coordinate *coord, const char *prefix)
{
pr_info(
@@ -668,7 +713,7 @@ int mt_set_default_dram_perf(int nid, struct access_coordinate *perf,
{
int rc = 0;

- mutex_lock(&memory_tier_lock);
+ mutex_lock(&default_dram_perf_lock);
if (default_dram_perf_error) {
rc = -EIO;
goto out;
@@ -716,23 +761,30 @@ int mt_set_default_dram_perf(int nid, struct access_coordinate *perf,
}

out:
- mutex_unlock(&memory_tier_lock);
+ mutex_unlock(&default_dram_perf_lock);
return rc;
}

int mt_perf_to_adistance(struct access_coordinate *perf, int *adist)
{
- if (default_dram_perf_error)
- return -EIO;
+ int rc = 0;

- if (default_dram_perf_ref_nid == NUMA_NO_NODE)
- return -ENOENT;
+ mutex_lock(&default_dram_perf_lock);
+ if (default_dram_perf_error) {
+ rc = -EIO;
+ goto out;
+ }

if (perf->read_latency + perf->write_latency == 0 ||
- perf->read_bandwidth + perf->write_bandwidth == 0)
- return -EINVAL;
+ perf->read_bandwidth + perf->write_bandwidth == 0) {
+ rc = -EINVAL;
+ goto out;
+ }

- mutex_lock(&memory_tier_lock);
+ if (default_dram_perf_ref_nid == NUMA_NO_NODE) {
+ rc = -ENOENT;
+ goto out;
+ }
/*
* The abstract distance of a memory node is in direct proportion to
* its memory latency (read + write) and inversely proportional to its
@@ -745,8 +797,9 @@ int mt_perf_to_adistance(struct access_coordinate *perf, int *adist)
(default_dram_perf.read_latency + default_dram_perf.write_latency) *
(default_dram_perf.read_bandwidth + default_dram_perf.write_bandwidth) /
(perf->read_bandwidth + perf->write_bandwidth);
- mutex_unlock(&memory_tier_lock);

+out:
+ mutex_unlock(&default_dram_perf_lock);
return 0;
}
EXPORT_SYMBOL_GPL(mt_perf_to_adistance);
@@ -858,7 +911,8 @@ static int __init memory_tier_init(void)
* For now we can have 4 faster memory tiers with smaller adistance
* than default DRAM tier.
*/
- default_dram_type = alloc_memory_type(MEMTIER_ADISTANCE_DRAM);
+ default_dram_type = mt_find_alloc_memory_type(MEMTIER_ADISTANCE_DRAM,
+ &default_memory_types);
if (IS_ERR(default_dram_type))
panic("%s() failed to allocate default DRAM tier\n", __func__);

@@ -868,6 +922,14 @@ static int __init memory_tier_init(void)
* types assigned.
*/
for_each_node_state(node, N_MEMORY) {
+ if (!node_state(node, N_CPU))
+ /*
+ * Defer memory tier initialization on CPUless numa nodes.
+ * These will be initialized after firmware and devices are
+ * initialized.
+ */
+ continue;
+
memtier = set_node_memory_tier(node);
if (IS_ERR(memtier))
/*
--
Ho-Ren (Jack) Chuang


2024-03-28 01:39:19

by Huang, Ying

[permalink] [raw]
Subject: Re: [PATCH v6 2/2] memory tier: create CPUless memory tiers after obtaining HMAT info

"Ho-Ren (Jack) Chuang" <[email protected]> writes:

[snip]

> @@ -655,6 +672,34 @@ void mt_put_memory_types(struct list_head *memory_types)
> }
> EXPORT_SYMBOL_GPL(mt_put_memory_types);
>
> +/*
> + * This is invoked via `late_initcall()` to initialize memory tiers for
> + * CPU-less memory nodes after driver initialization, which is
> + * expected to provide `adistance` algorithms.
> + */
> +static int __init memory_tier_late_init(void)
> +{
> + int nid;
> +
> + mutex_lock(&memory_tier_lock);
> + for_each_node_state(nid, N_MEMORY)
> + if (!node_state(nid, N_CPU) &&
> + node_memory_types[nid].memtype == NULL)

Think about this again. It seems that it is better to check
"node_memory_types[nid].memtype == NULL" only here. Because for all
node with N_CPU in memory_tier_init(), "node_memory_types[nid].memtype"
will be !NULL. And it's possible (in theory) that some nodes becomes
"node_state(nid, N_CPU) == true" between memory_tier_init() and
memory_tier_late_init().

Otherwise, Looks good to me. Feel free to add

Reviewed-by: "Huang, Ying" <[email protected]>

in the future version.

> + /*
> + * Some device drivers may have initialized memory tiers
> + * between `memory_tier_init()` and `memory_tier_late_init()`,
> + * potentially bringing online memory nodes and
> + * configuring memory tiers. Exclude them here.
> + */
> + set_node_memory_tier(nid);
> +
> + establish_demotion_targets();
> + mutex_unlock(&memory_tier_lock);
> +
> + return 0;
> +}
> +late_initcall(memory_tier_late_init);
> +

[snip]

--
Best Regards,
Huang, Ying

2024-03-28 07:55:20

by Ho-Ren (Jack) Chuang

[permalink] [raw]
Subject: Re: [External] Re: [PATCH v6 2/2] memory tier: create CPUless memory tiers after obtaining HMAT info

On Wed, Mar 27, 2024 at 6:37 PM Huang, Ying <[email protected]> wrote:
>
> "Ho-Ren (Jack) Chuang" <[email protected]> writes:
>
> [snip]
>
> > @@ -655,6 +672,34 @@ void mt_put_memory_types(struct list_head *memory_types)
> > }
> > EXPORT_SYMBOL_GPL(mt_put_memory_types);
> >
> > +/*
> > + * This is invoked via `late_initcall()` to initialize memory tiers for
> > + * CPU-less memory nodes after driver initialization, which is
> > + * expected to provide `adistance` algorithms.
> > + */
> > +static int __init memory_tier_late_init(void)
> > +{
> > + int nid;
> > +
> > + mutex_lock(&memory_tier_lock);
> > + for_each_node_state(nid, N_MEMORY)
> > + if (!node_state(nid, N_CPU) &&
> > + node_memory_types[nid].memtype == NULL)
>
> Think about this again. It seems that it is better to check
> "node_memory_types[nid].memtype == NULL" only here. Because for all
> node with N_CPU in memory_tier_init(), "node_memory_types[nid].memtype"
> will be !NULL. And it's possible (in theory) that some nodes becomes
> "node_state(nid, N_CPU) == true" between memory_tier_init() and
> memory_tier_late_init().
>
> Otherwise, Looks good to me. Feel free to add
>
> Reviewed-by: "Huang, Ying" <[email protected]>
>
> in the future version.
>

Thank you Huang, Ying for your endorsement and
the feedback you've been giving!

> > + /*
> > + * Some device drivers may have initialized memory tiers
> > + * between `memory_tier_init()` and `memory_tier_late_init()`,
> > + * potentially bringing online memory nodes and
> > + * configuring memory tiers. Exclude them here.
> > + */
> > + set_node_memory_tier(nid);
> > +
> > + establish_demotion_targets();
> > + mutex_unlock(&memory_tier_lock);
> > +
> > + return 0;
> > +}
> > +late_initcall(memory_tier_late_init);
> > +
>
> [snip]
>
> --
> Best Regards,
> Huang, Ying



--
Best regards,
Ho-Ren (Jack) Chuang
莊賀任