2023-04-18 11:34:01

by Dmitry Rokosov

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Subject: [PATCH v2 2/5] usb: dwc2: support dwc2 IP for Amlogic A1 SoC family

The Amlogic A1 uses dwc2 Synopsys IP as its USB peripheral (gadget)
endpoint, with different DWC2 parameters when compared to previous
Amlogic SoCs.

Signed-off-by: Dmitry Rokosov <[email protected]>
---
drivers/usb/dwc2/params.c | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)

diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c
index 9ed9fd956940..098fbfc774ab 100644
--- a/drivers/usb/dwc2/params.c
+++ b/drivers/usb/dwc2/params.c
@@ -161,6 +161,25 @@ static void dwc2_set_amlogic_g12a_params(struct dwc2_hsotg *hsotg)
p->hird_threshold_en = false;
}

+static void dwc2_set_amlogic_a1_params(struct dwc2_hsotg *hsotg)
+{
+ struct dwc2_core_params *p = &hsotg->params;
+
+ p->otg_caps.hnp_support = false;
+ p->otg_caps.srp_support = false;
+ p->speed = DWC2_SPEED_PARAM_HIGH;
+ p->host_rx_fifo_size = 192;
+ p->host_nperio_tx_fifo_size = 128;
+ p->host_perio_tx_fifo_size = 128;
+ p->phy_type = DWC2_PHY_TYPE_PARAM_UTMI;
+ p->phy_utmi_width = 8;
+ p->ahbcfg = GAHBCFG_HBSTLEN_INCR8 << GAHBCFG_HBSTLEN_SHIFT;
+ p->lpm = false;
+ p->lpm_clock_gating = false;
+ p->besl = false;
+ p->hird_threshold_en = false;
+}
+
static void dwc2_set_amcc_params(struct dwc2_hsotg *hsotg)
{
struct dwc2_core_params *p = &hsotg->params;
@@ -258,6 +277,8 @@ const struct of_device_id dwc2_of_match_table[] = {
.data = dwc2_set_amlogic_params },
{ .compatible = "amlogic,meson-g12a-usb",
.data = dwc2_set_amlogic_g12a_params },
+ { .compatible = "amlogic,meson-a1-usb",
+ .data = dwc2_set_amlogic_a1_params },
{ .compatible = "amcc,dwc-otg", .data = dwc2_set_amcc_params },
{ .compatible = "apm,apm82181-dwc-otg", .data = dwc2_set_amcc_params },
{ .compatible = "st,stm32f4x9-fsotg",
--
2.36.0


2023-04-18 11:46:01

by Neil Armstrong

[permalink] [raw]
Subject: Re: [PATCH v2 2/5] usb: dwc2: support dwc2 IP for Amlogic A1 SoC family

On 18/04/2023 13:16, Dmitry Rokosov wrote:
> The Amlogic A1 uses dwc2 Synopsys IP as its USB peripheral (gadget)
> endpoint, with different DWC2 parameters when compared to previous
> Amlogic SoCs.
>
> Signed-off-by: Dmitry Rokosov <[email protected]>
> ---
> drivers/usb/dwc2/params.c | 21 +++++++++++++++++++++
> 1 file changed, 21 insertions(+)
>
> diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c
> index 9ed9fd956940..098fbfc774ab 100644
> --- a/drivers/usb/dwc2/params.c
> +++ b/drivers/usb/dwc2/params.c
> @@ -161,6 +161,25 @@ static void dwc2_set_amlogic_g12a_params(struct dwc2_hsotg *hsotg)
> p->hird_threshold_en = false;
> }
>
> +static void dwc2_set_amlogic_a1_params(struct dwc2_hsotg *hsotg)
> +{
> + struct dwc2_core_params *p = &hsotg->params;
> +
> + p->otg_caps.hnp_support = false;
> + p->otg_caps.srp_support = false;
> + p->speed = DWC2_SPEED_PARAM_HIGH;
> + p->host_rx_fifo_size = 192;
> + p->host_nperio_tx_fifo_size = 128;
> + p->host_perio_tx_fifo_size = 128;
> + p->phy_type = DWC2_PHY_TYPE_PARAM_UTMI;
> + p->phy_utmi_width = 8;
> + p->ahbcfg = GAHBCFG_HBSTLEN_INCR8 << GAHBCFG_HBSTLEN_SHIFT;
> + p->lpm = false;
> + p->lpm_clock_gating = false;
> + p->besl = false;
> + p->hird_threshold_en = false;
> +}
> +
> static void dwc2_set_amcc_params(struct dwc2_hsotg *hsotg)
> {
> struct dwc2_core_params *p = &hsotg->params;
> @@ -258,6 +277,8 @@ const struct of_device_id dwc2_of_match_table[] = {
> .data = dwc2_set_amlogic_params },
> { .compatible = "amlogic,meson-g12a-usb",
> .data = dwc2_set_amlogic_g12a_params },
> + { .compatible = "amlogic,meson-a1-usb",
> + .data = dwc2_set_amlogic_a1_params },
> { .compatible = "amcc,dwc-otg", .data = dwc2_set_amcc_params },
> { .compatible = "apm,apm82181-dwc-otg", .data = dwc2_set_amcc_params },
> { .compatible = "st,stm32f4x9-fsotg",

Reviewed-by: Neil Armstrong <[email protected]>

2023-04-21 05:07:02

by Minas Harutyunyan

[permalink] [raw]
Subject: Re: [PATCH v2 2/5] usb: dwc2: support dwc2 IP for Amlogic A1 SoC family

On 4/18/23 15:16, Dmitry Rokosov wrote:
> The Amlogic A1 uses dwc2 Synopsys IP as its USB peripheral (gadget)
> endpoint, with different DWC2 parameters when compared to previous
> Amlogic SoCs.
>
> Signed-off-by: Dmitry Rokosov <[email protected]>

Acked-by: Minas Harutyunyan <[email protected]>


> ---
> drivers/usb/dwc2/params.c | 21 +++++++++++++++++++++
> 1 file changed, 21 insertions(+)
>
> diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c
> index 9ed9fd956940..098fbfc774ab 100644
> --- a/drivers/usb/dwc2/params.c
> +++ b/drivers/usb/dwc2/params.c
> @@ -161,6 +161,25 @@ static void dwc2_set_amlogic_g12a_params(struct dwc2_hsotg *hsotg)
> p->hird_threshold_en = false;
> }
>
> +static void dwc2_set_amlogic_a1_params(struct dwc2_hsotg *hsotg)
> +{
> + struct dwc2_core_params *p = &hsotg->params;
> +
> + p->otg_caps.hnp_support = false;
> + p->otg_caps.srp_support = false;
> + p->speed = DWC2_SPEED_PARAM_HIGH;
> + p->host_rx_fifo_size = 192;
> + p->host_nperio_tx_fifo_size = 128;
> + p->host_perio_tx_fifo_size = 128;
> + p->phy_type = DWC2_PHY_TYPE_PARAM_UTMI;
> + p->phy_utmi_width = 8;
> + p->ahbcfg = GAHBCFG_HBSTLEN_INCR8 << GAHBCFG_HBSTLEN_SHIFT;
> + p->lpm = false;
> + p->lpm_clock_gating = false;
> + p->besl = false;
> + p->hird_threshold_en = false;
> +}
> +
> static void dwc2_set_amcc_params(struct dwc2_hsotg *hsotg)
> {
> struct dwc2_core_params *p = &hsotg->params;
> @@ -258,6 +277,8 @@ const struct of_device_id dwc2_of_match_table[] = {
> .data = dwc2_set_amlogic_params },
> { .compatible = "amlogic,meson-g12a-usb",
> .data = dwc2_set_amlogic_g12a_params },
> + { .compatible = "amlogic,meson-a1-usb",
> + .data = dwc2_set_amlogic_a1_params },
> { .compatible = "amcc,dwc-otg", .data = dwc2_set_amcc_params },
> { .compatible = "apm,apm82181-dwc-otg", .data = dwc2_set_amcc_params },
> { .compatible = "st,stm32f4x9-fsotg",