2021-03-15 10:48:59

by Srinivas Neeli

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Subject: [PATCH 2/9] watchdog: of_xilinx_wdt: Used BIT macro

From: Srinivas Goud <[email protected]>

Used BIT macro instead of mask value.

Signed-off-by: Srinivas Goud <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Signed-off-by: Srinivas Neeli <[email protected]>
---
drivers/watchdog/of_xilinx_wdt.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/watchdog/of_xilinx_wdt.c b/drivers/watchdog/of_xilinx_wdt.c
index 00549164b3d7..0d7df2370db7 100644
--- a/drivers/watchdog/of_xilinx_wdt.c
+++ b/drivers/watchdog/of_xilinx_wdt.c
@@ -24,12 +24,12 @@
#define XWT_TBR_OFFSET 0x8 /* Timebase Register Offset */

/* Control/Status Register Masks */
-#define XWT_CSR0_WRS_MASK 0x00000008 /* Reset status */
-#define XWT_CSR0_WDS_MASK 0x00000004 /* Timer state */
-#define XWT_CSR0_EWDT1_MASK 0x00000002 /* Enable bit 1 */
+#define XWT_CSR0_WRS_MASK BIT(3) /* Reset status */
+#define XWT_CSR0_WDS_MASK BIT(2) /* Timer state */
+#define XWT_CSR0_EWDT1_MASK BIT(1) /* Enable bit 1 */

/* Control/Status Register 0/1 bits */
-#define XWT_CSRX_EWDT2_MASK 0x00000001 /* Enable bit 2 */
+#define XWT_CSRX_EWDT2_MASK BIT(0) /* Enable bit 2 */

/* SelfTest constants */
#define XWT_MAX_SELFTEST_LOOP_COUNT 0x00010000
--
2.7.4


2021-03-16 11:20:09

by Guenter Roeck

[permalink] [raw]
Subject: Re: [PATCH 2/9] watchdog: of_xilinx_wdt: Used BIT macro

On 3/15/21 3:46 AM, Srinivas Neeli wrote:
> From: Srinivas Goud <[email protected]>
>
> Used BIT macro instead of mask value.
>
> Signed-off-by: Srinivas Goud <[email protected]>
> Signed-off-by: Michal Simek <[email protected]>
> Signed-off-by: Srinivas Neeli <[email protected]>
> ---
> drivers/watchdog/of_xilinx_wdt.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/watchdog/of_xilinx_wdt.c b/drivers/watchdog/of_xilinx_wdt.c
> index 00549164b3d7..0d7df2370db7 100644
> --- a/drivers/watchdog/of_xilinx_wdt.c
> +++ b/drivers/watchdog/of_xilinx_wdt.c
> @@ -24,12 +24,12 @@
> #define XWT_TBR_OFFSET 0x8 /* Timebase Register Offset */
>
> /* Control/Status Register Masks */
> -#define XWT_CSR0_WRS_MASK 0x00000008 /* Reset status */
> -#define XWT_CSR0_WDS_MASK 0x00000004 /* Timer state */
> -#define XWT_CSR0_EWDT1_MASK 0x00000002 /* Enable bit 1 */
> +#define XWT_CSR0_WRS_MASK BIT(3) /* Reset status */
> +#define XWT_CSR0_WDS_MASK BIT(2) /* Timer state */
> +#define XWT_CSR0_EWDT1_MASK BIT(1) /* Enable bit 1 */
>
> /* Control/Status Register 0/1 bits */
> -#define XWT_CSRX_EWDT2_MASK 0x00000001 /* Enable bit 2 */
> +#define XWT_CSRX_EWDT2_MASK BIT(0) /* Enable bit 2 */
>

Requires #include <linux/bits.h>

> /* SelfTest constants */
> #define XWT_MAX_SELFTEST_LOOP_COUNT 0x00010000
>

2021-03-25 01:13:18

by Srinivas Neeli

[permalink] [raw]
Subject: RE: [PATCH 2/9] watchdog: of_xilinx_wdt: Used BIT macro

Hi,

> -----Original Message-----
> From: Guenter Roeck <[email protected]> On Behalf Of Guenter Roeck
> Sent: Tuesday, March 16, 2021 7:53 AM
> To: Srinivas Neeli <[email protected]>; Michal Simek <[email protected]>;
> Shubhrajyoti Datta <[email protected]>; Srinivas Goud
> <[email protected]>
> Cc: [email protected]; [email protected]; linux-arm-
> [email protected]; [email protected]; git
> <[email protected]>; Srinivas Goud <[email protected]>
> Subject: Re: [PATCH 2/9] watchdog: of_xilinx_wdt: Used BIT macro
>
> On 3/15/21 3:46 AM, Srinivas Neeli wrote:
> > From: Srinivas Goud <[email protected]>
> >
> > Used BIT macro instead of mask value.
> >
> > Signed-off-by: Srinivas Goud <[email protected]>
> > Signed-off-by: Michal Simek <[email protected]>
> > Signed-off-by: Srinivas Neeli <[email protected]>
> > ---
> > drivers/watchdog/of_xilinx_wdt.c | 8 ++++----
> > 1 file changed, 4 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/watchdog/of_xilinx_wdt.c
> > b/drivers/watchdog/of_xilinx_wdt.c
> > index 00549164b3d7..0d7df2370db7 100644
> > --- a/drivers/watchdog/of_xilinx_wdt.c
> > +++ b/drivers/watchdog/of_xilinx_wdt.c
> > @@ -24,12 +24,12 @@
> > #define XWT_TBR_OFFSET 0x8 /* Timebase Register Offset */
> >
> > /* Control/Status Register Masks */
> > -#define XWT_CSR0_WRS_MASK 0x00000008 /* Reset status */
> > -#define XWT_CSR0_WDS_MASK 0x00000004 /* Timer state */
> > -#define XWT_CSR0_EWDT1_MASK 0x00000002 /* Enable bit 1 */
> > +#define XWT_CSR0_WRS_MASK BIT(3) /* Reset status */
> > +#define XWT_CSR0_WDS_MASK BIT(2) /* Timer state */
> > +#define XWT_CSR0_EWDT1_MASK BIT(1) /* Enable bit 1 */
> >
> > /* Control/Status Register 0/1 bits */ -#define XWT_CSRX_EWDT2_MASK
> > 0x00000001 /* Enable bit 2 */
> > +#define XWT_CSRX_EWDT2_MASK BIT(0) /* Enable bit 2 */
> >
>
> Requires #include <linux/bits.h>

Will update in V2 series.

>
> > /* SelfTest constants */
> > #define XWT_MAX_SELFTEST_LOOP_COUNT 0x00010000
> >