Make just one .setup_arch and one .init_IRQ callback implementation for all
P2020 board code. This deduplicate repeated and same code.
Signed-off-by: Pali Rohár <[email protected]>
---
arch/powerpc/platforms/85xx/p2020.c | 97 +++++++++--------------------
1 file changed, 30 insertions(+), 67 deletions(-)
diff --git a/arch/powerpc/platforms/85xx/p2020.c b/arch/powerpc/platforms/85xx/p2020.c
index d65d4c88ac47..d327e6c9b838 100644
--- a/arch/powerpc/platforms/85xx/p2020.c
+++ b/arch/powerpc/platforms/85xx/p2020.c
@@ -42,9 +42,8 @@
#define DBG(fmt, args...)
#endif
-#ifdef CONFIG_MPC85xx_DS
-
#ifdef CONFIG_PPC_I8259
+
static void mpc85xx_8259_cascade(struct irq_desc *desc)
{
struct irq_chip *chip = irq_desc_get_chip(desc);
@@ -55,37 +54,21 @@ static void mpc85xx_8259_cascade(struct irq_desc *desc)
}
chip->irq_eoi(&desc->irq_data);
}
-#endif /* CONFIG_PPC_I8259 */
-static void __init mpc85xx_ds_pic_init(void)
+static void mpc85xx_8259_init(void)
{
- struct mpic *mpic;
-#ifdef CONFIG_PPC_I8259
struct device_node *np;
struct device_node *cascade_node = NULL;
int cascade_irq;
-#endif
-
- mpic = mpic_alloc(NULL, 0,
- MPIC_BIG_ENDIAN |
- MPIC_SINGLE_DEST_CPU,
- 0, 256, " OpenPIC ");
- BUG_ON(mpic == NULL);
- mpic_init(mpic);
-
-#ifdef CONFIG_PPC_I8259
- /* Initialize the i8259 controller */
for_each_node_by_type(np, "interrupt-controller")
if (of_device_is_compatible(np, "chrp,iic")) {
cascade_node = np;
break;
}
- if (cascade_node == NULL) {
- printk(KERN_DEBUG "Could not find i8259 PIC\n");
+ if (cascade_node == NULL)
return;
- }
cascade_irq = irq_of_parse_and_map(cascade_node, 0);
if (!cascade_irq) {
@@ -93,12 +76,30 @@ static void __init mpc85xx_ds_pic_init(void)
return;
}
- DBG("mpc85xxds: cascade mapped to irq %d\n", cascade_irq);
+ DBG("i8259: cascade mapped to irq %d\n", cascade_irq);
i8259_init(cascade_node, 0);
of_node_put(cascade_node);
irq_set_chained_handler(cascade_irq, mpc85xx_8259_cascade);
+}
+
+#endif /* CONFIG_PPC_I8259 */
+
+static void __init p2020_pic_init(void)
+{
+ struct mpic *mpic;
+
+ mpic = mpic_alloc(NULL, 0,
+ MPIC_BIG_ENDIAN |
+ MPIC_SINGLE_DEST_CPU,
+ 0, 256, " OpenPIC ");
+
+ BUG_ON(mpic == NULL);
+ mpic_init(mpic);
+
+#ifdef CONFIG_PPC_I8259
+ mpc85xx_8259_init();
#endif /* CONFIG_PPC_I8259 */
}
@@ -138,58 +139,20 @@ static void __init mpc85xx_ds_uli_init(void)
#endif
}
-#endif /* CONFIG_MPC85xx_DS */
-
-#ifdef CONFIG_MPC85xx_RDB
-static void __init mpc85xx_rdb_pic_init(void)
-{
- struct mpic *mpic;
-
- mpic = mpic_alloc(NULL, 0,
- MPIC_BIG_ENDIAN |
- MPIC_SINGLE_DEST_CPU,
- 0, 256, " OpenPIC ");
-
- BUG_ON(mpic == NULL);
- mpic_init(mpic);
-}
-#endif /* CONFIG_MPC85xx_RDB */
-
/*
* Setup the architecture
*/
-#ifdef CONFIG_MPC85xx_DS
-static void __init mpc85xx_ds_setup_arch(void)
+static void __init p2020_setup_arch(void)
{
- if (ppc_md.progress)
- ppc_md.progress("mpc85xx_ds_setup_arch()", 0);
-
swiotlb_detect_4g();
fsl_pci_assign_primary();
mpc85xx_ds_uli_init();
mpc85xx_smp_init();
- printk("MPC85xx DS board from Freescale Semiconductor\n");
-}
-#endif /* CONFIG_MPC85xx_DS */
-
-#ifdef CONFIG_MPC85xx_RDB
-static void __init mpc85xx_rdb_setup_arch(void)
-{
- if (ppc_md.progress)
- ppc_md.progress("mpc85xx_rdb_setup_arch()", 0);
-
- mpc85xx_smp_init();
-
- fsl_pci_assign_primary();
-
#ifdef CONFIG_QUICC_ENGINE
mpc85xx_qe_par_io_init();
-#endif /* CONFIG_QUICC_ENGINE */
-
- printk(KERN_INFO "MPC85xx RDB board from Freescale Semiconductor\n");
+#endif
}
-#endif /* CONFIG_MPC85xx_RDB */
#ifdef CONFIG_MPC85xx_DS
machine_arch_initcall(p2020_ds, mpc85xx_common_publish_devices);
@@ -230,8 +193,8 @@ static int __init p2020_rdb_pc_probe(void)
define_machine(p2020_ds) {
.name = "P2020 DS",
.probe = p2020_ds_probe,
- .setup_arch = mpc85xx_ds_setup_arch,
- .init_IRQ = mpc85xx_ds_pic_init,
+ .setup_arch = p2020_setup_arch,
+ .init_IRQ = p2020_pic_init,
#ifdef CONFIG_PCI
.pcibios_fixup_bus = fsl_pcibios_fixup_bus,
.pcibios_fixup_phb = fsl_pcibios_fixup_phb,
@@ -246,8 +209,8 @@ define_machine(p2020_ds) {
define_machine(p2020_rdb) {
.name = "P2020 RDB",
.probe = p2020_rdb_probe,
- .setup_arch = mpc85xx_rdb_setup_arch,
- .init_IRQ = mpc85xx_rdb_pic_init,
+ .setup_arch = p2020_setup_arch,
+ .init_IRQ = p2020_pic_init,
#ifdef CONFIG_PCI
.pcibios_fixup_bus = fsl_pcibios_fixup_bus,
.pcibios_fixup_phb = fsl_pcibios_fixup_phb,
@@ -260,8 +223,8 @@ define_machine(p2020_rdb) {
define_machine(p2020_rdb_pc) {
.name = "P2020RDB-PC",
.probe = p2020_rdb_pc_probe,
- .setup_arch = mpc85xx_rdb_setup_arch,
- .init_IRQ = mpc85xx_rdb_pic_init,
+ .setup_arch = p2020_setup_arch,
+ .init_IRQ = p2020_pic_init,
#ifdef CONFIG_PCI
.pcibios_fixup_bus = fsl_pcibios_fixup_bus,
.pcibios_fixup_phb = fsl_pcibios_fixup_phb,
--
2.20.1
Le 19/08/2022 à 21:15, Pali Rohár a écrit :
> Make just one .setup_arch and one .init_IRQ callback implementation for all
> P2020 board code. This deduplicate repeated and same code.
I think this patch should be split in two parts:
First patch : Create function mpc85xx_8259_init
Second patch : Refactor.
>
> Signed-off-by: Pali Rohár <[email protected]>
> ---
> arch/powerpc/platforms/85xx/p2020.c | 97 +++++++++--------------------
> 1 file changed, 30 insertions(+), 67 deletions(-)
>
> diff --git a/arch/powerpc/platforms/85xx/p2020.c b/arch/powerpc/platforms/85xx/p2020.c
> index d65d4c88ac47..d327e6c9b838 100644
> --- a/arch/powerpc/platforms/85xx/p2020.c
> +++ b/arch/powerpc/platforms/85xx/p2020.c
> @@ -42,9 +42,8 @@
> #define DBG(fmt, args...)
> #endif
>
> -#ifdef CONFIG_MPC85xx_DS
> -
> #ifdef CONFIG_PPC_I8259
> +
> static void mpc85xx_8259_cascade(struct irq_desc *desc)
> {
> struct irq_chip *chip = irq_desc_get_chip(desc);
> @@ -55,37 +54,21 @@ static void mpc85xx_8259_cascade(struct irq_desc *desc)
> }
> chip->irq_eoi(&desc->irq_data);
> }
> -#endif /* CONFIG_PPC_I8259 */
>
> -static void __init mpc85xx_ds_pic_init(void)
> +static void mpc85xx_8259_init(void)
> {
> - struct mpic *mpic;
> -#ifdef CONFIG_PPC_I8259
> struct device_node *np;
> struct device_node *cascade_node = NULL;
> int cascade_irq;
> -#endif
> -
> - mpic = mpic_alloc(NULL, 0,
> - MPIC_BIG_ENDIAN |
> - MPIC_SINGLE_DEST_CPU,
> - 0, 256, " OpenPIC ");
>
> - BUG_ON(mpic == NULL);
> - mpic_init(mpic);
> -
> -#ifdef CONFIG_PPC_I8259
> - /* Initialize the i8259 controller */
> for_each_node_by_type(np, "interrupt-controller")
> if (of_device_is_compatible(np, "chrp,iic")) {
> cascade_node = np;
> break;
> }
>
> - if (cascade_node == NULL) {
> - printk(KERN_DEBUG "Could not find i8259 PIC\n");
> + if (cascade_node == NULL)
> return;
> - }
>
> cascade_irq = irq_of_parse_and_map(cascade_node, 0);
> if (!cascade_irq) {
> @@ -93,12 +76,30 @@ static void __init mpc85xx_ds_pic_init(void)
> return;
> }
>
> - DBG("mpc85xxds: cascade mapped to irq %d\n", cascade_irq);
> + DBG("i8259: cascade mapped to irq %d\n", cascade_irq);
>
> i8259_init(cascade_node, 0);
> of_node_put(cascade_node);
>
> irq_set_chained_handler(cascade_irq, mpc85xx_8259_cascade);
> +}
> +
> +#endif /* CONFIG_PPC_I8259 */
> +
> +static void __init p2020_pic_init(void)
> +{
> + struct mpic *mpic;
> +
> + mpic = mpic_alloc(NULL, 0,
> + MPIC_BIG_ENDIAN |
> + MPIC_SINGLE_DEST_CPU,
> + 0, 256, " OpenPIC ");
> +
> + BUG_ON(mpic == NULL);
> + mpic_init(mpic);
> +
> +#ifdef CONFIG_PPC_I8259
> + mpc85xx_8259_init();
> #endif /* CONFIG_PPC_I8259 */
> }
>
> @@ -138,58 +139,20 @@ static void __init mpc85xx_ds_uli_init(void)
> #endif
> }
>
> -#endif /* CONFIG_MPC85xx_DS */
> -
> -#ifdef CONFIG_MPC85xx_RDB
> -static void __init mpc85xx_rdb_pic_init(void)
> -{
> - struct mpic *mpic;
> -
> - mpic = mpic_alloc(NULL, 0,
> - MPIC_BIG_ENDIAN |
> - MPIC_SINGLE_DEST_CPU,
> - 0, 256, " OpenPIC ");
> -
> - BUG_ON(mpic == NULL);
> - mpic_init(mpic);
> -}
> -#endif /* CONFIG_MPC85xx_RDB */
> -
> /*
> * Setup the architecture
> */
> -#ifdef CONFIG_MPC85xx_DS
> -static void __init mpc85xx_ds_setup_arch(void)
> +static void __init p2020_setup_arch(void)
> {
> - if (ppc_md.progress)
> - ppc_md.progress("mpc85xx_ds_setup_arch()", 0);
> -
> swiotlb_detect_4g();
> fsl_pci_assign_primary();
> mpc85xx_ds_uli_init();
> mpc85xx_smp_init();
>
> - printk("MPC85xx DS board from Freescale Semiconductor\n");
> -}
> -#endif /* CONFIG_MPC85xx_DS */
> -
> -#ifdef CONFIG_MPC85xx_RDB
> -static void __init mpc85xx_rdb_setup_arch(void)
> -{
> - if (ppc_md.progress)
> - ppc_md.progress("mpc85xx_rdb_setup_arch()", 0);
> -
> - mpc85xx_smp_init();
> -
> - fsl_pci_assign_primary();
> -
> #ifdef CONFIG_QUICC_ENGINE
> mpc85xx_qe_par_io_init();
> -#endif /* CONFIG_QUICC_ENGINE */
> -
> - printk(KERN_INFO "MPC85xx RDB board from Freescale Semiconductor\n");
> +#endif
> }
> -#endif /* CONFIG_MPC85xx_RDB */
>
> #ifdef CONFIG_MPC85xx_DS
> machine_arch_initcall(p2020_ds, mpc85xx_common_publish_devices);
> @@ -230,8 +193,8 @@ static int __init p2020_rdb_pc_probe(void)
> define_machine(p2020_ds) {
> .name = "P2020 DS",
> .probe = p2020_ds_probe,
> - .setup_arch = mpc85xx_ds_setup_arch,
> - .init_IRQ = mpc85xx_ds_pic_init,
> + .setup_arch = p2020_setup_arch,
> + .init_IRQ = p2020_pic_init,
> #ifdef CONFIG_PCI
> .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
> .pcibios_fixup_phb = fsl_pcibios_fixup_phb,
> @@ -246,8 +209,8 @@ define_machine(p2020_ds) {
> define_machine(p2020_rdb) {
> .name = "P2020 RDB",
> .probe = p2020_rdb_probe,
> - .setup_arch = mpc85xx_rdb_setup_arch,
> - .init_IRQ = mpc85xx_rdb_pic_init,
> + .setup_arch = p2020_setup_arch,
> + .init_IRQ = p2020_pic_init,
> #ifdef CONFIG_PCI
> .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
> .pcibios_fixup_phb = fsl_pcibios_fixup_phb,
> @@ -260,8 +223,8 @@ define_machine(p2020_rdb) {
> define_machine(p2020_rdb_pc) {
> .name = "P2020RDB-PC",
> .probe = p2020_rdb_pc_probe,
> - .setup_arch = mpc85xx_rdb_setup_arch,
> - .init_IRQ = mpc85xx_rdb_pic_init,
> + .setup_arch = p2020_setup_arch,
> + .init_IRQ = p2020_pic_init,
> #ifdef CONFIG_PCI
> .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
> .pcibios_fixup_phb = fsl_pcibios_fixup_phb,