One of the QUSB USB PHY-s has been left enabled by
default, this is probably just a mistake as other
USB PHY-s are disabled by default.
It makes no sense to have it enabled by default as
not all board implement USB ports, so disable it.
Signed-off-by: Robert Marko <[email protected]>
---
arch/arm64/boot/dts/qcom/ipq8074.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
index 555a107959831..20059d0f7d714 100644
--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
@@ -286,6 +286,7 @@ qusb_phy_0: phy@79000 {
clock-names = "cfg_ahb", "ref";
resets = <&gcc GCC_QUSB2_0_PHY_BCR>;
+ status = "disabled";
};
qmp_pcie_phy0: phy@84000 {
--
2.31.1
On 2021-05-26 20:31, Robert Marko wrote:
> One of the QUSB USB PHY-s has been left enabled by
> default, this is probably just a mistake as other
> USB PHY-s are disabled by default.
>
> It makes no sense to have it enabled by default as
> not all board implement USB ports, so disable it.
>
> Signed-off-by: Robert Marko <[email protected]>
Always, it is better to disable in SOC DTS and enable only in the board
DTS files.
Reviewed-by: Kathiravan T <[email protected]>
> ---
> arch/arm64/boot/dts/qcom/ipq8074.dtsi | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
> b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
> index 555a107959831..20059d0f7d714 100644
> --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
> +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
> @@ -286,6 +286,7 @@ qusb_phy_0: phy@79000 {
> clock-names = "cfg_ahb", "ref";
>
> resets = <&gcc GCC_QUSB2_0_PHY_BCR>;
> + status = "disabled";
> };
>
> qmp_pcie_phy0: phy@84000 {
--
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