Reduce and split pcie controller memory ranges for en7523 SoC
in order to properly load a pcie card on the second port.
Fixes: 08a4aeb2c23f ("ARM: dts: Add PCIe support for Airoha EN7523")
Signed-off-by: Lorenzo Bianconi <[email protected]>
---
arch/arm/boot/dts/airoha/en7523.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/airoha/en7523.dtsi b/arch/arm/boot/dts/airoha/en7523.dtsi
index b523a868c4ad..bb78d54e94f6 100644
--- a/arch/arm/boot/dts/airoha/en7523.dtsi
+++ b/arch/arm/boot/dts/airoha/en7523.dtsi
@@ -159,7 +159,7 @@ pcie0: pcie@1fa91000 {
clocks = <&scu EN7523_CLK_PCIE>;
clock-names = "sys_ck0";
bus-range = <0x00 0xff>;
- ranges = <0x82000000 0 0x20000000 0x20000000 0 0x8000000>;
+ ranges = <0x82000000 0 0x20000000 0x20000000 0 0x2000000>;
status = "disabled";
#interrupt-cells = <1>;
@@ -188,7 +188,7 @@ pcie1: pcie@1fa92000 {
clocks = <&scu EN7523_CLK_PCIE>;
clock-names = "sys_ck1";
bus-range = <0x00 0xff>;
- ranges = <0x82000000 0 0x28000000 0x28000000 0 0x8000000>;
+ ranges = <0x82000000 0 0x22000000 0x22000000 0 0x2000000>;
status = "disabled";
#interrupt-cells = <1>;
--
2.43.0