2022-10-23 17:19:08

by Frank Wunderlich

[permalink] [raw]
Subject: [PATCH 0/3] rework mtk pcie-gen3 bindings and support mt7986

From: Frank Wunderlich <[email protected]>

This Series prepares support for mt7986 PCIe which is basicly gen3 PCIe
but with slightly differnt clock configuration.

To make differences better to read i split the exiting bindings which
has already different settings with a compatible switch and then add a
new one for mt7986.

Frank Wunderlich (3):
dt-bindings: PCI: mediatek-gen3: add SoC based clock config
dt-bindings: PCI: mediatek-gen3: add support for mt7986
dt-bindings: PCI: mediatek-gen3: add mt7986 clock config

.../bindings/pci/mediatek-pcie-gen3.yaml | 65 +++++++++++++++----
1 file changed, 53 insertions(+), 12 deletions(-)

--
2.34.1


2022-10-23 17:19:13

by Frank Wunderlich

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Subject: [PATCH 3/3] dt-bindings: PCI: mediatek-gen3: add mt7986 clock config

From: Frank Wunderlich <[email protected]>

MT7986 needs 4 clocks for PCIe, define them in binding.

Signed-off-by: Frank Wunderlich <[email protected]>
---
.../bindings/pci/mediatek-pcie-gen3.yaml | 16 ++++++++++++++++
1 file changed, 16 insertions(+)

diff --git a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
index 3662422b38ea..e6020e684c00 100644
--- a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
+++ b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
@@ -79,9 +79,11 @@ properties:
- const: mac

clocks:
+ minItems: 4
maxItems: 6

clock-names:
+ minItems: 4
maxItems: 6

assigned-clocks:
@@ -162,6 +164,20 @@ allOf:
- const: tl_32k
- const: peri_26m
- const: peri_mem
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - mediatek,mt7986-pcie
+ then:
+ properties:
+ clock-names:
+ items:
+ - const: pl_250m
+ - const: tl_26m
+ - const: peri_26m
+ - const: top_133m

unevaluatedProperties: false

--
2.34.1

2022-10-23 17:19:29

by Frank Wunderlich

[permalink] [raw]
Subject: [PATCH 1/3] dt-bindings: PCI: mediatek-gen3: add SoC based clock config

From: Frank Wunderlich <[email protected]>

The PCIe driver covers different SOC which needing different clock
configs. Define them based on compatible.

Signed-off-by: Frank Wunderlich <[email protected]>
---
.../bindings/pci/mediatek-pcie-gen3.yaml | 48 ++++++++++++++-----
1 file changed, 36 insertions(+), 12 deletions(-)

diff --git a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
index c00be39af64e..af0d2201746d 100644
--- a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
+++ b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
@@ -43,9 +43,6 @@ description: |+
each set has its own address for MSI message, and supports 32 MSI vectors
to generate interrupt.

-allOf:
- - $ref: /schemas/pci/pci-bus.yaml#
-
properties:
compatible:
oneOf:
@@ -84,15 +81,7 @@ properties:
maxItems: 6

clock-names:
- items:
- - const: pl_250m
- - const: tl_26m
- - const: tl_96m
- - const: tl_32k
- - const: peri_26m
- - enum:
- - top_133m # for MT8192
- - peri_mem # for MT8188/MT8195
+ maxItems: 6

assigned-clocks:
maxItems: 1
@@ -138,6 +127,41 @@ required:
- '#interrupt-cells'
- interrupt-controller

+allOf:
+ - $ref: /schemas/pci/pci-bus.yaml#
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: mediatek,mt8192-mmc
+ then:
+ properties:
+ clock-names:
+ items:
+ - const: pl_250m
+ - const: tl_26m
+ - const: tl_96m
+ - const: tl_32k
+ - const: peri_26m
+ - const: top_133m
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - mediatek,mt8188-pcie
+ - mediatek,mt8195-pcie
+ then:
+ properties:
+ clock-names:
+ items:
+ - const: pl_250m
+ - const: tl_26m
+ - const: tl_96m
+ - const: tl_32k
+ - const: peri_26m
+ - const: peri_mem
+
unevaluatedProperties: false

examples:
--
2.34.1

2022-10-24 21:41:18

by Rob Herring (Arm)

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Subject: Re: [PATCH 3/3] dt-bindings: PCI: mediatek-gen3: add mt7986 clock config

On Sun, Oct 23, 2022 at 07:02:34PM +0200, Frank Wunderlich wrote:
> From: Frank Wunderlich <[email protected]>
>
> MT7986 needs 4 clocks for PCIe, define them in binding.

Patch 2 is incomplete without this one. Therefore, patch 2 and 3 should
be 1 patch.

>
> Signed-off-by: Frank Wunderlich <[email protected]>
> ---
> .../bindings/pci/mediatek-pcie-gen3.yaml | 16 ++++++++++++++++
> 1 file changed, 16 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
> index 3662422b38ea..e6020e684c00 100644
> --- a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
> +++ b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
> @@ -79,9 +79,11 @@ properties:
> - const: mac
>
> clocks:
> + minItems: 4
> maxItems: 6
>
> clock-names:
> + minItems: 4
> maxItems: 6
>
> assigned-clocks:
> @@ -162,6 +164,20 @@ allOf:
> - const: tl_32k
> - const: peri_26m
> - const: peri_mem
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - mediatek,mt7986-pcie
> + then:
> + properties:
> + clock-names:
> + items:
> + - const: pl_250m
> + - const: tl_26m
> + - const: peri_26m
> + - const: top_133m
>
> unevaluatedProperties: false
>
> --
> 2.34.1
>
>

2022-10-24 22:15:54

by Rob Herring (Arm)

[permalink] [raw]
Subject: Re: [PATCH 1/3] dt-bindings: PCI: mediatek-gen3: add SoC based clock config

On Sun, 23 Oct 2022 19:02:32 +0200, Frank Wunderlich wrote:
> From: Frank Wunderlich <[email protected]>
>
> The PCIe driver covers different SOC which needing different clock
> configs. Define them based on compatible.
>
> Signed-off-by: Frank Wunderlich <[email protected]>
> ---
> .../bindings/pci/mediatek-pcie-gen3.yaml | 48 ++++++++++++++-----
> 1 file changed, 36 insertions(+), 12 deletions(-)
>

Reviewed-by: Rob Herring <[email protected]>

2022-10-25 01:46:45

by Jianjun Wang (王建军)

[permalink] [raw]
Subject: Re: [PATCH 1/3] dt-bindings: PCI: mediatek-gen3: add SoC based clock config

On Sun, 2022-10-23 at 19:02 +0200, Frank Wunderlich wrote:
> From: Frank Wunderlich <[email protected]>
>
> The PCIe driver covers different SOC which needing different clock
> configs. Define them based on compatible.
>
> Signed-off-by: Frank Wunderlich <[email protected]>
> ---
> .../bindings/pci/mediatek-pcie-gen3.yaml | 48 ++++++++++++++---
> --
> 1 file changed, 36 insertions(+), 12 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/pci/mediatek-pcie-
> gen3.yaml b/Documentation/devicetree/bindings/pci/mediatek-pcie-
> gen3.yaml
> index c00be39af64e..af0d2201746d 100644
> --- a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
> +++ b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
> @@ -43,9 +43,6 @@ description: |+
> each set has its own address for MSI message, and supports 32 MSI
> vectors
> to generate interrupt.
>
> -allOf:
> - - $ref: /schemas/pci/pci-bus.yaml#
> -
> properties:
> compatible:
> oneOf:
> @@ -84,15 +81,7 @@ properties:
> maxItems: 6
>
> clock-names:
> - items:
> - - const: pl_250m
> - - const: tl_26m
> - - const: tl_96m
> - - const: tl_32k
> - - const: peri_26m
> - - enum:
> - - top_133m # for MT8192
> - - peri_mem # for MT8188/MT8195
> + maxItems: 6
>
> assigned-clocks:
> maxItems: 1
> @@ -138,6 +127,41 @@ required:
> - '#interrupt-cells'
> - interrupt-controller
>
> +allOf:
> + - $ref: /schemas/pci/pci-bus.yaml#
> + - if:
> + properties:
> + compatible:
> + contains:
> + const: mediatek,mt8192-mmc

This should be "mediatek,mt8192-pcie".

> + then:
> + properties:
> + clock-names:
> + items:
> + - const: pl_250m
> + - const: tl_26m
> + - const: tl_96m
> + - const: tl_32k
> + - const: peri_26m
> + - const: top_133m
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - mediatek,mt8188-pcie
> + - mediatek,mt8195-pcie
> + then:
> + properties:
> + clock-names:
> + items:
> + - const: pl_250m
> + - const: tl_26m
> + - const: tl_96m
> + - const: tl_32k
> + - const: peri_26m
> + - const: peri_mem
> +
> unevaluatedProperties: false
>
> examples: