IPQ9574 has efuse region to determine the various HW quirks. Lets
add the initial support and the individual fuses will be added as they
are required.
Signed-off-by: Kathiravan T <[email protected]>
---
arch/arm64/boot/dts/qcom/ipq9574.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
index 1a2c813ffd43..715fe51ff567 100644
--- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
@@ -117,6 +117,13 @@
#size-cells = <1>;
ranges = <0 0 0 0xffffffff>;
+ qfprom: efuse@a4000 {
+ compatible = "qcom,ipq9574-qfprom", "qcom,qfprom";
+ reg = <0x000a4000 0x5a1>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ };
+
tlmm: pinctrl@1000000 {
compatible = "qcom,ipq9574-tlmm";
reg = <0x01000000 0x300000>;
--
2.17.1
On 26.05.2023 09:04, Kathiravan T wrote:
> IPQ9574 has efuse region to determine the various HW quirks. Lets
> add the initial support and the individual fuses will be added as they
> are required.
>
> Signed-off-by: Kathiravan T <[email protected]>
> ---
> arch/arm64/boot/dts/qcom/ipq9574.dtsi | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
> index 1a2c813ffd43..715fe51ff567 100644
> --- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi
> +++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
> @@ -117,6 +117,13 @@
> #size-cells = <1>;
> ranges = <0 0 0 0xffffffff>;
>
> + qfprom: efuse@a4000 {
> + compatible = "qcom,ipq9574-qfprom", "qcom,qfprom";
> + reg = <0x000a4000 0x5a1>;
That's an odd size. Are you sure this is how long the corrected region is?
Konrad
> + #address-cells = <1>;
> + #size-cells = <1>;
> + };
> +
> tlmm: pinctrl@1000000 {
> compatible = "qcom,ipq9574-tlmm";
> reg = <0x01000000 0x300000>;
On 5/26/2023 2:49 PM, Konrad Dybcio wrote:
>
> On 26.05.2023 09:04, Kathiravan T wrote:
>> IPQ9574 has efuse region to determine the various HW quirks. Lets
>> add the initial support and the individual fuses will be added as they
>> are required.
>>
>> Signed-off-by: Kathiravan T <[email protected]>
>> ---
>> arch/arm64/boot/dts/qcom/ipq9574.dtsi | 7 +++++++
>> 1 file changed, 7 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
>> index 1a2c813ffd43..715fe51ff567 100644
>> --- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
>> @@ -117,6 +117,13 @@
>> #size-cells = <1>;
>> ranges = <0 0 0 0xffffffff>;
>>
>> + qfprom: efuse@a4000 {
>> + compatible = "qcom,ipq9574-qfprom", "qcom,qfprom";
>> + reg = <0x000a4000 0x5a1>;
> That's an odd size. Are you sure this is how long the corrected region is?
Yes, As per the HW document, this is the size.
>
> Konrad
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + };
>> +
>> tlmm: pinctrl@1000000 {
>> compatible = "qcom,ipq9574-tlmm";
>> reg = <0x01000000 0x300000>;
On 26.05.2023 12:24, Kathiravan T wrote:
>
> On 5/26/2023 2:49 PM, Konrad Dybcio wrote:
>>
>> On 26.05.2023 09:04, Kathiravan T wrote:
>>> IPQ9574 has efuse region to determine the various HW quirks. Lets
>>> add the initial support and the individual fuses will be added as they
>>> are required.
>>>
>>> Signed-off-by: Kathiravan T <[email protected]>
>>> ---
>>> arch/arm64/boot/dts/qcom/ipq9574.dtsi | 7 +++++++
>>> 1 file changed, 7 insertions(+)
>>>
>>> diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
>>> index 1a2c813ffd43..715fe51ff567 100644
>>> --- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi
>>> +++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
>>> @@ -117,6 +117,13 @@
>>> #size-cells = <1>;
>>> ranges = <0 0 0 0xffffffff>;
>>> + qfprom: efuse@a4000 {
>>> + compatible = "qcom,ipq9574-qfprom", "qcom,qfprom";
>>> + reg = <0x000a4000 0x5a1>;
>> That's an odd size. Are you sure this is how long the corrected region is?
>
>
> Yes, As per the HW document, this is the size.
Thanks for confirming
Reviewed-by: Konrad Dybcio <[email protected]>
Konrad
>
>
>>
>> Konrad
>>> + #address-cells = <1>;
>>> + #size-cells = <1>;
>>> + };
>>> +
>>> tlmm: pinctrl@1000000 {
>>> compatible = "qcom,ipq9574-tlmm";
>>> reg = <0x01000000 0x300000>;