Set RESET_MCHP_SPARX5 as a tristate and add MODULE_DEVICE_TABLE() to
allow building this driver as a module.
Signed-off-by: Clément Léger <[email protected]>
---
drivers/reset/Kconfig | 2 +-
drivers/reset/reset-microchip-sparx5.c | 8 ++------
2 files changed, 3 insertions(+), 7 deletions(-)
diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index 93c8d07ee328..5afbe2daecb1 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -115,7 +115,7 @@ config RESET_LPC18XX
This enables the reset controller driver for NXP LPC18xx/43xx SoCs.
config RESET_MCHP_SPARX5
- bool "Microchip Sparx5 reset driver"
+ tristate "Microchip Sparx5 reset driver"
depends on ARCH_SPARX5 || SOC_LAN966 || COMPILE_TEST
default y if SPARX5_SWITCH
select MFD_SYSCON
diff --git a/drivers/reset/reset-microchip-sparx5.c b/drivers/reset/reset-microchip-sparx5.c
index 00b612a0effa..3d54dda3593e 100644
--- a/drivers/reset/reset-microchip-sparx5.c
+++ b/drivers/reset/reset-microchip-sparx5.c
@@ -149,6 +149,7 @@ static const struct of_device_id mchp_sparx5_reset_of_match[] = {
},
{ }
};
+MODULE_DEVICE_TABLE(of, mchp_sparx5_reset_of_match);
static struct platform_driver mchp_sparx5_reset_driver = {
.probe = mchp_sparx5_reset_probe,
@@ -158,12 +159,7 @@ static struct platform_driver mchp_sparx5_reset_driver = {
},
};
-static int __init mchp_sparx5_reset_init(void)
-{
- return platform_driver_register(&mchp_sparx5_reset_driver);
-}
-
-postcore_initcall(mchp_sparx5_reset_init);
+module_platform_driver(mchp_sparx5_reset_driver);
MODULE_DESCRIPTION("Microchip Sparx5 switch reset driver");
MODULE_AUTHOR("Steen Hegelund <[email protected]>");
--
2.36.1
Hi Clément,
On Fr, 2022-06-17 at 12:37 +0200, Clément Léger wrote:
> Set RESET_MCHP_SPARX5 as a tristate and add MODULE_DEVICE_TABLE() to
> allow building this driver as a module.
>
> Signed-off-by: Clément Léger <[email protected]>
Thank you, applied to reset/next.
regards
Philipp
Hi,
> On Fr, 2022-06-17 at 12:37 +0200, Clément Léger wrote:
> > Set RESET_MCHP_SPARX5 as a tristate and add MODULE_DEVICE_TABLE() to
> > allow building this driver as a module.
> >
> > Signed-off-by: Clément Léger <[email protected]>
>
> Thank you, applied to reset/next.
Unfortunately, this is breaking ethernet on my board
(lan966x-kontron-kswitch-d10-mmt-6g-2gs, see dts in arch/arm/).
I suspect this is because the postcore_initcall() was called earlier
in the kernel startup. Now, somehow the MDIO controller isn't working
anymore.
For a bit of a background, on the LAN9668 (I guess this is also true
on most other microchip switch platforms), there is a global switch
reset which is shared among most subsystems, i.e GPIO, SGPIO and
switch core. The switch driver will use this reset as there is no other
reset available (e.g. one which only reset the switching core). But when
it asserts the reset it will also reset other devices on the SoC. This
was for example the case for the GPIO, see commit 453200af8a85 ("pinctrl:
ocelot: add optional shared reset"). It seems like the MIIM is also
affected by this global reset, thus it needs the same fix.
I tried the obvious by adding the reset to the MIIM, but that didn't
help for all broken interfaces. I have to dig deeper into that.
In the meantime I'd appreciate it if this commit can be reverted until
the other fixes (at least the missing MIIM reset) will be merged.
-michael
Hi Michael,
On Di, 2022-07-12 at 14:58 +0200, Michael Walle wrote:
> Hi,
>
> > On Fr, 2022-06-17 at 12:37 +0200, Clément Léger wrote:
> > > Set RESET_MCHP_SPARX5 as a tristate and add MODULE_DEVICE_TABLE() to
> > > allow building this driver as a module.
> > >
> > > Signed-off-by: Clément Léger <[email protected]>
> >
> > Thank you, applied to reset/next.
>
> Unfortunately, this is breaking ethernet on my board
> (lan966x-kontron-kswitch-d10-mmt-6g-2gs, see dts in arch/arm/).
>
> I suspect this is because the postcore_initcall() was called earlier
> in the kernel startup. Now, somehow the MDIO controller isn't working
> anymore.
>
> For a bit of a background, on the LAN9668 (I guess this is also true
> on most other microchip switch platforms), there is a global switch
> reset which is shared among most subsystems, i.e GPIO, SGPIO and
> switch core. The switch driver will use this reset as there is no other
> reset available (e.g. one which only reset the switching core). But when
> it asserts the reset it will also reset other devices on the SoC. This
> was for example the case for the GPIO, see commit 453200af8a85 ("pinctrl:
> ocelot: add optional shared reset"). It seems like the MIIM is also
> affected by this global reset, thus it needs the same fix.
>
> I tried the obvious by adding the reset to the MIIM, but that didn't
> help for all broken interfaces. I have to dig deeper into that.
>
> In the meantime I'd appreciate it if this commit can be reverted until
> the other fixes (at least the missing MIIM reset) will be merged.
Thank you for catching this so quickly, I've sent a revert [1].
I'll add that to reset/next, please let me know when this is fixed.
[1] https://lore.kernel.org/all/[email protected]/
regards
Philipp