Hi all,
Just building Linus' tree, today's linux-next build (arm
multi_v7_defconfig) failed like this:
arm-linux-gnueabi-ld: drivers/irqchip/irq-gic-v3-its.o: in function `its_vpe_irq_domain_alloc':
irq-gic-v3-its.c:(.text+0x3d50): undefined reference to `__aeabi_uldivmod'
Caused by commit
4e6437f12d6e ("irqchip/gic-v4.1: Ensure L2 vPE table is allocated at RD level")
I have reverted that commit (and the following 3 commits) for today.
Those commits were not in linux-next before being merged by Linus. :-(
--
Cheers,
Stephen Rothwell
On Sun, Feb 9, 2020 at 1:08 PM Stephen Rothwell <[email protected]> wrote:
>
> Just building Linus' tree, today's linux-next build (arm
> multi_v7_defconfig) failed like this:
>
> arm-linux-gnueabi-ld: drivers/irqchip/irq-gic-v3-its.o: in function `its_vpe_irq_domain_alloc':
> irq-gic-v3-its.c:(.text+0x3d50): undefined reference to `__aeabi_uldivmod'
>
> Caused by commit
>
> 4e6437f12d6e ("irqchip/gic-v4.1: Ensure L2 vPE table is allocated at RD level")
Ahh. 64-bit divides without using do_div() and friends.
Is GICv4 even relevant for 32-bit ARM?
Linus
On Sun, 9 Feb 2020 13:24:18 -0800
Linus Torvalds <[email protected]> wrote:
Stephen, Linus,
> On Sun, Feb 9, 2020 at 1:08 PM Stephen Rothwell <[email protected]> wrote:
> >
> > Just building Linus' tree, today's linux-next build (arm
> > multi_v7_defconfig) failed like this:
> >
> > arm-linux-gnueabi-ld: drivers/irqchip/irq-gic-v3-its.o: in function `its_vpe_irq_domain_alloc':
> > irq-gic-v3-its.c:(.text+0x3d50): undefined reference to `__aeabi_uldivmod'
> >
> > Caused by commit
> >
> > 4e6437f12d6e ("irqchip/gic-v4.1: Ensure L2 vPE table is allocated at RD level")
Gniii... Sorry for the breakage.
>
> Ahh. 64-bit divides without using do_div() and friends.
>
> Is GICv4 even relevant for 32-bit ARM?
Only should someone boot a large 64bit server in 32bit mode and run VMs
with direct injection of interrupts. And definitely not once we get rid
of 32bit KVM.
Do you mind applying the following patch on top? It fixes the breakage
here.
Thanks,
M.
From d06ab34c3491d3cd191e024bf2da1eb9b8caccdd Mon Sep 17 00:00:00 2001
From: Marc Zyngier <[email protected]>
Date: Sun, 9 Feb 2020 22:48:50 +0000
Subject: [PATCH] irqchip/gic-v4.1: Avoid 64bit division for the sake of 32bit
ARM
In order to allow the GICv4 code to link properly on 32bit ARM,
make sure we don't use 64bit divisions when it isn't strictly
necessary.
Fixes: 4e6437f12d6e ("irqchip/gic-v4.1: Ensure L2 vPE table is allocated at RD level")
Signed-off-by: Marc Zyngier <[email protected]>
---
drivers/irqchip/irq-gic-v3-its.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
index 1ee95f546cb0..83b1186ffcad 100644
--- a/drivers/irqchip/irq-gic-v3-its.c
+++ b/drivers/irqchip/irq-gic-v3-its.c
@@ -2444,8 +2444,8 @@ static u64 inherit_vpe_l1_table_from_rd(cpumask_t **mask)
static bool allocate_vpe_l2_table(int cpu, u32 id)
{
void __iomem *base = gic_data_rdist_cpu(cpu)->rd_base;
- u64 val, gpsz, npg;
- unsigned int psz, esz, idx;
+ unsigned int psz, esz, idx, npg, gpsz;
+ u64 val;
struct page *page;
__le64 *table;
--
2.20.1
--
Jazz is not dead. It just smells funny...
On Sun, Feb 9, 2020 at 2:57 PM Marc Zyngier <[email protected]> wrote:
>
> Do you mind applying the following patch on top? It fixes the breakage
> here.
Done. Added proper reported-by (and cc).
Linus
On 2020/2/10 6:57, Marc Zyngier wrote:
> On Sun, 9 Feb 2020 13:24:18 -0800
> Linus Torvalds <[email protected]> wrote:
>
> Stephen, Linus,
>
>> On Sun, Feb 9, 2020 at 1:08 PM Stephen Rothwell <[email protected]> wrote:
>>>
>>> Just building Linus' tree, today's linux-next build (arm
>>> multi_v7_defconfig) failed like this:
>>>
>>> arm-linux-gnueabi-ld: drivers/irqchip/irq-gic-v3-its.o: in function `its_vpe_irq_domain_alloc':
>>> irq-gic-v3-its.c:(.text+0x3d50): undefined reference to `__aeabi_uldivmod'
>>>
>>> Caused by commit
>>>
>>> 4e6437f12d6e ("irqchip/gic-v4.1: Ensure L2 vPE table is allocated at RD level")
>
> Gniii... Sorry for the breakage.
Sorry, my bad. I'm going to set up my 32bit ARM for tests (before
sending something out in the future).
>
>>
>> Ahh. 64-bit divides without using do_div() and friends.
>>
>> Is GICv4 even relevant for 32-bit ARM?
>
> Only should someone boot a large 64bit server in 32bit mode and run VMs
> with direct injection of interrupts. And definitely not once we get rid
> of 32bit KVM.
>
> Do you mind applying the following patch on top? It fixes the breakage
> here.
>
> Thanks,
>
> M.
>
>>From d06ab34c3491d3cd191e024bf2da1eb9b8caccdd Mon Sep 17 00:00:00 2001
> From: Marc Zyngier <[email protected]>
> Date: Sun, 9 Feb 2020 22:48:50 +0000
> Subject: [PATCH] irqchip/gic-v4.1: Avoid 64bit division for the sake of 32bit
> ARM
>
> In order to allow the GICv4 code to link properly on 32bit ARM,
> make sure we don't use 64bit divisions when it isn't strictly
> necessary.
>
> Fixes: 4e6437f12d6e ("irqchip/gic-v4.1: Ensure L2 vPE table is allocated at RD level")
> Signed-off-by: Marc Zyngier <[email protected]>
> ---
> drivers/irqchip/irq-gic-v3-its.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
> index 1ee95f546cb0..83b1186ffcad 100644
> --- a/drivers/irqchip/irq-gic-v3-its.c
> +++ b/drivers/irqchip/irq-gic-v3-its.c
> @@ -2444,8 +2444,8 @@ static u64 inherit_vpe_l1_table_from_rd(cpumask_t **mask)
> static bool allocate_vpe_l2_table(int cpu, u32 id)
> {
> void __iomem *base = gic_data_rdist_cpu(cpu)->rd_base;
> - u64 val, gpsz, npg;
> - unsigned int psz, esz, idx;
> + unsigned int psz, esz, idx, npg, gpsz;
> + u64 val;
> struct page *page;
> __le64 *table;
>
>
And thanks a lot for your help, Marc!
Zenghui