From: Peng Fan <[email protected]>
V2:
yaml fix
This patchset is to support i.MX93 SRC and mediamix blk ctrl.
SRC functions as power domain provider as i.MX8M GPC.
mediamix blk ctrl is similar with i.MX8M blk ctrl, but much simplier from
software view.
Export of_clk_bulk_get_all for driver usage.
Add bindings and dts node
Based on:
https://patchwork.kernel.org/project/linux-arm-kernel/cover/[email protected]/
Peng Fan (7):
dt-bindings: soc: add i.MX93 SRC
dt-bindings: soc: add i.MX93 mediamix blk ctrl
clk: export of_clk_bulk_get_all
soc: imx: add i.MX93 SRC power domain driver
soc: imx: add i.MX93 media blk ctrl driver
arm64: dts: imx93: add src node
arm64: dts: imx93: add mediamix blk ctrl node
.../soc/imx/fsl,imx93-media-blk-ctrl.yaml | 80 +++++
.../bindings/soc/imx/fsl,imx93-src.yaml | 96 +++++
arch/arm64/boot/dts/freescale/imx93.dtsi | 38 ++
drivers/clk/clk-bulk.c | 3 +-
drivers/soc/imx/Kconfig | 10 +
drivers/soc/imx/Makefile | 1 +
drivers/soc/imx/imx93-blk-ctrl.c | 333 ++++++++++++++++++
drivers/soc/imx/imx93-pd.c | 271 ++++++++++++++
include/dt-bindings/power/fsl,imx93-power.h | 17 +
include/linux/clk.h | 2 +
10 files changed, 850 insertions(+), 1 deletion(-)
create mode 100644 Documentation/devicetree/bindings/soc/imx/fsl,imx93-media-blk-ctrl.yaml
create mode 100644 Documentation/devicetree/bindings/soc/imx/fsl,imx93-src.yaml
create mode 100644 drivers/soc/imx/imx93-blk-ctrl.c
create mode 100644 drivers/soc/imx/imx93-pd.c
create mode 100644 include/dt-bindings/power/fsl,imx93-power.h
--
2.25.1
From: Peng Fan <[email protected]>
Support controlling power domain managed by System Reset
Controller(SRC). Current supported power domain is mediamix power
domain.
Signed-off-by: Peng Fan <[email protected]>
---
drivers/soc/imx/Kconfig | 10 ++
drivers/soc/imx/Makefile | 1 +
drivers/soc/imx/imx93-pd.c | 271 +++++++++++++++++++++++++++++++++++++
3 files changed, 282 insertions(+)
create mode 100644 drivers/soc/imx/imx93-pd.c
diff --git a/drivers/soc/imx/Kconfig b/drivers/soc/imx/Kconfig
index a840494e849a..5bfc1dfea28b 100644
--- a/drivers/soc/imx/Kconfig
+++ b/drivers/soc/imx/Kconfig
@@ -20,4 +20,14 @@ config SOC_IMX8M
support, it will provide the SoC info like SoC family,
ID and revision etc.
+config SOC_IMX9
+ tristate "i.MX9 SoC family support"
+ depends on ARCH_MXC || COMPILE_TEST
+ default ARCH_MXC && ARM64
+ select SOC_BUS
+ select PM_GENERIC_DOMAINS
+ help
+ If you say yes here you get support for the NXP i.MX9 family
+ support.
+
endmenu
diff --git a/drivers/soc/imx/Makefile b/drivers/soc/imx/Makefile
index 63cd29f6d4d2..e3ed07a6bcf9 100644
--- a/drivers/soc/imx/Makefile
+++ b/drivers/soc/imx/Makefile
@@ -7,3 +7,4 @@ obj-$(CONFIG_IMX_GPCV2_PM_DOMAINS) += gpcv2.o
obj-$(CONFIG_SOC_IMX8M) += soc-imx8m.o
obj-$(CONFIG_SOC_IMX8M) += imx8m-blk-ctrl.o
obj-$(CONFIG_SOC_IMX8M) += imx8mp-blk-ctrl.o
+obj-$(CONFIG_SOC_IMX9) += imx93-pd.o
diff --git a/drivers/soc/imx/imx93-pd.c b/drivers/soc/imx/imx93-pd.c
new file mode 100644
index 000000000000..c6d204b51c14
--- /dev/null
+++ b/drivers/soc/imx/imx93-pd.c
@@ -0,0 +1,271 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright 2022 NXP.
+ */
+
+#include <linux/clk.h>
+#include <linux/of_device.h>
+#include <linux/delay.h>
+#include <linux/iopoll.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/pm_domain.h>
+#include <dt-bindings/power/imx93-power.h>
+
+#define IMX93_SRC_MEDIAMIX_OFF 0x2400
+
+#define MIX_SLICE_SW_CTRL_OFF 0x20
+#define SLICE_SW_CTRL_PSW_CTRL_OFF_MASK BIT(4)
+#define SLICE_SW_CTRL_PDN_SOFT_MASK BIT(31)
+
+#define MIX_FUNC_STAT_OFF 0xB4
+
+#define FUNC_STAT_PSW_STAT_MASK BIT(0)
+#define FUNC_STAT_RST_STAT_MASK BIT(2)
+#define FUNC_STAT_ISO_STAT_MASK BIT(4)
+
+struct imx93_slice_info {
+ char *name;
+ u32 mix_off;
+};
+
+struct imx93_plat_data {
+ u32 num_slice;
+ struct imx93_slice_info *slices;
+};
+
+struct imx93_power_domain {
+ struct generic_pm_domain genpd;
+ struct device *dev;
+ void * __iomem base;
+ const struct imx93_slice_info *slice_info;
+ struct clk_bulk_data *clks;
+ int num_clks;
+};
+
+#define to_imx93_pd(_genpd) container_of(_genpd, struct imx93_power_domain, genpd)
+
+struct imx93_slice_info imx93_slice_infos[] = {
+ [IMX93_POWER_DOMAIN_MEDIAMIX] = {
+ .name = "mediamix",
+ .mix_off = IMX93_SRC_MEDIAMIX_OFF,
+ }
+};
+
+struct imx93_plat_data imx93_plat_data = {
+ .num_slice = ARRAY_SIZE(imx93_slice_infos),
+ .slices = imx93_slice_infos,
+};
+
+static int imx93_pd_on(struct generic_pm_domain *genpd)
+{
+ struct imx93_power_domain *domain = to_imx93_pd(genpd);
+ const struct imx93_slice_info *slice_info = domain->slice_info;
+ void * __iomem addr = domain->base + slice_info->mix_off;
+ u32 val;
+ int ret;
+
+ ret = clk_bulk_prepare_enable(domain->num_clks, domain->clks);
+ if (ret) {
+ dev_err(domain->dev, "failed to enable clocks for domain: %s\n", genpd->name);
+ return ret;
+ }
+
+ val = readl(addr + MIX_SLICE_SW_CTRL_OFF);
+ val &= ~SLICE_SW_CTRL_PDN_SOFT_MASK;
+ writel(val, addr + MIX_SLICE_SW_CTRL_OFF);
+
+ ret = readl_poll_timeout(addr + MIX_FUNC_STAT_OFF, val,
+ !(val & FUNC_STAT_ISO_STAT_MASK), 1, 10000);
+ if (ret) {
+ dev_err(domain->dev, "pd_on timeout: name: %s, stat: %x\n", genpd->name, val);
+ return ret;
+ }
+
+ return 0;
+}
+
+static int imx93_pd_off(struct generic_pm_domain *genpd)
+{
+ struct imx93_power_domain *domain = to_imx93_pd(genpd);
+ const struct imx93_slice_info *slice_info = domain->slice_info;
+ void * __iomem addr = domain->base + slice_info->mix_off;
+ int ret;
+ u32 val;
+
+ /* Power off MIX */
+ val = readl(addr + MIX_SLICE_SW_CTRL_OFF);
+ val |= SLICE_SW_CTRL_PDN_SOFT_MASK;
+ writel(val, addr + MIX_SLICE_SW_CTRL_OFF);
+
+ ret = readl_poll_timeout(addr + MIX_FUNC_STAT_OFF, val,
+ val & FUNC_STAT_PSW_STAT_MASK, 1, 1000);
+ if (ret) {
+ dev_err(domain->dev, "pd_off timeout: name: %s, stat: %x\n", genpd->name, val);
+ return ret;
+ }
+
+ clk_bulk_disable_unprepare(domain->num_clks, domain->clks);
+
+ return 0;
+};
+
+static const struct of_device_id imx93_power_domain_ids[] = {
+ { .compatible = "fsl,imx93-src", .data = &imx93_plat_data, },
+ {},
+};
+
+static int imx93_pd_remove(struct platform_device *pdev)
+{
+ struct imx93_power_domain *pd = platform_get_drvdata(pdev);
+ struct device *dev = &pdev->dev;
+ const struct imx93_plat_data *data = of_device_get_match_data(dev);
+ u32 num_domains = data->num_slice;
+ struct device_node *slice_np, *np;
+ int ret;
+
+ slice_np = of_get_child_by_name(pdev->dev.of_node, "slice");
+
+ for_each_child_of_node(slice_np, np) {
+ struct imx93_power_domain *domain;
+ u32 index;
+
+ if (!of_device_is_available(np))
+ continue;
+
+ ret = of_property_read_u32(np, "reg", &index);
+ if (ret) {
+ dev_err(dev, "Failed to read 'reg' property\n");
+ of_node_put(np);
+ return ret;
+ }
+
+ if (index >= num_domains) {
+ dev_warn(dev, "Domain index %d is out of bounds\n", index);
+ continue;
+ }
+
+ domain = &pd[index];
+
+ of_genpd_del_provider(np);
+
+ pm_genpd_remove(&domain->genpd);
+ clk_bulk_put_all(domain->num_clks, domain->clks);
+ };
+
+ return 0;
+}
+
+static int imx93_pd_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ const struct imx93_plat_data *data = of_device_get_match_data(dev);
+ const struct imx93_slice_info *slice_info = data->slices;
+ struct imx93_power_domain *pd;
+ u32 num_domains = data->num_slice;
+ struct device_node *slice_np, *np;
+ void __iomem *base;
+ bool is_off;
+ int ret;
+
+ slice_np = of_get_child_by_name(dev->of_node, "slice");
+ if (!slice_np) {
+ dev_err(dev, "No slices specified in DT\n");
+ return -EINVAL;
+ }
+
+ base = devm_platform_ioremap_resource(pdev, 0);
+ if (IS_ERR(base))
+ return PTR_ERR(base);
+
+ pd = devm_kcalloc(dev, num_domains, sizeof(*pd), GFP_KERNEL);
+ if (!pd)
+ return -ENOMEM;
+
+ platform_set_drvdata(pdev, pd);
+
+ for_each_child_of_node(slice_np, np) {
+ struct imx93_power_domain *domain;
+ u32 index;
+
+ if (!of_device_is_available(np))
+ continue;
+
+ ret = of_property_read_u32(np, "reg", &index);
+ if (ret) {
+ dev_err(dev, "Failed to read 'reg' property\n");
+ of_node_put(np);
+ return ret;
+ }
+
+ if (index >= num_domains) {
+ dev_warn(dev, "Domain index %d is out of bounds\n", index);
+ continue;
+ }
+
+ domain = &pd[index];
+
+ domain->num_clks = of_clk_bulk_get_all(np, &domain->clks);
+ if (domain->num_clks < 0) {
+ return dev_err_probe(domain->dev, domain->num_clks,
+ "Failed to get %s's clocks\n",
+ slice_info[index].name);
+ }
+
+ domain->genpd.name = slice_info[index].name;
+ domain->genpd.power_off = imx93_pd_off;
+ domain->genpd.power_on = imx93_pd_on;
+ domain->slice_info = &slice_info[index];
+ domain->base = base;
+
+ is_off = readl(domain->base + slice_info->mix_off + MIX_FUNC_STAT_OFF) &
+ FUNC_STAT_ISO_STAT_MASK;
+ /* Just to sync the status of hardware */
+ if (!is_off) {
+ ret = clk_bulk_prepare_enable(domain->num_clks, domain->clks);
+ if (ret) {
+ dev_err(domain->dev, "failed to enable clocks for domain: %s\n",
+ domain->genpd.name);
+ clk_bulk_put_all(domain->num_clks, domain->clks);
+ return 0;
+ }
+ }
+
+ dev_info(dev, "%s: state: %x\n", domain->genpd.name,
+ readl(domain->base + MIX_FUNC_STAT_OFF));
+ ret = pm_genpd_init(&domain->genpd, NULL, is_off);
+ if (ret) {
+ dev_err(dev, "failed to init genpd\n");
+ clk_bulk_put_all(domain->num_clks, domain->clks);
+ return ret;
+ }
+
+ ret = of_genpd_add_provider_simple(np, &domain->genpd);
+ if (ret) {
+ clk_bulk_put_all(domain->num_clks, domain->clks);
+ return ret;
+ }
+ }
+
+ return 0;
+}
+
+static const struct of_device_id imx93_dt_ids[] = {
+ { .compatible = "fsl,imx93-src", .data = &imx93_plat_data, },
+ { }
+};
+
+static struct platform_driver imx93_power_domain_driver = {
+ .driver = {
+ .name = "imx93_power_domain",
+ .owner = THIS_MODULE,
+ .of_match_table = imx93_dt_ids,
+ },
+ .probe = imx93_pd_probe,
+ .remove = imx93_pd_remove,
+};
+module_platform_driver(imx93_power_domain_driver);
+
+MODULE_AUTHOR("Peng Fan <[email protected]>");
+MODULE_DESCRIPTION("NXP i.MX93 power domain driver");
+MODULE_LICENSE("GPL v2");
--
2.25.1
From: Peng Fan <[email protected]>
Add DT bindings for i.MX93 MEDIAMIX BLK CTRL.
Signed-off-by: Peng Fan <[email protected]>
---
.../soc/imx/fsl,imx93-media-blk-ctrl.yaml | 80 +++++++++++++++++++
include/dt-bindings/power/fsl,imx93-power.h | 6 ++
2 files changed, 86 insertions(+)
create mode 100644 Documentation/devicetree/bindings/soc/imx/fsl,imx93-media-blk-ctrl.yaml
diff --git a/Documentation/devicetree/bindings/soc/imx/fsl,imx93-media-blk-ctrl.yaml b/Documentation/devicetree/bindings/soc/imx/fsl,imx93-media-blk-ctrl.yaml
new file mode 100644
index 000000000000..792ebecec22d
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/imx/fsl,imx93-media-blk-ctrl.yaml
@@ -0,0 +1,80 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/soc/imx/fsl,imx93-media-blk-ctrl.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NXP i.MX93 Media blk-ctrl
+
+maintainers:
+ - Peng Fan <[email protected]>
+
+description:
+ The i.MX93 MEDIAMIX domain contains control and status registers known
+ as MEDIAMIX Block Control (MEDIAMIX BLK_CTRL). These registers include
+ clocking, reset, and miscellaneous top-level controls for peripherals
+ within the MEDIAMIX domain
+
+properties:
+ compatible:
+ items:
+ - const: fsl,imx93-media-blk-ctrl
+ - const: syscon
+
+ reg:
+ maxItems: 1
+
+ '#power-domain-cells':
+ const: 1
+
+ power-domains:
+ maxItems: 1
+
+ clocks:
+ maxItems: 10
+
+ clock-names:
+ items:
+ - const: apb
+ - const: axi
+ - const: nic
+ - const: disp
+ - const: cam
+ - const: pxp
+ - const: lcdif
+ - const: isi
+ - const: csi
+ - const: dsi
+
+required:
+ - compatible
+ - reg
+ - power-domains
+ - clocks
+ - clock-names
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/imx93-clock.h>
+ #include <dt-bindings/power/fsl,imx93-power.h>
+
+ media_blk_ctrl: system-controller@4ac10000 {
+ compatible = "fsl,imx93-media-blk-ctrl", "syscon";
+ reg = <0x4ac10000 0x10000>;
+ power-domains = <&mediamix>;
+ clocks = <&clk IMX93_CLK_MEDIA_APB>,
+ <&clk IMX93_CLK_MEDIA_AXI>,
+ <&clk IMX93_CLK_NIC_MEDIA_GATE>,
+ <&clk IMX93_CLK_MEDIA_DISP_PIX>,
+ <&clk IMX93_CLK_CAM_PIX>,
+ <&clk IMX93_CLK_PXP_GATE>,
+ <&clk IMX93_CLK_LCDIF_GATE>,
+ <&clk IMX93_CLK_ISI_GATE>,
+ <&clk IMX93_CLK_MIPI_CSI_GATE>,
+ <&clk IMX93_CLK_MIPI_DSI_GATE>;
+ clock-names = "apb", "axi", "nic", "disp", "cam",
+ "pxp", "lcdif", "isi", "csi", "dsi";
+ #power-domain-cells = <1>;
+ };
diff --git a/include/dt-bindings/power/fsl,imx93-power.h b/include/dt-bindings/power/fsl,imx93-power.h
index 27fb7df80f93..b3d2d9619d3a 100644
--- a/include/dt-bindings/power/fsl,imx93-power.h
+++ b/include/dt-bindings/power/fsl,imx93-power.h
@@ -8,4 +8,10 @@
#define IMX93_POWER_DOMAIN_MEDIAMIX 0
+#define IMX93_MEDIABLK_PD_MIPI_DSI 0
+#define IMX93_MEDIABLK_PD_MIPI_CSI 1
+#define IMX93_MEDIABLK_PD_PXP 2
+#define IMX93_MEDIABLK_PD_LCDIF 3
+#define IMX93_MEDIABLK_PD_ISI 4
+
#endif
--
2.25.1
From: Peng Fan <[email protected]>
Add i.MX93 SRC node
Signed-off-by: Peng Fan <[email protected]>
---
arch/arm64/boot/dts/freescale/imx93.dtsi | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi b/arch/arm64/boot/dts/freescale/imx93.dtsi
index f83a07c7c9b1..f7d4f769db00 100644
--- a/arch/arm64/boot/dts/freescale/imx93.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx93.dtsi
@@ -7,6 +7,7 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/power/fsl,imx93-power.h>
#include "imx93-pinfunc.h"
@@ -161,6 +162,23 @@ clk: clock-controller@44450000 {
status = "okay";
};
+ src: system-controller@44460000 {
+ compatible = "fsl,imx93-src", "syscon";
+ reg = <0x44460000 0x10000>;
+
+ slice {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ mediamix: power-domain@0 {
+ reg = <IMX93_POWER_DOMAIN_MEDIAMIX>;
+ #power-domain-cells = <0>;
+ clocks = <&clk IMX93_CLK_MEDIA_AXI>,
+ <&clk IMX93_CLK_MEDIA_APB>;
+ };
+ };
+ };
+
anatop: anatop@44480000 {
compatible = "fsl,imx93-anatop", "syscon";
reg = <0x44480000 0x10000>;
--
2.25.1
From: Peng Fan <[email protected]>
Add i.MX93 mediamix blk ctrl node
Signed-off-by: Peng Fan <[email protected]>
---
arch/arm64/boot/dts/freescale/imx93.dtsi | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi b/arch/arm64/boot/dts/freescale/imx93.dtsi
index f7d4f769db00..493d4be710e7 100644
--- a/arch/arm64/boot/dts/freescale/imx93.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx93.dtsi
@@ -348,5 +348,25 @@ gpio1: gpio@47400080 {
#interrupt-cells = <2>;
gpio-ranges = <&iomuxc 0 0 32>;
};
+
+ media_blk_ctrl: power-controller@4ac10000 {
+ compatible = "fsl,imx93-media-blk-ctrl", "syscon";
+ reg = <0x4ac10000 0x10000>;
+ power-domains = <&mediamix>;
+ clocks = <&clk IMX93_CLK_MEDIA_APB>,
+ <&clk IMX93_CLK_MEDIA_AXI>,
+ <&clk IMX93_CLK_NIC_MEDIA_GATE>,
+ <&clk IMX93_CLK_MEDIA_DISP_PIX>,
+ <&clk IMX93_CLK_CAM_PIX>,
+ <&clk IMX93_CLK_PXP_GATE>,
+ <&clk IMX93_CLK_LCDIF_GATE>,
+ <&clk IMX93_CLK_ISI_GATE>,
+ <&clk IMX93_CLK_MIPI_CSI_GATE>,
+ <&clk IMX93_CLK_MIPI_DSI_GATE>;
+ clock-names = "apb", "axi", "nic", "disp", "cam",
+ "pxp", "lcdif", "isi", "csi", "dsi";
+ #power-domain-cells = <1>;
+ status = "disabled";
+ };
};
};
--
2.25.1
From: Peng Fan <[email protected]>
Add bindings for i.MX93 System Reset Controller(SRC). SRC supports
resets and power gating for mixes.
Signed-off-by: Peng Fan <[email protected]>
---
.../bindings/soc/imx/fsl,imx93-src.yaml | 96 +++++++++++++++++++
include/dt-bindings/power/fsl,imx93-power.h | 11 +++
2 files changed, 107 insertions(+)
create mode 100644 Documentation/devicetree/bindings/soc/imx/fsl,imx93-src.yaml
create mode 100644 include/dt-bindings/power/fsl,imx93-power.h
diff --git a/Documentation/devicetree/bindings/soc/imx/fsl,imx93-src.yaml b/Documentation/devicetree/bindings/soc/imx/fsl,imx93-src.yaml
new file mode 100644
index 000000000000..c20f0bb692fe
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/imx/fsl,imx93-src.yaml
@@ -0,0 +1,96 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/soc/imx/fsl,imx93-src.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NXP i.MX9 System Reset Controller
+
+maintainers:
+ - Peng Fan <[email protected]>
+
+description: |
+ The System Reset Controller (SRC) is responsible for the generation of
+ all the system reset signals and boot argument latching.
+
+ Its main functions are as follows,
+ - Deals with all global system reset sources from other modules,
+ and generates global system reset.
+ - Responsible for power gating of MIXs (Slices) and their memory
+ low power control.
+
+properties:
+ compatible:
+ items:
+ - const: fsl,imx93-src
+ - const: syscon
+
+ reg:
+ maxItems: 1
+
+ slice:
+ type: object
+ description: list of power domains provided by this controller.
+
+ properties:
+ '#address-cells':
+ const: 1
+
+ '#size-cells':
+ const: 0
+
+ patternProperties:
+ "power-domain@[0-9]$":
+ $ref: /schemas/power/power-domain.yaml#
+
+ type: object
+ properties:
+ '#power-domain-cells':
+ const: 0
+
+ reg:
+ description: |
+ Power domain index. Valid values are defined in
+ include/dt-bindings/power/imx93-power.h for fsl,imx93-src
+ maxItems: 1
+
+ clocks:
+ description: |
+ A number of phandles to clocks that need to be enabled
+ during domain power-up sequencing to ensure reset
+ propagation into devices located inside this power domain.
+ minItems: 1
+ maxItems: 5
+
+ required:
+ - '#power-domain-cells'
+ - reg
+
+required:
+ - compatible
+ - reg
+ - slice
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/imx93-clock.h>
+ #include <dt-bindings/power/fsl,imx93-power.h>
+
+ system-controller@44460000 {
+ compatible = "fsl,imx93-src", "syscon";
+ reg = <0x44460000 0x10000>;
+
+ slice {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ mediamix: power-domain@0 {
+ reg = <IMX93_POWER_DOMAIN_MEDIAMIX>;
+ #power-domain-cells = <0>;
+ clocks = <&clk IMX93_CLK_MEDIA_AXI>,
+ <&clk IMX93_CLK_MEDIA_APB>;
+ };
+ };
+ };
diff --git a/include/dt-bindings/power/fsl,imx93-power.h b/include/dt-bindings/power/fsl,imx93-power.h
new file mode 100644
index 000000000000..27fb7df80f93
--- /dev/null
+++ b/include/dt-bindings/power/fsl,imx93-power.h
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
+/*
+ * Copyright 2022 NXP
+ */
+
+#ifndef __DT_BINDINGS_IMX93_POWER_H__
+#define __DT_BINDINGS_IMX93_POWER_H__
+
+#define IMX93_POWER_DOMAIN_MEDIAMIX 0
+
+#endif
--
2.25.1
From: Peng Fan <[email protected]>
Export of_clk_bulk_get_all, so drivers could use this API.
Signed-off-by: Peng Fan <[email protected]>
---
drivers/clk/clk-bulk.c | 3 ++-
include/linux/clk.h | 2 ++
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/clk-bulk.c b/drivers/clk/clk-bulk.c
index e9e16425c739..470155856b02 100644
--- a/drivers/clk/clk-bulk.c
+++ b/drivers/clk/clk-bulk.c
@@ -43,7 +43,7 @@ static int __must_check of_clk_bulk_get(struct device_node *np, int num_clks,
return ret;
}
-static int __must_check of_clk_bulk_get_all(struct device_node *np,
+int __must_check of_clk_bulk_get_all(struct device_node *np,
struct clk_bulk_data **clks)
{
struct clk_bulk_data *clk_bulk;
@@ -68,6 +68,7 @@ static int __must_check of_clk_bulk_get_all(struct device_node *np,
return num_clks;
}
+EXPORT_SYMBOL_GPL(of_clk_bulk_get_all);
void clk_bulk_put(int num_clks, struct clk_bulk_data *clks)
{
diff --git a/include/linux/clk.h b/include/linux/clk.h
index 39faa54efe88..ca74f4e83d25 100644
--- a/include/linux/clk.h
+++ b/include/linux/clk.h
@@ -372,6 +372,8 @@ int __must_check clk_bulk_get(struct device *dev, int num_clks,
int __must_check clk_bulk_get_all(struct device *dev,
struct clk_bulk_data **clks);
+int __must_check of_clk_bulk_get_all(struct device_node *np,
+ struct clk_bulk_data **clks);
/**
* clk_bulk_get_optional - lookup and obtain a number of references to clock producer
* @dev: device for clock "consumer"
--
2.25.1
On 26/05/2022 14:34, Peng Fan (OSS) wrote:
> From: Peng Fan <[email protected]>
>
> Add DT bindings for i.MX93 MEDIAMIX BLK CTRL.
>
> Signed-off-by: Peng Fan <[email protected]>
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Best regards,
Krzysztof
On 30/05/2022 08:57, Peng Fan wrote:
>> Subject: Re: [PATCH V2 1/7] dt-bindings: soc: add i.MX93 SRC
>>
>> On 26/05/2022 14:34, Peng Fan (OSS) wrote:
>>> From: Peng Fan <[email protected]>
>>>
>>> Add bindings for i.MX93 System Reset Controller(SRC). SRC supports
>>> resets and power gating for mixes.
>>>
>>> Signed-off-by: Peng Fan <[email protected]>
>>> ---
>>> .../bindings/soc/imx/fsl,imx93-src.yaml | 96
>> +++++++++++++++++++
>>
>> Still wrong location of bindings.
>
> Although it is called SRC(system reset controller), but actually
> it not functions only as reset controller, it also supports power
> gating of each slice including slice's memory low power control.
> It also includes some system general configuration.
>
> So follow your suggestion in V1, I rename it as system-controller,
> but I not find a directory for system-controller.
Therefore I propose "power". 2 out of 3 functions (reset controller,
power domain controller) are related to power.
Best regards,
Krzysztof
On 26/05/2022 14:34, Peng Fan (OSS) wrote:
> From: Peng Fan <[email protected]>
>
> Add bindings for i.MX93 System Reset Controller(SRC). SRC supports
> resets and power gating for mixes.
>
> Signed-off-by: Peng Fan <[email protected]>
> ---
> .../bindings/soc/imx/fsl,imx93-src.yaml | 96 +++++++++++++++++++
Still wrong location of bindings.
> include/dt-bindings/power/fsl,imx93-power.h | 11 +++
> 2 files changed, 107 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/soc/imx/fsl,imx93-src.yaml
> create mode 100644 include/dt-bindings/power/fsl,imx93-power.h
>
> diff --git a/Documentation/devicetree/bindings/soc/imx/fsl,imx93-src.yaml b/Documentation/devicetree/bindings/soc/imx/fsl,imx93-src.yaml
> new file mode 100644
> index 000000000000..c20f0bb692fe
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/soc/imx/fsl,imx93-src.yaml
> @@ -0,0 +1,96 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/soc/imx/fsl,imx93-src.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: NXP i.MX9 System Reset Controller
> +
> +maintainers:
> + - Peng Fan <[email protected]>
> +
> +description: |
> + The System Reset Controller (SRC) is responsible for the generation of
> + all the system reset signals and boot argument latching.
> +
> + Its main functions are as follows,
> + - Deals with all global system reset sources from other modules,
> + and generates global system reset.
> + - Responsible for power gating of MIXs (Slices) and their memory
> + low power control.
> +
> +properties:
> + compatible:
> + items:
> + - const: fsl,imx93-src
> + - const: syscon
> +
> + reg:
> + maxItems: 1
> +
> + slice:
> + type: object
> + description: list of power domains provided by this controller.
Continuing our discussion, I think I see the point of having the node
grouping subnodes, just the name confused me. Please make it plural, so
"slices".
Best regards,
Krzysztof
> Subject: Re: [PATCH V2 1/7] dt-bindings: soc: add i.MX93 SRC
>
> On 26/05/2022 14:34, Peng Fan (OSS) wrote:
> > From: Peng Fan <[email protected]>
> >
> > Add bindings for i.MX93 System Reset Controller(SRC). SRC supports
> > resets and power gating for mixes.
> >
> > Signed-off-by: Peng Fan <[email protected]>
> > ---
> > .../bindings/soc/imx/fsl,imx93-src.yaml | 96
> +++++++++++++++++++
>
> Still wrong location of bindings.
Although it is called SRC(system reset controller), but actually
it not functions only as reset controller, it also supports power
gating of each slice including slice's memory low power control.
It also includes some system general configuration.
So follow your suggestion in V1, I rename it as system-controller,
but I not find a directory for system-controller.
>
> > include/dt-bindings/power/fsl,imx93-power.h | 11 +++
> > 2 files changed, 107 insertions(+)
> > create mode 100644
> > Documentation/devicetree/bindings/soc/imx/fsl,imx93-src.yaml
> > create mode 100644 include/dt-bindings/power/fsl,imx93-power.h
> >
> > diff --git
> > a/Documentation/devicetree/bindings/soc/imx/fsl,imx93-src.yaml
> > b/Documentation/devicetree/bindings/soc/imx/fsl,imx93-src.yaml
> > new file mode 100644
> > index 000000000000..c20f0bb692fe
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/soc/imx/fsl,imx93-src.yaml
> > @@ -0,0 +1,96 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2
> > +
> > +title: NXP i.MX9 System Reset Controller
> > +
> > +maintainers:
> > + - Peng Fan <[email protected]>
> > +
> > +description: |
> > + The System Reset Controller (SRC) is responsible for the generation
> > +of
> > + all the system reset signals and boot argument latching.
> > +
> > + Its main functions are as follows,
> > + - Deals with all global system reset sources from other modules,
> > + and generates global system reset.
> > + - Responsible for power gating of MIXs (Slices) and their memory
> > + low power control.
> > +
> > +properties:
> > + compatible:
> > + items:
> > + - const: fsl,imx93-src
> > + - const: syscon
> > +
> > + reg:
> > + maxItems: 1
> > +
> > + slice:
> > + type: object
> > + description: list of power domains provided by this controller.
>
> Continuing our discussion, I think I see the point of having the node grouping
> subnodes, just the name confused me. Please make it plural, so "slices".
Sure, fix in V3.
Thanks,
Peng.
>
>
> Best regards,
> Krzysztof