Dear All,
We are working on 2.6.35.9 linux kernel on MIPS 34kce core and our
cache is VIVT having cache aliasing .
When I check the implementation on ARM I can check the implemenation
exists , but there is not similar implementation exists on MIPS.
These API's are used by XFS module:
static inline void flush_kernel_vmap_range(void *vaddr, int size)
static inline void invalidate_kernel_vmap_range(void *vaddr, int size)
static inline void flush_kernel_dcache_page(struct page *page)
I can check implementation on ARM at
http://git.kernel.org/?p=linux/kernel/git/longterm/linux-2.6.34.y.git;a=commit;h=252a9afff76097667429b583e8b5b170b47665a4
and
----------------------------------------------------------------------------------------------------------------------------
--- a/arch/arm/include/asm/cacheflush.h+++ b/arch/arm/include/asm/cacheflush.h
@@ -432,6 +432,16
@@ static inline void __flush_icache_all(void)
: "r" (0)); #endif }
+static inline void flush_kernel_vmap_range(void *addr, int size)
+{
+ if ((cache_is_vivt() || cache_is_vipt_aliasing()))
+ __cpuc_flush_dcache_area(addr, (size_t)size);
+}
+static inline void invalidate_kernel_vmap_range(void *addr, int size)
+{
+ if ((cache_is_vivt() || cache_is_vipt_aliasing()))
+ __cpuc_flush_dcache_area(addr, (size_t)size);
+}
-------------------------------------------------------------------------------------------------------------------------------------
http://git.kernel.org/?p=linux/kernel/git/longterm/linux-2.6.34.y.git;a=blobdiff;f=arch/arm/include/asm/cacheflush.h;h=1a711ea8418b6045c581a576caa3f85496ee2673;hp=bb7d695f3900f70d635a3597cd19d7cb68c0d732;hb=73be1591579084a8103a7005dd3172f3e9dd7362;hpb=44b7532b8b464f606053562400719c9c21276037
======================================================
+#define ARCH_HAS_FLUSH_KERNEL_DCACHE_PAGE
+static inline void flush_kernel_dcache_page(struct page *page)
+{
+ /* highmem pages are always flushed upon kunmap already */
+ if ((cache_is_vivt() || cache_is_vipt_aliasing()) && !PageHighMem(page))
+ __cpuc_flush_dcache_page(page_address(page));
+}
+
==========================================================
Is there any similar API exists for MIPS. I want to use for XFS these API's
thanks
On Fri, Mar 25, 2011 at 02:38:13PM +0530, naveen yadav wrote:
> We are working on 2.6.35.9 linux kernel on MIPS 34kce core and our
> cache is VIVT having cache aliasing .
No, they're VIPT unless you successfully modified your 34K core to
change it from a less than perfect cache design to the most lunatic
cache policy known to man kind ...
> When I check the implementation on ARM I can check the implemenation
> exists , but there is not similar implementation exists on MIPS.
> These API's are used by XFS module:
>
> static inline void flush_kernel_vmap_range(void *vaddr, int size)
> static inline void invalidate_kernel_vmap_range(void *vaddr, int size)
> static inline void flush_kernel_dcache_page(struct page *page)
A known problem for (too ...) long. I'll finally take care of it.
Ralf
I am sorry, Yes they are VIPT,
On Fri, Mar 25, 2011 at 10:57 PM, Ralf Baechle <[email protected]> wrote:
> On Fri, Mar 25, 2011 at 02:38:13PM +0530, naveen yadav wrote:
>
>> We are working on 2.6.35.9 linux kernel on MIPS 34kce core and our
>> cache is VIVT having cache aliasing .
>
> No, they're VIPT unless you successfully modified your 34K core to
> change it from a less than perfect cache design to the most lunatic
> cache policy known to man kind ...
>
>> When I check the implementation on ARM I can check the implemenation
>> exists , but there is not similar implementation exists on MIPS.
>> These API's are used by XFS module:
>>
>> static inline void flush_kernel_vmap_range(void *vaddr, int size)
>> static inline void invalidate_kernel_vmap_range(void *vaddr, int size)
>> static inline void flush_kernel_dcache_page(struct page *page)
>
> A known problem for (too ...) long. ?I'll finally take care of it.
>
> ?Ralf
>
Hi Ralf,
Have you got time to look into this issue.
Regards
On Tue, Mar 29, 2011 at 11:24 AM, naveen yadav <[email protected]> wrote:
> I am sorry, Yes they are VIPT,
>
>
> On Fri, Mar 25, 2011 at 10:57 PM, Ralf Baechle <[email protected]> wrote:
>> On Fri, Mar 25, 2011 at 02:38:13PM +0530, naveen yadav wrote:
>>
>>> We are working on 2.6.35.9 linux kernel on MIPS 34kce core and our
>>> cache is VIVT having cache aliasing .
>>
>> No, they're VIPT unless you successfully modified your 34K core to
>> change it from a less than perfect cache design to the most lunatic
>> cache policy known to man kind ...
>>
>>> When I check the implementation on ARM I can check the implemenation
>>> exists , but there is not similar implementation exists on MIPS.
>>> These API's are used by XFS module:
>>>
>>> static inline void flush_kernel_vmap_range(void *vaddr, int size)
>>> static inline void invalidate_kernel_vmap_range(void *vaddr, int size)
>>> static inline void flush_kernel_dcache_page(struct page *page)
>>
>> A known problem for (too ...) long. ?I'll finally take care of it.
>>
>> ?Ralf
>>
>