2017-07-21 02:35:37

by Zhao Qiang

Subject: [PATCH] qe: fix compile issue for arm64

Signed-off-by: Zhao Qiang <[email protected]>
---
drivers/soc/fsl/qe/qe.c | 2 ++
1 file changed, 2 insertions(+)

diff --git a/drivers/soc/fsl/qe/qe.c b/drivers/soc/fsl/qe/qe.c
index 2ef6fc6..d48fa4a 100644
--- a/drivers/soc/fsl/qe/qe.c
+++ b/drivers/soc/fsl/qe/qe.c
@@ -229,7 +229,9 @@ int qe_setbrg(enum qe_clock brg, unsigned int rate, unsigned int multiplier)
/* Errata QE_General4, which affects some MPC832x and MPC836x SOCs, says
that the BRG divisor must be even if you're not using divide-by-16
mode. */
+#ifdef CONFIG_PPC
if (pvr_version_is(PVR_VER_836x) || pvr_version_is(PVR_VER_832x))
+#endif
if (!div16 && (divisor & 1) && (divisor > 3))
divisor++;

--
2.1.0.27.g96db324

2017-07-21 06:34:26

by Michael Ellerman

Subject: Re: [PATCH] qe: fix compile issue for arm64

Zhao Qiang <[email protected]> writes:

> Signed-off-by: Zhao Qiang <[email protected]>
> ---
> drivers/soc/fsl/qe/qe.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/soc/fsl/qe/qe.c b/drivers/soc/fsl/qe/qe.c
> index 2ef6fc6..d48fa4a 100644
> --- a/drivers/soc/fsl/qe/qe.c
> +++ b/drivers/soc/fsl/qe/qe.c
> @@ -229,7 +229,9 @@ int qe_setbrg(enum qe_clock brg, unsigned int rate, unsigned int multiplier)
> /* Errata QE_General4, which affects some MPC832x and MPC836x SOCs, says
> that the BRG divisor must be even if you're not using divide-by-16
> mode. */
> +#ifdef CONFIG_PPC
> if (pvr_version_is(PVR_VER_836x) || pvr_version_is(PVR_VER_832x))
> +#endif
> if (!div16 && (divisor & 1) && (divisor > 3))
> divisor++;

Are you sure that's what you want to do on arm64 ?

cheers

2017-07-24 02:09:35

by Zhao Qiang

Subject: RE: [PATCH] qe: fix compile issue for arm64

On Fri, 2017-07-21 at 02:34PM, Michael Ellerman <[email protected]> wrote:

> -----Original Message-----
> From: Michael Ellerman [mailto:[email protected]]
> Sent: Friday, July 21, 2017 2:34 PM
> To: Qiang Zhao <[email protected]>; [email protected]
> Cc: [email protected]; [email protected]; linux-
> [email protected]; Qiang Zhao <[email protected]>
> Subject: Re: [PATCH] qe: fix compile issue for arm64
>
> Zhao Qiang <[email protected]> writes:
>
> > Signed-off-by: Zhao Qiang <[email protected]>
> > ---
> > drivers/soc/fsl/qe/qe.c | 2 ++
> > 1 file changed, 2 insertions(+)
> >
> > diff --git a/drivers/soc/fsl/qe/qe.c b/drivers/soc/fsl/qe/qe.c index
> > 2ef6fc6..d48fa4a 100644
> > --- a/drivers/soc/fsl/qe/qe.c
> > +++ b/drivers/soc/fsl/qe/qe.c
> > @@ -229,7 +229,9 @@ int qe_setbrg(enum qe_clock brg, unsigned int rate,
> unsigned int multiplier)
> > /* Errata QE_General4, which affects some MPC832x and MPC836x
> SOCs, says
> > that the BRG divisor must be even if you're not using divide-by-16
> > mode. */
> > +#ifdef CONFIG_PPC
> > if (pvr_version_is(PVR_VER_836x) || pvr_version_is(PVR_VER_832x)
> > +#endif
> > if (!div16 && (divisor & 1) && (divisor > 3))
> > divisor++;
>
> Are you sure that's what you want to do on arm64 ?

Is there any problem?

Best Regards
Qiang Zhao

2017-07-24 03:32:57

by Crystal Wood

Subject: Re: [PATCH] qe: fix compile issue for arm64

On Mon, 2017-07-24 at 02:09 +0000, Qiang Zhao wrote:
> On Fri, 2017-07-21 at 02:34PM, Michael Ellerman <[email protected]> wrote:
>
> > -----Original Message-----
> > From: Michael Ellerman [mailto:[email protected]]
> > Sent: Friday, July 21, 2017 2:34 PM
> > To: Qiang Zhao <[email protected]>; [email protected]
> > Cc: [email protected]; [email protected]; linux-
> > [email protected]; Qiang Zhao <[email protected]>
> > Subject: Re: [PATCH] qe: fix compile issue for arm64
> >
> > Zhao Qiang <[email protected]> writes:
> >
> > > Signed-off-by: Zhao Qiang <[email protected]>
> > > ---
> > >  drivers/soc/fsl/qe/qe.c | 2 ++
> > >  1 file changed, 2 insertions(+)
> > >
> > > diff --git a/drivers/soc/fsl/qe/qe.c b/drivers/soc/fsl/qe/qe.c index
> > > 2ef6fc6..d48fa4a 100644
> > > --- a/drivers/soc/fsl/qe/qe.c
> > > +++ b/drivers/soc/fsl/qe/qe.c
> > > @@ -229,7 +229,9 @@ int qe_setbrg(enum qe_clock brg, unsigned int rate,
> >
> > unsigned int multiplier)
> > >   /* Errata QE_General4, which affects some MPC832x and MPC836x
> >
> > SOCs, says
> > >      that the BRG divisor must be even if you're not using
> > > divide-by-16
> > >      mode. */
> > > +#ifdef CONFIG_PPC
> > >   if (pvr_version_is(PVR_VER_836x) ||
> > > pvr_version_is(PVR_VER_832x)
> > > +#endif
> > >   if (!div16 && (divisor & 1) && (divisor > 3))
> > >   divisor++;
> >
> > Are you sure that's what you want to do on arm64 ?
>
> Is there any problem?
>
> Best Regards
> Qiang Zhao

The comment says the workaround applies to MPC832x and MPC836x, but you're
applying the workaround on arm64 as well.

-Scott