2019-06-28 01:48:46

by Bao Xiaowei

[permalink] [raw]
Subject: [PATCHv3 1/2] PCI: layerscape: Add the bar_fixed_64bit property in EP driver.

The PCIe controller of layerscape just have 4 BARs, BAR0 and BAR1
is 32bit, BAR3 and BAR4 is 64bit, this is determined by hardware,
so set the bar_fixed_64bit with 0x14.

Signed-off-by: Xiaowei Bao <[email protected]>
---
v2:
- Replace value 0x14 with a macro.
v3:
- No change.

drivers/pci/controller/dwc/pci-layerscape-ep.c | 1 +
1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/drivers/pci/controller/dwc/pci-layerscape-ep.c b/drivers/pci/controller/dwc/pci-layerscape-ep.c
index be61d96..227c33b 100644
--- a/drivers/pci/controller/dwc/pci-layerscape-ep.c
+++ b/drivers/pci/controller/dwc/pci-layerscape-ep.c
@@ -44,6 +44,7 @@ static int ls_pcie_establish_link(struct dw_pcie *pci)
.linkup_notifier = false,
.msi_capable = true,
.msix_capable = false,
+ .bar_fixed_64bit = (1 << BAR_2) | (1 << BAR_4),
};

static const struct pci_epc_features*
--
1.7.1


2019-08-12 10:13:40

by Lorenzo Pieralisi

[permalink] [raw]
Subject: Re: [PATCHv3 1/2] PCI: layerscape: Add the bar_fixed_64bit property in EP driver.

First off:

Trim the CC list, you CC'ed maintainers (and mailing lists) for no
reasons whatsover.

Then, read this:

https://lore.kernel.org/linux-pci/[email protected]/

and make your patches compliant please.

On Fri, Jun 28, 2019 at 09:38:25AM +0800, Xiaowei Bao wrote:
> The PCIe controller of layerscape just have 4 BARs, BAR0 and BAR1
> is 32bit, BAR3 and BAR4 is 64bit, this is determined by hardware,
> so set the bar_fixed_64bit with 0x14.
>
> Signed-off-by: Xiaowei Bao <[email protected]>
> ---
> v2:
> - Replace value 0x14 with a macro.
> v3:
> - No change.
>
> drivers/pci/controller/dwc/pci-layerscape-ep.c | 1 +
> 1 files changed, 1 insertions(+), 0 deletions(-)
>
> diff --git a/drivers/pci/controller/dwc/pci-layerscape-ep.c b/drivers/pci/controller/dwc/pci-layerscape-ep.c
> index be61d96..227c33b 100644
> --- a/drivers/pci/controller/dwc/pci-layerscape-ep.c
> +++ b/drivers/pci/controller/dwc/pci-layerscape-ep.c
> @@ -44,6 +44,7 @@ static int ls_pcie_establish_link(struct dw_pcie *pci)
> .linkup_notifier = false,
> .msi_capable = true,
> .msix_capable = false,
> + .bar_fixed_64bit = (1 << BAR_2) | (1 << BAR_4),

I would appreciate Kishon's ACK on this.

Lorenzo

> };
>
> static const struct pci_epc_features*
> --
> 1.7.1
>

2019-08-12 10:40:13

by Bao Xiaowei

[permalink] [raw]
Subject: RE: [EXT] Re: [PATCHv3 1/2] PCI: layerscape: Add the bar_fixed_64bit property in EP driver.



> -----Original Message-----
> From: Lorenzo Pieralisi <[email protected]>
> Sent: 2019??8??12?? 18:12
> To: Xiaowei Bao <[email protected]>; [email protected]
> Cc: [email protected]; [email protected]; [email protected];
> [email protected]; Leo Li <[email protected]>; [email protected];
> [email protected]; M.h. Lian <[email protected]>; Mingkai
> Hu <[email protected]>; Roy Zang <[email protected]>;
> [email protected]; [email protected];
> [email protected]; [email protected];
> [email protected]; [email protected];
> [email protected]; [email protected]
> Subject: [EXT] Re: [PATCHv3 1/2] PCI: layerscape: Add the bar_fixed_64bit
> property in EP driver.
>
> Caution: EXT Email
>
> First off:
>
> Trim the CC list, you CC'ed maintainers (and mailing lists) for no reasons
> whatsover.
[Xiaowei Bao]Hi Lorenzo, I am not clear why the mail list is the CC, I use the command "git send-email --to", I will try to send the patch again, do I need to modify the version is v4 when I send this patch again?
>
> Then, read this:
>
> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flore.ke
> rnel.org%2Flinux-pci%2F20171026223701.GA25649%40bhelgaas-glaptop.roa
> m.corp.google.com%2F&amp;data=02%7C01%7Cxiaowei.bao%40nxp.com%7
> C1c586178e23c423a0e8808d71f0d8f6f%7C686ea1d3bc2b4c6fa92cd99c5c30
> 1635%7C0%7C0%7C637012015426788575&amp;sdata=3bx1bDFIzik8FnD0wl
> duAUv7wtLdD1J3hQ3xNH2xmFY%3D&amp;reserved=0
>
> and make your patches compliant please.
>
> On Fri, Jun 28, 2019 at 09:38:25AM +0800, Xiaowei Bao wrote:
> > The PCIe controller of layerscape just have 4 BARs, BAR0 and BAR1 is
> > 32bit, BAR3 and BAR4 is 64bit, this is determined by hardware, so set
> > the bar_fixed_64bit with 0x14.
> >
> > Signed-off-by: Xiaowei Bao <[email protected]>
> > ---
> > v2:
> > - Replace value 0x14 with a macro.
> > v3:
> > - No change.
> >
> > drivers/pci/controller/dwc/pci-layerscape-ep.c | 1 +
> > 1 files changed, 1 insertions(+), 0 deletions(-)
> >
> > diff --git a/drivers/pci/controller/dwc/pci-layerscape-ep.c
> > b/drivers/pci/controller/dwc/pci-layerscape-ep.c
> > index be61d96..227c33b 100644
> > --- a/drivers/pci/controller/dwc/pci-layerscape-ep.c
> > +++ b/drivers/pci/controller/dwc/pci-layerscape-ep.c
> > @@ -44,6 +44,7 @@ static int ls_pcie_establish_link(struct dw_pcie *pci)
> > .linkup_notifier = false,
> > .msi_capable = true,
> > .msix_capable = false,
> > + .bar_fixed_64bit = (1 << BAR_2) | (1 << BAR_4),
>
> I would appreciate Kishon's ACK on this.
>
> Lorenzo
>
> > };
> >
> > static const struct pci_epc_features*
> > --
> > 1.7.1
> >

2019-08-12 11:36:40

by Lorenzo Pieralisi

[permalink] [raw]
Subject: Re: [EXT] Re: [PATCHv3 1/2] PCI: layerscape: Add the bar_fixed_64bit property in EP driver.

On Mon, Aug 12, 2019 at 10:39:00AM +0000, Xiaowei Bao wrote:
>
>
> > -----Original Message-----
> > From: Lorenzo Pieralisi <[email protected]>
> > Sent: 2019年8月12日 18:12
> > To: Xiaowei Bao <[email protected]>; [email protected]
> > Cc: [email protected]; [email protected]; [email protected];
> > [email protected]; Leo Li <[email protected]>; [email protected];
> > [email protected]; M.h. Lian <[email protected]>; Mingkai
> > Hu <[email protected]>; Roy Zang <[email protected]>;
> > [email protected]; [email protected];
> > [email protected]; [email protected];
> > [email protected]; [email protected];
> > [email protected]; [email protected]
> > Subject: [EXT] Re: [PATCHv3 1/2] PCI: layerscape: Add the bar_fixed_64bit
> > property in EP driver.
> >
> > Caution: EXT Email
> >
> > First off:
> >
> > Trim the CC list, you CC'ed maintainers (and mailing lists) for no reasons
> > whatsover.
> [Xiaowei Bao]Hi Lorenzo, I am not clear why the mail list is the CC, I use the command "git send-email --to", I will try to send the patch again, do I need to modify the version is v4 when I send this patch again?

Yes you do.

Wrap lines to max 80 characters. There is no need to add [Xiaowei Bao].

1) Read, email etiquette

https://kernelnewbies.org/PatchCulture

2) get_maintainer.pl -f drivers/pci/controller/dwc/pci-layerscape.c

Compare the output to the people in CC, trim it accordingly.

3) The NXP maintainers in the MAINTAINERS file have not given a single
comment for this patchset. Either they show up or I will remove them
from the MAINTAINERS list.

4) Before submitting patches, talk to someone at NXP who can help you
format them in preparation for posting, I do not have time to write
guidelines for everyone posting on linux-pci, sorry, the information
is out there if you care to read it.

Thanks,
Lorenzo

> >
> > Then, read this:
> >
> > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flore.ke
> > rnel.org%2Flinux-pci%2F20171026223701.GA25649%40bhelgaas-glaptop.roa
> > m.corp.google.com%2F&amp;data=02%7C01%7Cxiaowei.bao%40nxp.com%7
> > C1c586178e23c423a0e8808d71f0d8f6f%7C686ea1d3bc2b4c6fa92cd99c5c30
> > 1635%7C0%7C0%7C637012015426788575&amp;sdata=3bx1bDFIzik8FnD0wl
> > duAUv7wtLdD1J3hQ3xNH2xmFY%3D&amp;reserved=0
> >
> > and make your patches compliant please.
> >
> > On Fri, Jun 28, 2019 at 09:38:25AM +0800, Xiaowei Bao wrote:
> > > The PCIe controller of layerscape just have 4 BARs, BAR0 and BAR1 is
> > > 32bit, BAR3 and BAR4 is 64bit, this is determined by hardware, so set
> > > the bar_fixed_64bit with 0x14.
> > >
> > > Signed-off-by: Xiaowei Bao <[email protected]>
> > > ---
> > > v2:
> > > - Replace value 0x14 with a macro.
> > > v3:
> > > - No change.
> > >
> > > drivers/pci/controller/dwc/pci-layerscape-ep.c | 1 +
> > > 1 files changed, 1 insertions(+), 0 deletions(-)
> > >
> > > diff --git a/drivers/pci/controller/dwc/pci-layerscape-ep.c
> > > b/drivers/pci/controller/dwc/pci-layerscape-ep.c
> > > index be61d96..227c33b 100644
> > > --- a/drivers/pci/controller/dwc/pci-layerscape-ep.c
> > > +++ b/drivers/pci/controller/dwc/pci-layerscape-ep.c
> > > @@ -44,6 +44,7 @@ static int ls_pcie_establish_link(struct dw_pcie *pci)
> > > .linkup_notifier = false,
> > > .msi_capable = true,
> > > .msix_capable = false,
> > > + .bar_fixed_64bit = (1 << BAR_2) | (1 << BAR_4),
> >
> > I would appreciate Kishon's ACK on this.
> >
> > Lorenzo
> >
> > > };
> > >
> > > static const struct pci_epc_features*
> > > --
> > > 1.7.1
> > >

2019-08-13 02:12:02

by Bao Xiaowei

[permalink] [raw]
Subject: RE: [EXT] Re: [PATCHv3 1/2] PCI: layerscape: Add the bar_fixed_64bit property in EP driver.



> -----Original Message-----
> From: Lorenzo Pieralisi <[email protected]>
> Sent: 2019年8月12日 19:36
> To: Xiaowei Bao <[email protected]>
> Cc: [email protected]; [email protected]; [email protected];
> [email protected]; [email protected]; Leo Li
> <[email protected]>; [email protected]; [email protected]; M.h.
> Lian <[email protected]>; Mingkai Hu <[email protected]>; Roy
> Zang <[email protected]>; [email protected];
> [email protected]; [email protected];
> [email protected]; [email protected];
> [email protected]; [email protected];
> [email protected]
> Subject: Re: [EXT] Re: [PATCHv3 1/2] PCI: layerscape: Add the bar_fixed_64bit
> property in EP driver.
>
> Caution: EXT Email
>
> On Mon, Aug 12, 2019 at 10:39:00AM +0000, Xiaowei Bao wrote:
> >
> >
> > > -----Original Message-----
> > > From: Lorenzo Pieralisi <[email protected]>
> > > Sent: 2019年8月12日 18:12
> > > To: Xiaowei Bao <[email protected]>; [email protected]
> > > Cc: [email protected]; [email protected]; [email protected];
> > > [email protected]; Leo Li <[email protected]>; [email protected];
> > > [email protected]; M.h. Lian <[email protected]>;
> > > Mingkai Hu <[email protected]>; Roy Zang <[email protected]>;
> > > [email protected]; [email protected];
> > > [email protected]; [email protected];
> > > [email protected]; [email protected];
> > > [email protected]; [email protected]
> > > Subject: [EXT] Re: [PATCHv3 1/2] PCI: layerscape: Add the
> > > bar_fixed_64bit property in EP driver.
> > >
> > > Caution: EXT Email
> > >
> > > First off:
> > >
> > > Trim the CC list, you CC'ed maintainers (and mailing lists) for no
> > > reasons whatsover.
> > [Xiaowei Bao]Hi Lorenzo, I am not clear why the mail list is the CC, I use the
> command "git send-email --to", I will try to send the patch again, do I need to
> modify the version is v4 when I send this patch again?
>
> Yes you do.
>
> Wrap lines to max 80 characters. There is no need to add [Xiaowei Bao].
OK, thanks a lot.
>
> 1) Read, email etiquette
>
> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fkernel
> newbies.org%2FPatchCulture&amp;data=02%7C01%7Cxiaowei.bao%40nxp.c
> om%7C73a3b6160aad401b72d208d71f193ae1%7C686ea1d3bc2b4c6fa92cd
> 99c5c301635%7C0%7C0%7C637012065548351226&amp;sdata=y6xa5nMkB
> qkWz7SBFdc%2F0lcQvzI%2F9HjEyC5%2Bk0RxczI%3D&amp;reserved=0
>
> 2) get_maintainer.pl -f drivers/pci/controller/dwc/pci-layerscape.c
>
> Compare the output to the people in CC, trim it accordingly.
>
> 3) The NXP maintainers in the MAINTAINERS file have not given a single
> comment for this patchset. Either they show up or I will remove them
> from the MAINTAINERS list.
>
> 4) Before submitting patches, talk to someone at NXP who can help you
> format them in preparation for posting, I do not have time to write
> guidelines for everyone posting on linux-pci, sorry, the information
> is out there if you care to read it.
>
> Thanks,
> Lorenzo
>
> > >
> > > Then, read this:
> > >
> > > https://lore.ke
> > >
> rnel.org%2Flinux-pci%2F20171026223701.GA25649%40bhelgaas-glaptop.roa
> > >
> m.corp.google.com%2F&amp;data=02%7C01%7Cxiaowei.bao%40nxp.com%7
> > >
> C1c586178e23c423a0e8808d71f0d8f6f%7C686ea1d3bc2b4c6fa92cd99c5c30
> > >
> 1635%7C0%7C0%7C637012015426788575&amp;sdata=3bx1bDFIzik8FnD0wl
> > > duAUv7wtLdD1J3hQ3xNH2xmFY%3D&amp;reserved=0
> > >
> > > and make your patches compliant please.
> > >
> > > On Fri, Jun 28, 2019 at 09:38:25AM +0800, Xiaowei Bao wrote:
> > > > The PCIe controller of layerscape just have 4 BARs, BAR0 and BAR1
> > > > is 32bit, BAR3 and BAR4 is 64bit, this is determined by hardware,
> > > > so set the bar_fixed_64bit with 0x14.
> > > >
> > > > Signed-off-by: Xiaowei Bao <[email protected]>
> > > > ---
> > > > v2:
> > > > - Replace value 0x14 with a macro.
> > > > v3:
> > > > - No change.
> > > >
> > > > drivers/pci/controller/dwc/pci-layerscape-ep.c | 1 +
> > > > 1 files changed, 1 insertions(+), 0 deletions(-)
> > > >
> > > > diff --git a/drivers/pci/controller/dwc/pci-layerscape-ep.c
> > > > b/drivers/pci/controller/dwc/pci-layerscape-ep.c
> > > > index be61d96..227c33b 100644
> > > > --- a/drivers/pci/controller/dwc/pci-layerscape-ep.c
> > > > +++ b/drivers/pci/controller/dwc/pci-layerscape-ep.c
> > > > @@ -44,6 +44,7 @@ static int ls_pcie_establish_link(struct dw_pcie
> *pci)
> > > > .linkup_notifier = false,
> > > > .msi_capable = true,
> > > > .msix_capable = false,
> > > > + .bar_fixed_64bit = (1 << BAR_2) | (1 << BAR_4),
> > >
> > > I would appreciate Kishon's ACK on this.
> > >
> > > Lorenzo
> > >
> > > > };
> > > >
> > > > static const struct pci_epc_features*
> > > > --
> > > > 1.7.1
> > > >