2019-02-28 11:34:12

by Anson Huang

Subject: [PATCH 1/2] clk: imx7ulp: remove snvs clock

Since i.MX7ULP B0 chip, the SNVS module is moved into M4
domain and its clock is also moved into PCC0 which is
contorlled by M4, Linux kernel should NOT add it into
clock tree.

Signed-off-by: Anson Huang <[email protected]>
---
drivers/clk/imx/clk-imx7ulp.c | 1 -
1 file changed, 1 deletion(-)

diff --git a/drivers/clk/imx/clk-imx7ulp.c b/drivers/clk/imx/clk-imx7ulp.c
index ce30663..6668210 100644
--- a/drivers/clk/imx/clk-imx7ulp.c
+++ b/drivers/clk/imx/clk-imx7ulp.c
@@ -151,7 +151,6 @@ static void __init imx7ulp_clk_pcc2_init(struct device_node *np)
clks[IMX7ULP_CLK_DMA1] = imx_clk_hw_gate("dma1", "nic1_clk", base + 0x20, 30);
clks[IMX7ULP_CLK_RGPIO2P1] = imx_clk_hw_gate("rgpio2p1", "nic1_bus_clk", base + 0x3c, 30);
clks[IMX7ULP_CLK_DMA_MUX1] = imx_clk_hw_gate("dma_mux1", "nic1_bus_clk", base + 0x84, 30);
- clks[IMX7ULP_CLK_SNVS] = imx_clk_hw_gate("snvs", "nic1_bus_clk", base + 0x8c, 30);
clks[IMX7ULP_CLK_CAAM] = imx_clk_hw_gate("caam", "nic1_clk", base + 0x90, 30);
clks[IMX7ULP_CLK_LPTPM4] = imx7ulp_clk_composite("lptpm4", periph_bus_sels, ARRAY_SIZE(periph_bus_sels), true, false, true, base + 0x94);
clks[IMX7ULP_CLK_LPTPM5] = imx7ulp_clk_composite("lptpm5", periph_bus_sels, ARRAY_SIZE(periph_bus_sels), true, false, true, base + 0x98);
--
2.7.4

2019-02-28 08:57:00

by Anson Huang

Subject: [PATCH 2/2] dt-bindings: clock: imx7ulp: remove SNVS clock

Since i.MX7ULP B0 chip, SNVS module is moved into M4
domain, so remove it from Linux clock table.

Signed-off-by: Anson Huang <[email protected]>
---
include/dt-bindings/clock/imx7ulp-clock.h | 1 -
1 file changed, 1 deletion(-)

diff --git a/include/dt-bindings/clock/imx7ulp-clock.h b/include/dt-bindings/clock/imx7ulp-clock.h
index 21d872e..6f66f9005c 100644
--- a/include/dt-bindings/clock/imx7ulp-clock.h
+++ b/include/dt-bindings/clock/imx7ulp-clock.h
@@ -65,7 +65,6 @@
#define IMX7ULP_CLK_FLEXBUS 2
#define IMX7ULP_CLK_SEMA42_1 3
#define IMX7ULP_CLK_DMA_MUX1 4
-#define IMX7ULP_CLK_SNVS 5
#define IMX7ULP_CLK_CAAM 6
#define IMX7ULP_CLK_LPTPM4 7
#define IMX7ULP_CLK_LPTPM5 8
--
2.7.4

2019-03-20 06:48:36

by Anson Huang

Subject: RE: [PATCH 1/2] clk: imx7ulp: remove snvs clock

Ping...

Best Regards!
Anson Huang

> -----Original Message-----
> From: Anson Huang
> Sent: 2019??2??28?? 16:56
> To: [email protected]; [email protected]; [email protected];
> [email protected]; [email protected]; [email protected];
> [email protected]; [email protected]; Aisheng Dong
> <[email protected]>; [email protected]; linux-
> [email protected]; [email protected]; linux-
> [email protected]; [email protected]
> Cc: dl-linux-imx <[email protected]>
> Subject: [PATCH 1/2] clk: imx7ulp: remove snvs clock
>
> Since i.MX7ULP B0 chip, the SNVS module is moved into M4 domain and its
> clock is also moved into PCC0 which is contorlled by M4, Linux kernel should
> NOT add it into clock tree.
>
> Signed-off-by: Anson Huang <[email protected]>
> ---
> drivers/clk/imx/clk-imx7ulp.c | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/drivers/clk/imx/clk-imx7ulp.c b/drivers/clk/imx/clk-imx7ulp.c
> index ce30663..6668210 100644
> --- a/drivers/clk/imx/clk-imx7ulp.c
> +++ b/drivers/clk/imx/clk-imx7ulp.c
> @@ -151,7 +151,6 @@ static void __init imx7ulp_clk_pcc2_init(struct
> device_node *np)
> clks[IMX7ULP_CLK_DMA1] = imx_clk_hw_gate("dma1",
> "nic1_clk", base + 0x20, 30);
> clks[IMX7ULP_CLK_RGPIO2P1] = imx_clk_hw_gate("rgpio2p1",
> "nic1_bus_clk", base + 0x3c, 30);
> clks[IMX7ULP_CLK_DMA_MUX1] =
> imx_clk_hw_gate("dma_mux1", "nic1_bus_clk", base + 0x84, 30);
> - clks[IMX7ULP_CLK_SNVS] = imx_clk_hw_gate("snvs",
> "nic1_bus_clk", base + 0x8c, 30);
> clks[IMX7ULP_CLK_CAAM] = imx_clk_hw_gate("caam",
> "nic1_clk", base + 0x90, 30);
> clks[IMX7ULP_CLK_LPTPM4] = imx7ulp_clk_composite("lptpm4",
> periph_bus_sels, ARRAY_SIZE(periph_bus_sels), true, false, true, base +
> 0x94);
> clks[IMX7ULP_CLK_LPTPM5] = imx7ulp_clk_composite("lptpm5",
> periph_bus_sels, ARRAY_SIZE(periph_bus_sels), true, false, true, base +
> 0x98);
> --
> 2.7.4

2019-03-20 08:02:31

by Shawn Guo

Subject: Re: [PATCH 1/2] clk: imx7ulp: remove snvs clock

On Thu, Feb 28, 2019 at 08:56:00AM +0000, Anson Huang wrote:
> Since i.MX7ULP B0 chip, the SNVS module is moved into M4
> domain and its clock is also moved into PCC0 which is
> contorlled by M4, Linux kernel should NOT add it into
> clock tree.
>
> Signed-off-by: Anson Huang <[email protected]>

Applied both, thanks.