i.MX PCIe controller is one dual mode PCIe controller, and can work either
as RC or EP.
This series add the i.MX PCIe EP mode support. And had been verified on
i.MX8MQ, i.MX8MM EVK and i.MX8MP EVK boards.
In the verification, one EVK board used as RC, the other one used as EP.
Use the cross TX/RX differential cable connect the two PCIe ports of these
two EVK boards.
+-----------+ +------------+
| PCIe TX |<-------------->|PCIe RX |
| | | |
|EVK Board | |EVK Board |
| | | |
| PCIe RX |<-------------->|PCIe TX |
+-----------+ +------------+
Main changes from v5 -> v6:
- The v6 only contains the DTS changes, since PCIe part had been picked up.
- Based on Shawn's for-next branch, and the following two patch-sets [1]
and [2] issued by Marek, rebase the DTS changes.
[1] https://patchwork.kernel.org/project/linux-arm-kernel/patch/[email protected]/
[2] https://patchwork.kernel.org/project/linux-arm-kernel/patch/[email protected]/
Main changes from v4 -> v5:
- Rebase to v6.2-rc1.
- Follow the clock definitions on i.MX8MP platform refer to the
following commit.
https://patchwork.kernel.org/project/linux-arm-kernel/patch/[email protected]/
Main changes from v3 -> v4:
- Add the Rob's ACK in the dt-binding patch.
- Use "i.MX" to keep spell consistent.
- Squash generic endpoint infrastructure changes of
"[12/14] PCI: imx6: Add iMX8MM PCIe EP mode" into Kconfig changes.
NOTE:
The following commits should be cherried back firstly, when apply this
series.
Shawn's tree (git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git)
d50650500064 arm64: dts: imx8mp-evk: Add PCIe support
9e65987b9584 arm64: dts: imx8mp: Add iMX8MP PCIe support
5506018d3dec soc: imx: imx8mp-blk-ctrl: handle PCIe PHY resets
Philipp's tree (git://git.pengutronix.de/git/pza/linux)
051d9eb40388 reset: imx7: Fix the iMX8MP PCIe PHY PERST support
The PHY changes:
https://patchwork.kernel.org/project/linux-pci/cover/[email protected]/
Main changes from v2 -> v3:
- Add the i.MX8MP PCIe EP support, and verified on i.MX8MP EVK board.
- Rebase to latest pci/next branch(tag: v6.0-rc1 plus some PCIe changes).
Main changes from v1 -> v2:
- Add Rob's ACK into first two commits.
- Rebase to the tag: pci-v5.20-changes of the pci/next branch.
arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi | 13 +++++++++++++
arch/arm64/boot/dts/freescale/imx8mm.dtsi | 24 ++++++++++++++++++++++++
arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 6 ++++++
arch/arm64/boot/dts/freescale/imx8mp.dtsi | 26 ++++++++++++++++++++++++++
arch/arm64/boot/dts/freescale/imx8mq-evk.dts | 11 +++++++++++
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 32 ++++++++++++++++++++++++++++++++
6 files changed, 112 insertions(+)
[PATCH v6 1/6] arm64: dts: Add i.MX8MM PCIe EP support
[PATCH v6 2/6] arm64: dts: Add i.MX8MM PCIe EP support on EVK board
[PATCH v6 3/6] arm64: dts: Add i.MX8MQ PCIe EP support
[PATCH v6 4/6] arm64: dts: Add i.MX8MQ PCIe EP support on EVK board
[PATCH v6 5/6] arm64: dts: Add i.MX8MP PCIe EP support
[PATCH v6 6/6] arm64: dts: Add i.MX8MP PCIe EP support on EVK board
Add i.MX8MM PCIe EP support on EVK board.
Signed-off-by: Richard Zhu <[email protected]>
---
arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi
index 0ce3005d578d..9d65b70939fa 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi
@@ -371,6 +371,19 @@ &pcie0 {
status = "okay";
};
+&pcie0_ep{
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pcie0>;
+ clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&pcie0_refclk>,
+ <&clk IMX8MM_CLK_PCIE1_AUX>;
+ assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>,
+ <&clk IMX8MM_CLK_PCIE1_CTRL>;
+ assigned-clock-rates = <10000000>, <250000000>;
+ assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>,
+ <&clk IMX8MM_SYS_PLL2_250M>;
+ status = "disabled";
+};
+
&sai2 {
#sound-dai-cells = <0>;
pinctrl-names = "default";
--
2.25.1
Add i.MX8MQ PCIe EP support on EVK board.
Signed-off-by: Richard Zhu <[email protected]>
---
arch/arm64/boot/dts/freescale/imx8mq-evk.dts | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
index 7507548cdb16..c48b94746efb 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
@@ -376,6 +376,17 @@ &pcie1 {
status = "okay";
};
+&pcie1_ep {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pcie1>;
+ clocks = <&clk IMX8MQ_CLK_PCIE2_ROOT>,
+ <&pcie0_refclk>,
+ <&clk IMX8MQ_CLK_PCIE2_PHY>,
+ <&clk IMX8MQ_CLK_PCIE2_AUX>;
+ vph-supply = <&vgen5_reg>;
+ status = "disabled";
+};
+
&pgc_gpu {
power-supply = <&sw1a_reg>;
};
--
2.25.1
Add i.MX8MQ PCIe EP support.
Signed-off-by: Richard Zhu <[email protected]>
---
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 32 +++++++++++++++++++++++
1 file changed, 32 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index 98fbba4c99a9..e1ffb7c9586d 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -1605,6 +1605,38 @@ pcie1: pcie@33c00000 {
status = "disabled";
};
+ pcie1_ep: pcie_ep@33c00000 {
+ compatible = "fsl,imx8mq-pcie-ep";
+ reg = <0x33c00000 0x000400000>,
+ <0x20000000 0x08000000>;
+ reg-names = "regs", "addr_space";
+ num-lanes = <1>;
+ interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "dma";
+ fsl,max-link-speed = <2>;
+ clocks = <&clk IMX8MQ_CLK_PCIE2_ROOT>,
+ <&clk IMX8MQ_CLK_PCIE2_PHY>,
+ <&clk IMX8MQ_CLK_PCIE2_PHY>,
+ <&clk IMX8MQ_CLK_PCIE2_AUX>;
+ clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux";
+ power-domains = <&pgc_pcie>;
+ resets = <&src IMX8MQ_RESET_PCIEPHY2>,
+ <&src IMX8MQ_RESET_PCIE2_CTRL_APPS_EN>,
+ <&src IMX8MQ_RESET_PCIE2_CTRL_APPS_TURNOFF>;
+ reset-names = "pciephy", "apps", "turnoff";
+ assigned-clocks = <&clk IMX8MQ_CLK_PCIE2_CTRL>,
+ <&clk IMX8MQ_CLK_PCIE2_PHY>,
+ <&clk IMX8MQ_CLK_PCIE2_AUX>;
+ assigned-clock-parents = <&clk IMX8MQ_SYS2_PLL_250M>,
+ <&clk IMX8MQ_SYS2_PLL_100M>,
+ <&clk IMX8MQ_SYS1_PLL_80M>;
+ assigned-clock-rates = <250000000>, <100000000>,
+ <10000000>;
+ num-ib-windows = <4>;
+ num-ob-windows = <4>;
+ status = "disabled";
+ };
+
gic: interrupt-controller@38800000 {
compatible = "arm,gic-v3";
reg = <0x38800000 0x10000>, /* GIC Dist */
--
2.25.1
Add i.MX8MM PCIe EP support.
Signed-off-by: Richard Zhu <[email protected]>
---
arch/arm64/boot/dts/freescale/imx8mm.dtsi | 24 +++++++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index 31f4548f85cf..9662aeccdb3b 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -1315,6 +1315,30 @@ pcie0: pcie@33800000 {
status = "disabled";
};
+ pcie0_ep: pcie_ep@33800000 {
+ compatible = "fsl,imx8mm-pcie-ep";
+ reg = <0x33800000 0x400000>,
+ <0x18000000 0x8000000>;
+ reg-names = "regs", "addr_space";
+ num-lanes = <1>;
+ interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "dma";
+ fsl,max-link-speed = <2>;
+ clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>,
+ <&clk IMX8MM_CLK_PCIE1_PHY>,
+ <&clk IMX8MM_CLK_PCIE1_AUX>;
+ clock-names = "pcie", "pcie_bus", "pcie_aux";
+ power-domains = <&pgc_pcie>;
+ resets = <&src IMX8MQ_RESET_PCIE_CTRL_APPS_EN>,
+ <&src IMX8MQ_RESET_PCIE_CTRL_APPS_TURNOFF>;
+ reset-names = "apps", "turnoff";
+ phys = <&pcie_phy>;
+ phy-names = "pcie-phy";
+ num-ib-windows = <4>;
+ num-ob-windows = <4>;
+ status = "disabled";
+ };
+
gpu_3d: gpu@38000000 {
compatible = "vivante,gc";
reg = <0x38000000 0x8000>;
--
2.25.1
On 20/01/2023 06:25, Richard Zhu wrote:
> Add i.MX8MQ PCIe EP support.
>
> Signed-off-by: Richard Zhu <[email protected]>
> ---
> arch/arm64/boot/dts/freescale/imx8mq.dtsi | 32 +++++++++++++++++++++++
> 1 file changed, 32 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> index 98fbba4c99a9..e1ffb7c9586d 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> @@ -1605,6 +1605,38 @@ pcie1: pcie@33c00000 {
> status = "disabled";
> };
>
> + pcie1_ep: pcie_ep@33c00000 {
Eh...
Best regards,
Krzysztof
On 20/01/2023 06:25, Richard Zhu wrote:
> Add i.MX8MQ PCIe EP support on EVK board.
>
> Signed-off-by: Richard Zhu <[email protected]>
> ---
> arch/arm64/boot/dts/freescale/imx8mq-evk.dts | 11 +++++++++++
> 1 file changed, 11 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
> index 7507548cdb16..c48b94746efb 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
> @@ -376,6 +376,17 @@ &pcie1 {
> status = "okay";
> };
>
> +&pcie1_ep {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_pcie1>;
> + clocks = <&clk IMX8MQ_CLK_PCIE2_ROOT>,
> + <&pcie0_refclk>,
> + <&clk IMX8MQ_CLK_PCIE2_PHY>,
> + <&clk IMX8MQ_CLK_PCIE2_AUX>;
> + vph-supply = <&vgen5_reg>;
> + status = "disabled";
Nope, it's useless as disabled.
Best regards,
Krzysztof
On 20/01/2023 06:25, Richard Zhu wrote:
> Add i.MX8MM PCIe EP support on EVK board.
>
> Signed-off-by: Richard Zhu <[email protected]>
> ---
> arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi | 13 +++++++++++++
> 1 file changed, 13 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi
> index 0ce3005d578d..9d65b70939fa 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi
> @@ -371,6 +371,19 @@ &pcie0 {
> status = "okay";
> };
>
> +&pcie0_ep{
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_pcie0>;
> + clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&pcie0_refclk>,
> + <&clk IMX8MM_CLK_PCIE1_AUX>;
> + assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>,
> + <&clk IMX8MM_CLK_PCIE1_CTRL>;
> + assigned-clock-rates = <10000000>, <250000000>;
> + assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>,
> + <&clk IMX8MM_SYS_PLL2_250M>;
> + status = "disabled";
It's already disabled. What are you doing here? Having disabled node is
useless, so entire patch should be dropped.
Best regards,
Krzysztof
On 20/01/2023 06:25, Richard Zhu wrote:
> Add i.MX8MM PCIe EP support.
>
> Signed-off-by: Richard Zhu <[email protected]>
> ---
> arch/arm64/boot/dts/freescale/imx8mm.dtsi | 24 +++++++++++++++++++++++
> 1 file changed, 24 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> index 31f4548f85cf..9662aeccdb3b 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> @@ -1315,6 +1315,30 @@ pcie0: pcie@33800000 {
> status = "disabled";
> };
>
> + pcie0_ep: pcie_ep@33800000 {
No underscores in node names.
> + compatible = "fsl,imx8mm-pcie-ep";
Did you test it with bindings? Does it pass without warnings?
Best regards,
Krzysztof
> -----Original Message-----
> From: Krzysztof Kozlowski <[email protected]>
> Sent: 2023年1月20日 16:08
> To: Hongxing Zhu <[email protected]>; [email protected];
> [email protected]; [email protected]; Peng Fan
> <[email protected]>; [email protected]; Marcel Ziswiler
> <[email protected]>; [email protected]; Frank Li
> <[email protected]>
> Cc: [email protected]; [email protected];
> [email protected]; [email protected];
> [email protected]; dl-linux-imx <[email protected]>
> Subject: Re: [PATCH v6 1/6] arm64: dts: Add i.MX8MM PCIe EP support
>
> On 20/01/2023 06:25, Richard Zhu wrote:
> > Add i.MX8MM PCIe EP support.
> >
> > Signed-off-by: Richard Zhu <[email protected]>
> > ---
> > arch/arm64/boot/dts/freescale/imx8mm.dtsi | 24
> +++++++++++++++++++++++
> > 1 file changed, 24 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > index 31f4548f85cf..9662aeccdb3b 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> > @@ -1315,6 +1315,30 @@ pcie0: pcie@33800000 {
> > status = "disabled";
> > };
> >
> > + pcie0_ep: pcie_ep@33800000 {
>
> No underscores in node names.
Hi Krzystof:
Thanks for your review comments.
Sorry to reply late, since I'm taking the Spring Festival Vacation in the past days.
Got that. Would be changed later.
>
> > + compatible = "fsl,imx8mm-pcie-ep";
>
> Did you test it with bindings? Does it pass without warnings?
>
>
It's my fault that I'm trying to let fsl,imx6q-pcie.yaml to cover the binding
DT-schema for the Endpoint modes.
One standalone fsl,imx6q-pcie-ep.yaml should be created as DT-schema for i.MX
PCIe Endpoint modes.
I would summit next version a moment later. Please help to review them.
Thanks in advanced.
Best Regards
Richard Zhu
> Best regards,
> Krzysztof
> -----Original Message-----
> From: Krzysztof Kozlowski <[email protected]>
> Sent: 2023年1月20日 16:09
> To: Hongxing Zhu <[email protected]>; [email protected];
> [email protected]; [email protected]; Peng Fan
> <[email protected]>; [email protected]; Marcel Ziswiler
> <[email protected]>; [email protected]; Frank Li
> <[email protected]>
> Cc: [email protected]; [email protected];
> [email protected]; [email protected];
> [email protected]; dl-linux-imx <[email protected]>
> Subject: Re: [PATCH v6 2/6] arm64: dts: Add i.MX8MM PCIe EP support on EVK
> board
>
> On 20/01/2023 06:25, Richard Zhu wrote:
> > Add i.MX8MM PCIe EP support on EVK board.
> >
> > Signed-off-by: Richard Zhu <[email protected]>
> > ---
> > arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi | 13 +++++++++++++
> > 1 file changed, 13 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi
> > b/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi
> > index 0ce3005d578d..9d65b70939fa 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi
> > @@ -371,6 +371,19 @@ &pcie0 {
> > status = "okay";
> > };
> >
> > +&pcie0_ep{
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_pcie0>;
> > + clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&pcie0_refclk>,
> > + <&clk IMX8MM_CLK_PCIE1_AUX>;
> > + assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>,
> > + <&clk IMX8MM_CLK_PCIE1_CTRL>;
> > + assigned-clock-rates = <10000000>, <250000000>;
> > + assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>,
> > + <&clk IMX8MM_SYS_PLL2_250M>;
> > + status = "disabled";
>
> It's already disabled. What are you doing here? Having disabled node is useless,
> so entire patch should be dropped.
Okay, the 2/4/6 patches would be dropped. Thanks.
Best Regards
Richard Zhu
>
> Best regards,
> Krzysztof
> -----Original Message-----
> From: Krzysztof Kozlowski <[email protected]>
> Sent: 2023年1月20日 16:09
> To: Hongxing Zhu <[email protected]>; [email protected];
> [email protected]; [email protected]; Peng Fan
> <[email protected]>; [email protected]; Marcel Ziswiler
> <[email protected]>; [email protected]; Frank Li
> <[email protected]>
> Cc: [email protected]; [email protected];
> [email protected]; [email protected];
> [email protected]; dl-linux-imx <[email protected]>
> Subject: Re: [PATCH v6 3/6] arm64: dts: Add i.MX8MQ PCIe EP support
>
> On 20/01/2023 06:25, Richard Zhu wrote:
> > Add i.MX8MQ PCIe EP support.
> >
> > Signed-off-by: Richard Zhu <[email protected]>
> > ---
> > arch/arm64/boot/dts/freescale/imx8mq.dtsi | 32
> +++++++++++++++++++++++
> > 1 file changed, 32 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> > index 98fbba4c99a9..e1ffb7c9586d 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> > @@ -1605,6 +1605,38 @@ pcie1: pcie@33c00000 {
> > status = "disabled";
> > };
> >
> > + pcie1_ep: pcie_ep@33c00000 {
>
> Eh...
Would replace the underscore by hyphen.
Thanks.
Best Regards
Richard Zhu
>
> Best regards,
> Krzysztof
> -----Original Message-----
> From: Krzysztof Kozlowski <[email protected]>
> Sent: 2023年1月20日 16:09
> To: Hongxing Zhu <[email protected]>; [email protected];
> [email protected]; [email protected]; Peng Fan
> <[email protected]>; [email protected]; Marcel Ziswiler
> <[email protected]>; [email protected]; Frank Li
> <[email protected]>
> Cc: [email protected]; [email protected];
> [email protected]; [email protected];
> [email protected]; dl-linux-imx <[email protected]>
> Subject: Re: [PATCH v6 4/6] arm64: dts: Add i.MX8MQ PCIe EP support on EVK
> board
>
> On 20/01/2023 06:25, Richard Zhu wrote:
> > Add i.MX8MQ PCIe EP support on EVK board.
> >
> > Signed-off-by: Richard Zhu <[email protected]>
> > ---
> > arch/arm64/boot/dts/freescale/imx8mq-evk.dts | 11 +++++++++++
> > 1 file changed, 11 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
> b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
> > index 7507548cdb16..c48b94746efb 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
> > +++ b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
> > @@ -376,6 +376,17 @@ &pcie1 {
> > status = "okay";
> > };
> >
> > +&pcie1_ep {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_pcie1>;
> > + clocks = <&clk IMX8MQ_CLK_PCIE2_ROOT>,
> > + <&pcie0_refclk>,
> > + <&clk IMX8MQ_CLK_PCIE2_PHY>,
> > + <&clk IMX8MQ_CLK_PCIE2_AUX>;
> > + vph-supply = <&vgen5_reg>;
> > + status = "disabled";
>
> Nope, it's useless as disabled.
Okay, would be dropped.
Thanks.
Best Regards
Richard Zhu
>
> Best regards,
> Krzysztof