On some systems with Navi3x dGPU will attempt to use BACO for runtime
PM but fails to resume properly. This is because on these systems
the root port goes into D3cold which is incompatible with BACO.
This happens because in this case dGPU is connected to a bridge between
root port which causes BOCO detection logic to fail. Fix the intent of
the logic by looking at root port, not the immediate upstream bridge for
_PR3.
Cc: [email protected]
Suggested-by: Jun Ma <[email protected]>
Tested-by: David Perry <[email protected]>
Fixes: b10c1c5b3a4e ("drm/amdgpu: add check for ACPI power resources")
Signed-off-by: Mario Limonciello <[email protected]>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index e4627d92e1d0..bad2b5577e96 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -2238,7 +2238,7 @@ static int amdgpu_device_ip_early_init(struct amdgpu_device *adev)
adev->flags |= AMD_IS_PX;
if (!(adev->flags & AMD_IS_APU)) {
- parent = pci_upstream_bridge(adev->pdev);
+ parent = pcie_find_root_port(adev->pdev);
adev->has_pr3 = parent ? pci_pr3_present(parent) : false;
}
--
2.34.1
[Public]
> -----Original Message-----
> From: Limonciello, Mario <[email protected]>
> Sent: Tuesday, September 26, 2023 7:00 PM
> To: [email protected]; Sebastian Reichel <[email protected]>;
> Deucher, Alexander <[email protected]>
> Cc: [email protected]; [email protected]; Ma, Jun
> <[email protected]>; Limonciello, Mario <[email protected]>
> Subject: [PATCH 1/3] drm/amd: Fix detection of _PR3 on the PCIe root port
>
> On some systems with Navi3x dGPU will attempt to use BACO for runtime PM
> but fails to resume properly. This is because on these systems the root port
> goes into D3cold which is incompatible with BACO.
>
> This happens because in this case dGPU is connected to a bridge between root
> port which causes BOCO detection logic to fail. Fix the intent of the logic by
> looking at root port, not the immediate upstream bridge for _PR3.
>
> Cc: [email protected]
> Suggested-by: Jun Ma <[email protected]>
> Tested-by: David Perry <[email protected]>
> Fixes: b10c1c5b3a4e ("drm/amdgpu: add check for ACPI power resources")
> Signed-off-by: Mario Limonciello <[email protected]>
Series is:
Reviewed-by: Alex Deucher <[email protected]>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> index e4627d92e1d0..bad2b5577e96 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> @@ -2238,7 +2238,7 @@ static int amdgpu_device_ip_early_init(struct
> amdgpu_device *adev)
> adev->flags |= AMD_IS_PX;
>
> if (!(adev->flags & AMD_IS_APU)) {
> - parent = pci_upstream_bridge(adev->pdev);
> + parent = pcie_find_root_port(adev->pdev);
> adev->has_pr3 = parent ? pci_pr3_present(parent) : false;
> }
>
> --
> 2.34.1