2020-08-11 15:03:00

by Álvaro Fernández Rojas

Subject: [PATCH v3 3/4] MIPS: BCM63xx: enable EHCI for DWV-S0 board

BCM6358 SoCs have OHCI and EHCI controllers that share the same USB ports.
Therefore, the board should also have EHCI enabled.

Signed-off-by: Álvaro Fernández Rojas <[email protected]>
Acked-by: Florian Fainelli <[email protected]>
---
v3: Reword commit description to avoid possible confusions.
v2: no changes.

arch/mips/bcm63xx/boards/board_bcm963xx.c | 1 +
1 file changed, 1 insertion(+)

diff --git a/arch/mips/bcm63xx/boards/board_bcm963xx.c b/arch/mips/bcm63xx/boards/board_bcm963xx.c
index 45f1bc437245..ac9570b66f37 100644
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -645,6 +645,7 @@ static struct board_info __initdata board_DWVS0 = {
},

.has_ohci0 = 1,
+ .has_ehci0 = 1,
};
#endif /* CONFIG_BCM63XX_CPU_6358 */

--
2.28.0

2020-08-11 16:31:32

by Philippe Mathieu-Daudé

Subject: Re: [PATCH v3 3/4] MIPS: BCM63xx: enable EHCI for DWV-S0 board

On Tue, Aug 11, 2020 at 5:01 PM Álvaro Fernández Rojas
<[email protected]> wrote:
>
> BCM6358 SoCs have OHCI and EHCI controllers that share the same USB ports.
> Therefore, the board should also have EHCI enabled.
>
> Signed-off-by: Álvaro Fernández Rojas <[email protected]>
> Acked-by: Florian Fainelli <[email protected]>

Reviewed-by: Philippe Mathieu-Daudé <[email protected]>

> ---
> v3: Reword commit description to avoid possible confusions.

Thanks!

> v2: no changes.
>
> arch/mips/bcm63xx/boards/board_bcm963xx.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/mips/bcm63xx/boards/board_bcm963xx.c b/arch/mips/bcm63xx/boards/board_bcm963xx.c
> index 45f1bc437245..ac9570b66f37 100644
> --- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
> +++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
> @@ -645,6 +645,7 @@ static struct board_info __initdata board_DWVS0 = {
> },
>
> .has_ohci0 = 1,
> + .has_ehci0 = 1,
> };
> #endif /* CONFIG_BCM63XX_CPU_6358 */
>
> --
> 2.28.0
>