2020-01-16 14:32:43

by Guo Ren

Subject: [PATCH V2 3/4] riscv: Extending cpufeature.c to detect V-extension

From: Guo Ren <[email protected]>

Current cpufeature.c doesn't support detecting V-extension, because
"rv64" also contain a 'v' letter and we need to skip it.

Signed-off-by: Guo Ren <[email protected]>
Cc: Anup Patel <[email protected]>
---
arch/riscv/include/uapi/asm/hwcap.h | 1 +
arch/riscv/kernel/cpufeature.c | 4 +++-
2 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/arch/riscv/include/uapi/asm/hwcap.h b/arch/riscv/include/uapi/asm/hwcap.h
index dee98ee28318..a913e9a38819 100644
--- a/arch/riscv/include/uapi/asm/hwcap.h
+++ b/arch/riscv/include/uapi/asm/hwcap.h
@@ -21,5 +21,6 @@
#define COMPAT_HWCAP_ISA_F (1 << ('F' - 'A'))
#define COMPAT_HWCAP_ISA_D (1 << ('D' - 'A'))
#define COMPAT_HWCAP_ISA_C (1 << ('C' - 'A'))
+#define COMPAT_HWCAP_ISA_V (1 << ('V' - 'A'))

#endif /* _UAPI_ASM_RISCV_HWCAP_H */
diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c
index a5ad00043104..c8527d770c98 100644
--- a/arch/riscv/kernel/cpufeature.c
+++ b/arch/riscv/kernel/cpufeature.c
@@ -30,6 +30,7 @@ void riscv_fill_hwcap(void)
isa2hwcap['f'] = isa2hwcap['F'] = COMPAT_HWCAP_ISA_F;
isa2hwcap['d'] = isa2hwcap['D'] = COMPAT_HWCAP_ISA_D;
isa2hwcap['c'] = isa2hwcap['C'] = COMPAT_HWCAP_ISA_C;
+ isa2hwcap['v'] = isa2hwcap['V'] = COMPAT_HWCAP_ISA_V;

elf_hwcap = 0;

@@ -44,7 +45,8 @@ void riscv_fill_hwcap(void)
continue;
}

- for (i = 0; i < strlen(isa); ++i)
+ /* Skip rv64/rv32 to support v/V:vector */
+ for (i = 4; i < strlen(isa); ++i)
this_hwcap |= isa2hwcap[(unsigned char)(isa[i])];

/*
--
2.17.0

2020-01-23 05:46:42

by Anup Patel

Subject: Re: [PATCH V2 3/4] riscv: Extending cpufeature.c to detect V-extension

On Thu, Jan 16, 2020 at 8:01 PM <[email protected]> wrote:
>
> From: Guo Ren <[email protected]>
>
> Current cpufeature.c doesn't support detecting V-extension, because
> "rv64" also contain a 'v' letter and we need to skip it.
>
> Signed-off-by: Guo Ren <[email protected]>
> Cc: Anup Patel <[email protected]>
> ---
> arch/riscv/include/uapi/asm/hwcap.h | 1 +
> arch/riscv/kernel/cpufeature.c | 4 +++-
> 2 files changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/arch/riscv/include/uapi/asm/hwcap.h b/arch/riscv/include/uapi/asm/hwcap.h
> index dee98ee28318..a913e9a38819 100644
> --- a/arch/riscv/include/uapi/asm/hwcap.h
> +++ b/arch/riscv/include/uapi/asm/hwcap.h
> @@ -21,5 +21,6 @@
> #define COMPAT_HWCAP_ISA_F (1 << ('F' - 'A'))
> #define COMPAT_HWCAP_ISA_D (1 << ('D' - 'A'))
> #define COMPAT_HWCAP_ISA_C (1 << ('C' - 'A'))
> +#define COMPAT_HWCAP_ISA_V (1 << ('V' - 'A'))
>
> #endif /* _UAPI_ASM_RISCV_HWCAP_H */
> diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c
> index a5ad00043104..c8527d770c98 100644
> --- a/arch/riscv/kernel/cpufeature.c
> +++ b/arch/riscv/kernel/cpufeature.c
> @@ -30,6 +30,7 @@ void riscv_fill_hwcap(void)
> isa2hwcap['f'] = isa2hwcap['F'] = COMPAT_HWCAP_ISA_F;
> isa2hwcap['d'] = isa2hwcap['D'] = COMPAT_HWCAP_ISA_D;
> isa2hwcap['c'] = isa2hwcap['C'] = COMPAT_HWCAP_ISA_C;
> + isa2hwcap['v'] = isa2hwcap['V'] = COMPAT_HWCAP_ISA_V;
>
> elf_hwcap = 0;
>
> @@ -44,7 +45,8 @@ void riscv_fill_hwcap(void)
> continue;
> }
>
> - for (i = 0; i < strlen(isa); ++i)
> + /* Skip rv64/rv32 to support v/V:vector */
> + for (i = 4; i < strlen(isa); ++i)
> this_hwcap |= isa2hwcap[(unsigned char)(isa[i])];
>
> /*
> --
> 2.17.0
>

LGTM.

Reviewed-by: Anup Patel <[email protected]>

Regards,
Anup