This series add suspend/resume support for Loongson-related irqchip
drivers (i.e., HTVECINTC, EIOINTC, PCH-PIC and PCH_LPC), which is needed
for LoongArch's upcoming suspend/hibernation support.
Note: this series is applicable after "irqchip/loongson-htvec: Add ACPI
init support".
Huacai Chen (4):
irqchip/loongson-htvec: Add suspend/resume support.
irqchip/loongson-eiointc: Add suspend/resume support.
irqchip/loongson-pch-pic: Add suspend/resume support.
irqchip/loongson-pch-lpc: Add suspend/resume support.
Signed-off-by: Huacai Chen <[email protected]>
---
drivers/irqchip/irq-loongson-eiointc.c | 31 ++++++++++++++++++++++
drivers/irqchip/irq-loongson-htvec.c | 27 +++++++++++++++++++
drivers/irqchip/irq-loongson-pch-lpc.c | 25 ++++++++++++++++++
drivers/irqchip/irq-loongson-pch-pic.c | 47 ++++++++++++++++++++++++++++++++++
4 files changed, 130 insertions(+)
--
2.27.0
Add suspend/resume support for PCH-PIC irqchip, which is needed for
upcoming suspend/hibernation.
Signed-off-by: Huacai Chen <[email protected]>
---
drivers/irqchip/irq-loongson-pch-pic.c | 47 ++++++++++++++++++++++++++
1 file changed, 47 insertions(+)
diff --git a/drivers/irqchip/irq-loongson-pch-pic.c b/drivers/irqchip/irq-loongson-pch-pic.c
index c01b9c257005..217513d74664 100644
--- a/drivers/irqchip/irq-loongson-pch-pic.c
+++ b/drivers/irqchip/irq-loongson-pch-pic.c
@@ -15,6 +15,7 @@
#include <linux/of_address.h>
#include <linux/of_irq.h>
#include <linux/of_platform.h>
+#include <linux/syscore_ops.h>
/* Registers */
#define PCH_PIC_MASK 0x20
@@ -42,6 +43,9 @@ struct pch_pic {
raw_spinlock_t pic_lock;
u32 vec_count;
u32 gsi_base;
+ u32 saved_vec_en[PIC_REG_COUNT];
+ u32 saved_vec_pol[PIC_REG_COUNT];
+ u32 saved_vec_edge[PIC_REG_COUNT];
};
static struct pch_pic *pch_pic_priv[MAX_IO_PICS];
@@ -145,6 +149,7 @@ static struct irq_chip pch_pic_irq_chip = {
.irq_ack = pch_pic_ack_irq,
.irq_set_affinity = irq_chip_set_affinity_parent,
.irq_set_type = pch_pic_set_type,
+ .flags = IRQCHIP_SKIP_SET_WAKE,
};
static int pch_pic_domain_translate(struct irq_domain *d,
@@ -228,6 +233,46 @@ static void pch_pic_reset(struct pch_pic *priv)
}
}
+static int pch_pic_suspend(void)
+{
+ int i, j;
+
+ for (i = 0; i < nr_pics; i++) {
+ for (j = 0; j < PIC_REG_COUNT; j++) {
+ pch_pic_priv[i]->saved_vec_pol[j] =
+ readl(pch_pic_priv[i]->base + PCH_PIC_POL + 4 * j);
+ pch_pic_priv[i]->saved_vec_edge[j] =
+ readl(pch_pic_priv[i]->base + PCH_PIC_EDGE + 4 * j);
+ pch_pic_priv[i]->saved_vec_en[j] =
+ readl(pch_pic_priv[i]->base + PCH_PIC_MASK + 4 * j);
+ }
+ }
+
+ return 0;
+}
+
+static void pch_pic_resume(void)
+{
+ int i, j;
+
+ for (i = 0; i < nr_pics; i++) {
+ pch_pic_reset(pch_pic_priv[i]);
+ for (j = 0; j < PIC_REG_COUNT; j++) {
+ writel(pch_pic_priv[i]->saved_vec_pol[j],
+ pch_pic_priv[i]->base + PCH_PIC_POL + 4 * j);
+ writel(pch_pic_priv[i]->saved_vec_edge[j],
+ pch_pic_priv[i]->base + PCH_PIC_EDGE + 4 * j);
+ writel(pch_pic_priv[i]->saved_vec_en[j],
+ pch_pic_priv[i]->base + PCH_PIC_MASK + 4 * j);
+ }
+ }
+}
+
+static struct syscore_ops pch_pic_syscore_ops = {
+ .suspend = pch_pic_suspend,
+ .resume = pch_pic_resume,
+};
+
static int pch_pic_init(phys_addr_t addr, unsigned long size, int vec_base,
struct irq_domain *parent_domain, struct fwnode_handle *domain_handle,
u32 gsi_base)
@@ -260,6 +305,8 @@ static int pch_pic_init(phys_addr_t addr, unsigned long size, int vec_base,
pch_pic_handle[nr_pics] = domain_handle;
pch_pic_priv[nr_pics++] = priv;
+ register_syscore_ops(&pch_pic_syscore_ops);
+
return 0;
iounmap_base:
--
2.31.1
Add suspend/resume support for EIOINTC irqchip, which is needed for
upcoming suspend/hibernation.
Signed-off-by: Huacai Chen <[email protected]>
---
drivers/irqchip/irq-loongson-eiointc.c | 31 ++++++++++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/drivers/irqchip/irq-loongson-eiointc.c b/drivers/irqchip/irq-loongson-eiointc.c
index 16e9af8d8b1e..c68f8de3ae09 100644
--- a/drivers/irqchip/irq-loongson-eiointc.c
+++ b/drivers/irqchip/irq-loongson-eiointc.c
@@ -17,6 +17,7 @@
#include <linux/of_address.h>
#include <linux/of_irq.h>
#include <linux/of_platform.h>
+#include <linux/syscore_ops.h>
#define EIOINTC_REG_NODEMAP 0x14a0
#define EIOINTC_REG_IPMAP 0x14c0
@@ -301,6 +302,35 @@ static struct irq_domain *acpi_get_vec_parent(int node, struct acpi_vector_group
return NULL;
}
+static int eiointc_suspend(void)
+{
+ return 0;
+}
+
+static void eiointc_resume(void)
+{
+ int i, j;
+ struct irq_desc *desc;
+ struct irq_data *irq_data;
+
+ eiointc_router_init(0);
+
+ for (i = 0; i < nr_pics; i++) {
+ for (j = 0; j < VEC_COUNT; j++) {
+ desc = irq_resolve_mapping(eiointc_priv[i]->eiointc_domain, j);
+ if (desc && desc->handle_irq && desc->handle_irq != handle_bad_irq) {
+ irq_data = &desc->irq_data;
+ eiointc_set_irq_affinity(irq_data, irq_data->common->affinity, 0);
+ }
+ }
+ }
+}
+
+static struct syscore_ops eiointc_syscore_ops = {
+ .suspend = eiointc_suspend,
+ .resume = eiointc_resume,
+};
+
static int __init
pch_pic_parse_madt(union acpi_subtable_headers *header,
const unsigned long end)
@@ -380,6 +410,7 @@ int __init eiointc_acpi_init(struct irq_domain *parent,
parent_irq = irq_create_mapping(parent, acpi_eiointc->cascade);
irq_set_chained_handler_and_data(parent_irq, eiointc_irq_dispatch, priv);
+ register_syscore_ops(&eiointc_syscore_ops);
cpuhp_setup_state_nocalls(CPUHP_AP_IRQ_LOONGARCH_STARTING,
"irqchip/loongarch/intc:starting",
eiointc_router_init, NULL);
--
2.31.1
On Mon, 17 Oct 2022 04:39:02 +0100,
Huacai Chen <[email protected]> wrote:
>
> Add suspend/resume support for EIOINTC irqchip, which is needed for
> upcoming suspend/hibernation.
>
> Signed-off-by: Huacai Chen <[email protected]>
> ---
> drivers/irqchip/irq-loongson-eiointc.c | 31 ++++++++++++++++++++++++++
> 1 file changed, 31 insertions(+)
>
> diff --git a/drivers/irqchip/irq-loongson-eiointc.c b/drivers/irqchip/irq-loongson-eiointc.c
> index 16e9af8d8b1e..c68f8de3ae09 100644
> --- a/drivers/irqchip/irq-loongson-eiointc.c
> +++ b/drivers/irqchip/irq-loongson-eiointc.c
> @@ -17,6 +17,7 @@
> #include <linux/of_address.h>
> #include <linux/of_irq.h>
> #include <linux/of_platform.h>
> +#include <linux/syscore_ops.h>
>
> #define EIOINTC_REG_NODEMAP 0x14a0
> #define EIOINTC_REG_IPMAP 0x14c0
> @@ -301,6 +302,35 @@ static struct irq_domain *acpi_get_vec_parent(int node, struct acpi_vector_group
> return NULL;
> }
>
> +static int eiointc_suspend(void)
> +{
> + return 0;
> +}
> +
> +static void eiointc_resume(void)
> +{
> + int i, j;
> + struct irq_desc *desc;
> + struct irq_data *irq_data;
> +
> + eiointc_router_init(0);
> +
> + for (i = 0; i < nr_pics; i++) {
> + for (j = 0; j < VEC_COUNT; j++) {
> + desc = irq_resolve_mapping(eiointc_priv[i]->eiointc_domain, j);
> + if (desc && desc->handle_irq && desc->handle_irq != handle_bad_irq) {
> + irq_data = &desc->irq_data;
> + eiointc_set_irq_affinity(irq_data, irq_data->common->affinity, 0);
Changing the affinity without holding the irq_desc lock? What makes
this safe?
M.
--
Without deviation from the norm, progress is not possible.
Hi, Marc,
On Wed, Oct 19, 2022 at 3:23 PM Marc Zyngier <[email protected]> wrote:
>
> On Mon, 17 Oct 2022 04:39:02 +0100,
> Huacai Chen <[email protected]> wrote:
> >
> > Add suspend/resume support for EIOINTC irqchip, which is needed for
> > upcoming suspend/hibernation.
> >
> > Signed-off-by: Huacai Chen <[email protected]>
> > ---
> > drivers/irqchip/irq-loongson-eiointc.c | 31 ++++++++++++++++++++++++++
> > 1 file changed, 31 insertions(+)
> >
> > diff --git a/drivers/irqchip/irq-loongson-eiointc.c b/drivers/irqchip/irq-loongson-eiointc.c
> > index 16e9af8d8b1e..c68f8de3ae09 100644
> > --- a/drivers/irqchip/irq-loongson-eiointc.c
> > +++ b/drivers/irqchip/irq-loongson-eiointc.c
> > @@ -17,6 +17,7 @@
> > #include <linux/of_address.h>
> > #include <linux/of_irq.h>
> > #include <linux/of_platform.h>
> > +#include <linux/syscore_ops.h>
> >
> > #define EIOINTC_REG_NODEMAP 0x14a0
> > #define EIOINTC_REG_IPMAP 0x14c0
> > @@ -301,6 +302,35 @@ static struct irq_domain *acpi_get_vec_parent(int node, struct acpi_vector_group
> > return NULL;
> > }
> >
> > +static int eiointc_suspend(void)
> > +{
> > + return 0;
> > +}
> > +
> > +static void eiointc_resume(void)
> > +{
> > + int i, j;
> > + struct irq_desc *desc;
> > + struct irq_data *irq_data;
> > +
> > + eiointc_router_init(0);
> > +
> > + for (i = 0; i < nr_pics; i++) {
> > + for (j = 0; j < VEC_COUNT; j++) {
> > + desc = irq_resolve_mapping(eiointc_priv[i]->eiointc_domain, j);
> > + if (desc && desc->handle_irq && desc->handle_irq != handle_bad_irq) {
> > + irq_data = &desc->irq_data;
> > + eiointc_set_irq_affinity(irq_data, irq_data->common->affinity, 0);
>
> Changing the affinity without holding the irq_desc lock? What makes
> this safe?
Yes, holding the lock is needed, thanks.
Huacai
>
> M.
>
> --
> Without deviation from the norm, progress is not possible.