During suspend and resume, other CPUs are hot-unpluged and IRQs are
migrated to CPU0. So it is not necessary to restore irq affinity for
eiointc irq controller.
Also there is small optimization for the interrupt dispatch function
eiointc_irq_dispatch. For example there are 256 IRQs supported for
eiointc on Loongson 3A5000 and 2K2000 system, 128 IRQs on 2K0500 platform,
eiointc irq handler reads the bitmap and find pending irqs when irq
happens. So there are four times of consecutive iocsr_read64 operations
for all the bits to find all pending irqs. If the pending bitmap is zero,
it means that there is no pending irq for the this irq bitmap range, we
can skip handling to avoid some useless operations such as clearing hw ISR.
---
Changes in v4:
1. Adjust order of the patch and put the simple patch as first one.
2. Modify comments in function eiointc_irq_dispatch suitable for all
hw platforms.
Changes in v3:
Split the patch into three small patches
Changes in v2:
Modify changelog and comments
---
Bibo Mao (3):
irqchip/loongson-eiointc: Typo fix in function eiointc_domain_alloc
irqchip/loongson-eiointc: Skip handling if there is no pending irq
irqchip/loongson-eiointc: Refine irq affinity setting during resume
drivers/irqchip/irq-loongson-eiointc.c | 24 +++++++-----------------
1 file changed, 7 insertions(+), 17 deletions(-)
base-commit: 615d300648869c774bd1fe54b4627bb0c20faed4
--
2.39.3
It is one simple optimization in the interrupt dispatch function
eiointc_irq_dispatch. There are 256 IRQs supported for eiointc on
3A5000 and 2K2000 platform, 128 IRQS on 2K0500 platform, eiointc irq
handler reads the bitmap and find pending irqs when irq happens. So
there are several consecutive iocsr_read64 operations for the all
bits to find all pending irqs. If the pending bitmap is zero, it
means that there is no pending irq for the this irq bitmap range,
we can skip handling to avoid some useless operations such as
clearing hw ISR.
Signed-off-by: Bibo Mao <[email protected]>
---
drivers/irqchip/irq-loongson-eiointc.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/irqchip/irq-loongson-eiointc.c b/drivers/irqchip/irq-loongson-eiointc.c
index b3736bdd4b9f..6a71a8c29ac7 100644
--- a/drivers/irqchip/irq-loongson-eiointc.c
+++ b/drivers/irqchip/irq-loongson-eiointc.c
@@ -198,6 +198,12 @@ static void eiointc_irq_dispatch(struct irq_desc *desc)
for (i = 0; i < eiointc_priv[0]->vec_count / VEC_COUNT_PER_REG; i++) {
pending = iocsr_read64(EIOINTC_REG_ISR + (i << 3));
+
+ /* Skip handling if pending bitmap is zero */
+ if (!pending)
+ continue;
+
+ /* Clear the IRQs */
iocsr_write64(pending, EIOINTC_REG_ISR + (i << 3));
while (pending) {
int bit = __ffs(pending);
--
2.39.3
During suspend and resume, CPUs except CPU0 are hot-unpluged and IRQs
are migrated to CPU0. So it is not necessary to restore irq affinity for
eiointc irq controller when system resumes. This patch removes the piece
of code about irq affinity restoring in function eiointc_resume.
Signed-off-by: Bibo Mao <[email protected]>
---
drivers/irqchip/irq-loongson-eiointc.c | 16 ----------------
1 file changed, 16 deletions(-)
diff --git a/drivers/irqchip/irq-loongson-eiointc.c b/drivers/irqchip/irq-loongson-eiointc.c
index 6a71a8c29ac7..b64cbe3052e8 100644
--- a/drivers/irqchip/irq-loongson-eiointc.c
+++ b/drivers/irqchip/irq-loongson-eiointc.c
@@ -310,23 +310,7 @@ static int eiointc_suspend(void)
static void eiointc_resume(void)
{
- int i, j;
- struct irq_desc *desc;
- struct irq_data *irq_data;
-
eiointc_router_init(0);
-
- for (i = 0; i < nr_pics; i++) {
- for (j = 0; j < eiointc_priv[0]->vec_count; j++) {
- desc = irq_resolve_mapping(eiointc_priv[i]->eiointc_domain, j);
- if (desc && desc->handle_irq && desc->handle_irq != handle_bad_irq) {
- raw_spin_lock(&desc->lock);
- irq_data = irq_domain_get_irq_data(eiointc_priv[i]->eiointc_domain, irq_desc_get_irq(desc));
- eiointc_set_irq_affinity(irq_data, irq_data->common->affinity, 0);
- raw_spin_unlock(&desc->lock);
- }
- }
- }
}
static struct syscore_ops eiointc_syscore_ops = {
--
2.39.3
There is small typo in function eiointc_domain_alloc, and there is no
definition about struct eiointc, instead it should be struct eiointc_priv.
It is strange that there is no warning with gcc compiler. This patch
fixes the typo issue.
Signed-off-by: Bibo Mao <[email protected]>
Acked-by: Huacai Chen <[email protected]>
---
drivers/irqchip/irq-loongson-eiointc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/irqchip/irq-loongson-eiointc.c b/drivers/irqchip/irq-loongson-eiointc.c
index 1623cd779175..b3736bdd4b9f 100644
--- a/drivers/irqchip/irq-loongson-eiointc.c
+++ b/drivers/irqchip/irq-loongson-eiointc.c
@@ -241,7 +241,7 @@ static int eiointc_domain_alloc(struct irq_domain *domain, unsigned int virq,
int ret;
unsigned int i, type;
unsigned long hwirq = 0;
- struct eiointc *priv = domain->host_data;
+ struct eiointc_priv *priv = domain->host_data;
ret = irq_domain_translate_onecell(domain, arg, &hwirq, &type);
if (ret)
--
2.39.3
Hi, Bibo,
We usually use eiointc_domain_alloc() rather than eiointc_domain_alloc
to describe a function, but it is not a big issue. If you will update
a new version you can modify this.
Huacai
On Thu, Jan 25, 2024 at 7:36 PM Bibo Mao <[email protected]> wrote:
>
> There is small typo in function eiointc_domain_alloc, and there is no
> definition about struct eiointc, instead it should be struct eiointc_priv.
> It is strange that there is no warning with gcc compiler. This patch
> fixes the typo issue.
>
> Signed-off-by: Bibo Mao <[email protected]>
> Acked-by: Huacai Chen <[email protected]>
> ---
> drivers/irqchip/irq-loongson-eiointc.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/irqchip/irq-loongson-eiointc.c b/drivers/irqchip/irq-loongson-eiointc.c
> index 1623cd779175..b3736bdd4b9f 100644
> --- a/drivers/irqchip/irq-loongson-eiointc.c
> +++ b/drivers/irqchip/irq-loongson-eiointc.c
> @@ -241,7 +241,7 @@ static int eiointc_domain_alloc(struct irq_domain *domain, unsigned int virq,
> int ret;
> unsigned int i, type;
> unsigned long hwirq = 0;
> - struct eiointc *priv = domain->host_data;
> + struct eiointc_priv *priv = domain->host_data;
>
> ret = irq_domain_translate_onecell(domain, arg, &hwirq, &type);
> if (ret)
> --
> 2.39.3
>
Hi, Bibo,
As commented in another patch, you can use eiointc_irq_dispatch(),
iocsr_read64() to describe functions, and it is better to use
Loongson-3A5000, Loongson-2K2000, Loongson-2K0500 rather than 3A5000,
2K2000, 2K0500. Besides, please always use IRQs rather than IRQS.
With these modifications,
Acked-by: Huacai Chen <[email protected]>
On Thu, Jan 25, 2024 at 7:36 PM Bibo Mao <[email protected]> wrote:
>
> It is one simple optimization in the interrupt dispatch function
> eiointc_irq_dispatch. There are 256 IRQs supported for eiointc on
> 3A5000 and 2K2000 platform, 128 IRQS on 2K0500 platform, eiointc irq
> handler reads the bitmap and find pending irqs when irq happens. So
> there are several consecutive iocsr_read64 operations for the all
> bits to find all pending irqs. If the pending bitmap is zero, it
> means that there is no pending irq for the this irq bitmap range,
> we can skip handling to avoid some useless operations such as
> clearing hw ISR.
>
> Signed-off-by: Bibo Mao <[email protected]>
> ---
> drivers/irqchip/irq-loongson-eiointc.c | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/drivers/irqchip/irq-loongson-eiointc.c b/drivers/irqchip/irq-loongson-eiointc.c
> index b3736bdd4b9f..6a71a8c29ac7 100644
> --- a/drivers/irqchip/irq-loongson-eiointc.c
> +++ b/drivers/irqchip/irq-loongson-eiointc.c
> @@ -198,6 +198,12 @@ static void eiointc_irq_dispatch(struct irq_desc *desc)
>
> for (i = 0; i < eiointc_priv[0]->vec_count / VEC_COUNT_PER_REG; i++) {
> pending = iocsr_read64(EIOINTC_REG_ISR + (i << 3));
> +
> + /* Skip handling if pending bitmap is zero */
> + if (!pending)
> + continue;
> +
> + /* Clear the IRQs */
> iocsr_write64(pending, EIOINTC_REG_ISR + (i << 3));
> while (pending) {
> int bit = __ffs(pending);
> --
> 2.39.3
>
On 2024/1/29 下午8:23, Huacai Chen wrote:
> Hi, Bibo,
>
> We usually use eiointc_domain_alloc() rather than eiointc_domain_alloc
> to describe a function, but it is not a big issue. If you will update
> a new version you can modify this.
sure, will do.
Regards
Bibo Mao
>
> Huacai
>
> On Thu, Jan 25, 2024 at 7:36 PM Bibo Mao <[email protected]> wrote:
>>
>> There is small typo in function eiointc_domain_alloc, and there is no
>> definition about struct eiointc, instead it should be struct eiointc_priv.
>> It is strange that there is no warning with gcc compiler. This patch
>> fixes the typo issue.
>>
>> Signed-off-by: Bibo Mao <[email protected]>
>> Acked-by: Huacai Chen <[email protected]>
>> ---
>> drivers/irqchip/irq-loongson-eiointc.c | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/irqchip/irq-loongson-eiointc.c b/drivers/irqchip/irq-loongson-eiointc.c
>> index 1623cd779175..b3736bdd4b9f 100644
>> --- a/drivers/irqchip/irq-loongson-eiointc.c
>> +++ b/drivers/irqchip/irq-loongson-eiointc.c
>> @@ -241,7 +241,7 @@ static int eiointc_domain_alloc(struct irq_domain *domain, unsigned int virq,
>> int ret;
>> unsigned int i, type;
>> unsigned long hwirq = 0;
>> - struct eiointc *priv = domain->host_data;
>> + struct eiointc_priv *priv = domain->host_data;
>>
>> ret = irq_domain_translate_onecell(domain, arg, &hwirq, &type);
>> if (ret)
>> --
>> 2.39.3
>>
On 2024/1/29 下午8:27, Huacai Chen wrote:
> Hi, Bibo,
>
> As commented in another patch, you can use eiointc_irq_dispatch(),
> iocsr_read64() to describe functions, and it is better to use
> Loongson-3A5000, Loongson-2K2000, Loongson-2K0500 rather than 3A5000,
> 2K2000, 2K0500. Besides, please always use IRQs rather than IRQS.
Huacai,
Thanks for reviewing.
Will do in next patch.
Regards
Bibo Mao
>
> With these modifications,
>
> Acked-by: Huacai Chen <[email protected]>
>
> On Thu, Jan 25, 2024 at 7:36 PM Bibo Mao <[email protected]> wrote:
>>
>> It is one simple optimization in the interrupt dispatch function
>> eiointc_irq_dispatch. There are 256 IRQs supported for eiointc on
>> 3A5000 and 2K2000 platform, 128 IRQS on 2K0500 platform, eiointc irq
>> handler reads the bitmap and find pending irqs when irq happens. So
>> there are several consecutive iocsr_read64 operations for the all
>> bits to find all pending irqs. If the pending bitmap is zero, it
>> means that there is no pending irq for the this irq bitmap range,
>> we can skip handling to avoid some useless operations such as
>> clearing hw ISR.
>>
>> Signed-off-by: Bibo Mao <[email protected]>
>> ---
>> drivers/irqchip/irq-loongson-eiointc.c | 6 ++++++
>> 1 file changed, 6 insertions(+)
>>
>> diff --git a/drivers/irqchip/irq-loongson-eiointc.c b/drivers/irqchip/irq-loongson-eiointc.c
>> index b3736bdd4b9f..6a71a8c29ac7 100644
>> --- a/drivers/irqchip/irq-loongson-eiointc.c
>> +++ b/drivers/irqchip/irq-loongson-eiointc.c
>> @@ -198,6 +198,12 @@ static void eiointc_irq_dispatch(struct irq_desc *desc)
>>
>> for (i = 0; i < eiointc_priv[0]->vec_count / VEC_COUNT_PER_REG; i++) {
>> pending = iocsr_read64(EIOINTC_REG_ISR + (i << 3));
>> +
>> + /* Skip handling if pending bitmap is zero */
>> + if (!pending)
>> + continue;
>> +
>> + /* Clear the IRQs */
>> iocsr_write64(pending, EIOINTC_REG_ISR + (i << 3));
>> while (pending) {
>> int bit = __ffs(pending);
>> --
>> 2.39.3
>>