There is a special case for validate_events() where we'll call
x86_pmu.get_constraints(.idx=-1). It's purpose, up until recent, seems
to be to avoid taking a previous constraint from
cpuc->event_constraint[] in intel_get_event_constraints().
(I could not find any other get_event_constraints() implementation
using @idx)
However, since that cpuc is freshly allocated, that array will in fact
be initialized with NULL pointers, achieving the very same effect.
Therefore remove this exception.
Signed-off-by: Peter Zijlstra (Intel) <[email protected]>
---
arch/x86/events/core.c | 2 +-
arch/x86/events/intel/core.c | 8 +++-----
2 files changed, 4 insertions(+), 6 deletions(-)
--- a/arch/x86/events/core.c
+++ b/arch/x86/events/core.c
@@ -2031,7 +2031,7 @@ static int validate_event(struct perf_ev
if (IS_ERR(fake_cpuc))
return PTR_ERR(fake_cpuc);
- c = x86_pmu.get_event_constraints(fake_cpuc, -1, event);
+ c = x86_pmu.get_event_constraints(fake_cpuc, 0, event);
if (!c || !c->weight)
ret = -EINVAL;
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -2931,11 +2931,9 @@ static struct event_constraint *
intel_get_event_constraints(struct cpu_hw_events *cpuc, int idx,
struct perf_event *event)
{
- struct event_constraint *c1 = NULL;
- struct event_constraint *c2;
+ struct event_constraint *c1, *c2;
- if (idx >= 0) /* fake does < 0 */
- c1 = cpuc->event_constraint[idx];
+ c1 = cpuc->event_constraint[idx];
/*
* first time only
@@ -3410,7 +3408,7 @@ tfa_get_event_constraints(struct cpu_hw_
/*
* Without TFA we must not use PMC3.
*/
- if (!allow_tsx_force_abort && test_bit(3, c->idxmsk) && idx >= 0) {
+ if (!allow_tsx_force_abort && test_bit(3, c->idxmsk)) {
c = dyn_constraint(cpuc, c, idx);
c->idxmsk64 &= ~(1ULL << 3);
c->weight--;
On Thu, Mar 14, 2019 at 6:11 AM Peter Zijlstra <[email protected]> wrote:
>
> There is a special case for validate_events() where we'll call
> x86_pmu.get_constraints(.idx=-1). It's purpose, up until recent, seems
> to be to avoid taking a previous constraint from
> cpuc->event_constraint[] in intel_get_event_constraints().
>
> (I could not find any other get_event_constraints() implementation
> using @idx)
>
> However, since that cpuc is freshly allocated, that array will in fact
> be initialized with NULL pointers, achieving the very same effect.
>
> Therefore remove this exception.
>
> Signed-off-by: Peter Zijlstra (Intel) <[email protected]>
Looks good to me.
Reviewed-by: Stephane Eranian <[email protected]>
> ---
> arch/x86/events/core.c | 2 +-
> arch/x86/events/intel/core.c | 8 +++-----
> 2 files changed, 4 insertions(+), 6 deletions(-)
>
> --- a/arch/x86/events/core.c
> +++ b/arch/x86/events/core.c
> @@ -2031,7 +2031,7 @@ static int validate_event(struct perf_ev
> if (IS_ERR(fake_cpuc))
> return PTR_ERR(fake_cpuc);
>
> - c = x86_pmu.get_event_constraints(fake_cpuc, -1, event);
> + c = x86_pmu.get_event_constraints(fake_cpuc, 0, event);
>
> if (!c || !c->weight)
> ret = -EINVAL;
> --- a/arch/x86/events/intel/core.c
> +++ b/arch/x86/events/intel/core.c
> @@ -2931,11 +2931,9 @@ static struct event_constraint *
> intel_get_event_constraints(struct cpu_hw_events *cpuc, int idx,
> struct perf_event *event)
> {
> - struct event_constraint *c1 = NULL;
> - struct event_constraint *c2;
> + struct event_constraint *c1, *c2;
>
> - if (idx >= 0) /* fake does < 0 */
> - c1 = cpuc->event_constraint[idx];
> + c1 = cpuc->event_constraint[idx];
>
> /*
> * first time only
> @@ -3410,7 +3408,7 @@ tfa_get_event_constraints(struct cpu_hw_
> /*
> * Without TFA we must not use PMC3.
> */
> - if (!allow_tsx_force_abort && test_bit(3, c->idxmsk) && idx >= 0) {
> + if (!allow_tsx_force_abort && test_bit(3, c->idxmsk)) {
> c = dyn_constraint(cpuc, c, idx);
> c->idxmsk64 &= ~(1ULL << 3);
> c->weight--;
>
>