2022-03-02 02:43:26

by Peng Fan (OSS)

[permalink] [raw]
Subject: [PATCH V6 0/5] mailbox: imx: support i.MX93

From: Peng Fan <[email protected]>

V6:
Follow Rob's suggestion for patch 2/5 and add his R-b

V5:
Per Rob's comments to patch 2/5, add minItems/maxItems for interrupts,
Use minItems for imx93-mu-s4 interrupts

V4:
Add A-b for 1/5
Address Rob's comments in 2/5, passed dt_binding_check and dtbs_check
Use tx/rx instead txirq/rxirq in 4/5

V3:
Add R-b for 1/5 2/5
Split V2 patch 4/4 into two patch 4/5, patch 5/5

V2:
Fix dt bindings in patch 1/4 2/4
Squash author/copyright patch into patch 4/4

Based on: https://lkml.org/lkml/2022/2/6/304
Add i.MX93 Generic MU and S4 MU support
i.MX93 S4 MU has some changes compared with i.MX8ULP S4 MU, it
has two interrupts, tx/rx, so also update dt binding doc.

Peng Fan (5):
dt-bindings: mailbox: imx-mu: add i.MX93 MU
dt-bindings: mailbox: imx-mu: add i.MX93 S4 MU support
mailbox: imx: extend irq to an array
mailbox: imx: support dual interrupts
mailbox: imx: support i.MX93 S401 MU

.../devicetree/bindings/mailbox/fsl,mu.yaml | 34 +++++++++++-
drivers/mailbox/imx-mailbox.c | 53 +++++++++++++++----
2 files changed, 75 insertions(+), 12 deletions(-)

--
2.25.1


2022-03-02 04:37:11

by Peng Fan (OSS)

[permalink] [raw]
Subject: [PATCH V6 5/5] mailbox: imx: support i.MX93 S401 MU

From: Peng Fan <[email protected]>

Add i.MX93 S401 MU cfg

Signed-off-by: Peng Fan <[email protected]>
---
drivers/mailbox/imx-mailbox.c | 12 ++++++++++++
1 file changed, 12 insertions(+)

diff --git a/drivers/mailbox/imx-mailbox.c b/drivers/mailbox/imx-mailbox.c
index 4bc59a6cad20..dcbf554aa96a 100644
--- a/drivers/mailbox/imx-mailbox.c
+++ b/drivers/mailbox/imx-mailbox.c
@@ -908,6 +908,17 @@ static const struct imx_mu_dcfg imx_mu_cfg_imx8ulp_s4 = {
.xCR = {0x110, 0x114, 0x120, 0x128},
};

+static const struct imx_mu_dcfg imx_mu_cfg_imx93_s4 = {
+ .tx = imx_mu_specific_tx,
+ .rx = imx_mu_specific_rx,
+ .init = imx_mu_init_specific,
+ .type = IMX_MU_V2 | IMX_MU_V2_S4 | IMX_MU_V2_IRQ,
+ .xTR = 0x200,
+ .xRR = 0x280,
+ .xSR = {0xC, 0x118, 0x124, 0x12C},
+ .xCR = {0x110, 0x114, 0x120, 0x128},
+};
+
static const struct imx_mu_dcfg imx_mu_cfg_imx8_scu = {
.tx = imx_mu_specific_tx,
.rx = imx_mu_specific_rx,
@@ -935,6 +946,7 @@ static const struct of_device_id imx_mu_dt_ids[] = {
{ .compatible = "fsl,imx6sx-mu", .data = &imx_mu_cfg_imx6sx },
{ .compatible = "fsl,imx8ulp-mu", .data = &imx_mu_cfg_imx8ulp },
{ .compatible = "fsl,imx8ulp-mu-s4", .data = &imx_mu_cfg_imx8ulp_s4 },
+ { .compatible = "fsl,imx93-mu-s4", .data = &imx_mu_cfg_imx93_s4 },
{ .compatible = "fsl,imx8-mu-scu", .data = &imx_mu_cfg_imx8_scu },
{ .compatible = "fsl,imx8-mu-seco", .data = &imx_mu_cfg_imx8_seco },
{ },
--
2.25.1

2022-03-02 07:32:53

by Peng Fan (OSS)

[permalink] [raw]
Subject: [PATCH V6 4/5] mailbox: imx: support dual interrupts

From: Peng Fan <[email protected]>

i.MX93 S401 MU support two interrupts: tx empty and rx full.

- Introduce a new flag IMX_MU_V2_IRQ for the dual interrupt case
- Update author and Copyright

Signed-off-by: Peng Fan <[email protected]>
---
drivers/mailbox/imx-mailbox.c | 37 ++++++++++++++++++++++++++---------
1 file changed, 28 insertions(+), 9 deletions(-)

diff --git a/drivers/mailbox/imx-mailbox.c b/drivers/mailbox/imx-mailbox.c
index 03699843a6fd..4bc59a6cad20 100644
--- a/drivers/mailbox/imx-mailbox.c
+++ b/drivers/mailbox/imx-mailbox.c
@@ -1,6 +1,7 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (c) 2018 Pengutronix, Oleksij Rempel <[email protected]>
+ * Copyright 2022 NXP, Peng Fan <[email protected]>
*/

#include <linux/clk.h>
@@ -28,6 +29,7 @@
#define IMX_MU_SECO_TX_TOUT (msecs_to_jiffies(3000))
#define IMX_MU_SECO_RX_TOUT (msecs_to_jiffies(3000))

+/* Please not change TX & RX */
enum imx_mu_chan_type {
IMX_MU_TYPE_TX, /* Tx */
IMX_MU_TYPE_RX, /* Rx */
@@ -92,6 +94,7 @@ enum imx_mu_type {
IMX_MU_V1,
IMX_MU_V2 = BIT(1),
IMX_MU_V2_S4 = BIT(15),
+ IMX_MU_V2_IRQ = BIT(16),
};

struct imx_mu_dcfg {
@@ -536,7 +539,8 @@ static int imx_mu_startup(struct mbox_chan *chan)
{
struct imx_mu_priv *priv = to_imx_mu_priv(chan->mbox);
struct imx_mu_con_priv *cp = chan->con_priv;
- unsigned long irq_flag = IRQF_SHARED;
+ unsigned long irq_flag = 0;
+ int irq;
int ret;

pm_runtime_get_sync(priv->dev);
@@ -551,11 +555,16 @@ static int imx_mu_startup(struct mbox_chan *chan)
if (!priv->dev->pm_domain)
irq_flag |= IRQF_NO_SUSPEND;

- ret = request_irq(priv->irq[0], imx_mu_isr, irq_flag,
- cp->irq_desc, chan);
+ if (priv->dcfg->type & IMX_MU_V2_IRQ) {
+ irq = priv->irq[cp->type];
+ } else {
+ irq = priv->irq[0];
+ irq_flag |= IRQF_SHARED;
+ }
+
+ ret = request_irq(irq, imx_mu_isr, irq_flag, cp->irq_desc, chan);
if (ret) {
- dev_err(priv->dev,
- "Unable to acquire IRQ %d\n", priv->irq[0]);
+ dev_err(priv->dev, "Unable to acquire IRQ %d\n", irq);
return ret;
}

@@ -762,14 +771,23 @@ static int imx_mu_probe(struct platform_device *pdev)
if (IS_ERR(priv->base))
return PTR_ERR(priv->base);

- priv->irq[0] = platform_get_irq(pdev, 0);
- if (priv->irq[0] < 0)
- return priv->irq[0];
-
dcfg = of_device_get_match_data(dev);
if (!dcfg)
return -EINVAL;
priv->dcfg = dcfg;
+ if (priv->dcfg->type & IMX_MU_V2_IRQ) {
+ priv->irq[IMX_MU_TYPE_TX] = platform_get_irq_byname(pdev, "tx");
+ if (priv->irq[IMX_MU_TYPE_TX] < 0)
+ return priv->irq[IMX_MU_TYPE_TX];
+ priv->irq[IMX_MU_TYPE_RX] = platform_get_irq_byname(pdev, "rx");
+ if (priv->irq[IMX_MU_TYPE_RX] < 0)
+ return priv->irq[IMX_MU_TYPE_RX];
+ } else {
+ priv->irq[0] = platform_get_irq(pdev, 0);
+ if (priv->irq[0] < 0)
+ return priv->irq[0];
+
+ }

if (priv->dcfg->type & IMX_MU_V2_S4)
size = sizeof(struct imx_s4_rpc_msg_max);
@@ -1001,5 +1019,6 @@ static struct platform_driver imx_mu_driver = {
module_platform_driver(imx_mu_driver);

MODULE_AUTHOR("Oleksij Rempel <[email protected]>");
+MODULE_AUTHOR("Peng Fan <[email protected]>");
MODULE_DESCRIPTION("Message Unit driver for i.MX");
MODULE_LICENSE("GPL v2");
--
2.25.1

2022-03-02 09:29:57

by Peng Fan (OSS)

[permalink] [raw]
Subject: [PATCH V6 2/5] dt-bindings: mailbox: imx-mu: add i.MX93 S4 MU support

From: Peng Fan <[email protected]>

Similar to i.MX8ULP S4 MU, i.MX93 MU is dedicated for communication
between Sentinel and Cortex-A cores from hardware design, it could not be
reused for other purpose.

However i.MX93 S4 MU use separate tx/rx interrupt, so update
interrupts and add interrupt-names property.

Reviewed-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
---
.../devicetree/bindings/mailbox/fsl,mu.yaml | 31 ++++++++++++++++++-
1 file changed, 30 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml b/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml
index 6d056d5e16bf..7a86e7926dd2 100644
--- a/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml
+++ b/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml
@@ -29,6 +29,7 @@ properties:
- const: fsl,imx8ulp-mu
- const: fsl,imx8-mu-scu
- const: fsl,imx8-mu-seco
+ - const: fsl,imx93-mu-s4
- const: fsl,imx8ulp-mu-s4
- items:
- const: fsl,imx93-mu
@@ -55,7 +56,14 @@ properties:
maxItems: 1

interrupts:
- maxItems: 1
+ minItems: 1
+ maxItems: 2
+
+ interrupt-names:
+ minItems: 1
+ items:
+ - const: tx
+ - const: rx

"#mbox-cells":
description: |
@@ -90,6 +98,27 @@ required:
- interrupts
- "#mbox-cells"

+allOf:
+ - if:
+ properties:
+ compatible:
+ enum:
+ - fsl,imx93-mu-s4
+ then:
+ properties:
+ interrupt-names:
+ minItems: 2
+ interrupts:
+ minItems: 2
+
+ else:
+ properties:
+ interrupts:
+ maxItems: 1
+ not:
+ required:
+ - interrupt-names
+
additionalProperties: false

examples:
--
2.25.1

2022-03-02 10:13:34

by Peng Fan (OSS)

[permalink] [raw]
Subject: [PATCH V6 3/5] mailbox: imx: extend irq to an array

From: Peng Fan <[email protected]>

To i.MX93 S401 MU, there are two interrupts: rx full and tx empty.
So extend irq to an array to prepare i.MX93 S401 MU support.

Signed-off-by: Peng Fan <[email protected]>
---
drivers/mailbox/imx-mailbox.c | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/drivers/mailbox/imx-mailbox.c b/drivers/mailbox/imx-mailbox.c
index cd011ca5707e..03699843a6fd 100644
--- a/drivers/mailbox/imx-mailbox.c
+++ b/drivers/mailbox/imx-mailbox.c
@@ -80,7 +80,7 @@ struct imx_mu_priv {
struct imx_mu_con_priv con_priv[IMX_MU_CHANS];
const struct imx_mu_dcfg *dcfg;
struct clk *clk;
- int irq;
+ int irq[IMX_MU_CHANS];
bool suspend;

u32 xcr[4];
@@ -551,11 +551,11 @@ static int imx_mu_startup(struct mbox_chan *chan)
if (!priv->dev->pm_domain)
irq_flag |= IRQF_NO_SUSPEND;

- ret = request_irq(priv->irq, imx_mu_isr, irq_flag,
+ ret = request_irq(priv->irq[0], imx_mu_isr, irq_flag,
cp->irq_desc, chan);
if (ret) {
dev_err(priv->dev,
- "Unable to acquire IRQ %d\n", priv->irq);
+ "Unable to acquire IRQ %d\n", priv->irq[0]);
return ret;
}

@@ -598,7 +598,7 @@ static void imx_mu_shutdown(struct mbox_chan *chan)
break;
}

- free_irq(priv->irq, chan);
+ free_irq(priv->irq[0], chan);
pm_runtime_put_sync(priv->dev);
}

@@ -762,9 +762,9 @@ static int imx_mu_probe(struct platform_device *pdev)
if (IS_ERR(priv->base))
return PTR_ERR(priv->base);

- priv->irq = platform_get_irq(pdev, 0);
- if (priv->irq < 0)
- return priv->irq;
+ priv->irq[0] = platform_get_irq(pdev, 0);
+ if (priv->irq[0] < 0)
+ return priv->irq[0];

dcfg = of_device_get_match_data(dev);
if (!dcfg)
--
2.25.1

2022-03-02 15:00:35

by Peng Fan (OSS)

[permalink] [raw]
Subject: [PATCH V6 1/5] dt-bindings: mailbox: imx-mu: add i.MX93 MU

From: Peng Fan <[email protected]>

Add bindings for i.MX93 MU which derived from i.MX8ULP

Reviewed-by: Krzysztof Kozlowski <[email protected]>
Acked-by: Rob Herring <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
---
Documentation/devicetree/bindings/mailbox/fsl,mu.yaml | 3 +++
1 file changed, 3 insertions(+)

diff --git a/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml b/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml
index f865b806ae6a..6d056d5e16bf 100644
--- a/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml
+++ b/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml
@@ -30,6 +30,9 @@ properties:
- const: fsl,imx8-mu-scu
- const: fsl,imx8-mu-seco
- const: fsl,imx8ulp-mu-s4
+ - items:
+ - const: fsl,imx93-mu
+ - const: fsl,imx8ulp-mu
- items:
- enum:
- fsl,imx7s-mu
--
2.25.1

2022-03-08 11:50:18

by Jassi Brar

[permalink] [raw]
Subject: Re: [PATCH V6 4/5] mailbox: imx: support dual interrupts

Hi,

On Tue, Mar 1, 2022 at 8:23 PM Peng Fan (OSS) <[email protected]> wrote:
>
> From: Peng Fan <[email protected]>
>
> i.MX93 S401 MU support two interrupts: tx empty and rx full.
>
> - Introduce a new flag IMX_MU_V2_IRQ for the dual interrupt case
> - Update author and Copyright
>
Copyright update is fair.
However, I am not sure adding an extra interrupt warrants
co-authorship, otherwise people submit far bigger changes to drivers.
And you didn't even CC the original author Oleksij Rempel. At least
please seek his ACK.

> diff --git a/drivers/mailbox/imx-mailbox.c b/drivers/mailbox/imx-mailbox.c
> index 03699843a6fd..4bc59a6cad20 100644
> --- a/drivers/mailbox/imx-mailbox.c
> +++ b/drivers/mailbox/imx-mailbox.c
....
>
> +/* Please not change TX & RX */
> enum imx_mu_chan_type {
> IMX_MU_TYPE_TX, /* Tx */
> IMX_MU_TYPE_RX, /* Rx */
>
You want to hard-code the values to make it clearer
IMX_MU_TYPE_TX = 0,
IMX_MU_TYPE_RX = 1,


> @@ -536,7 +539,8 @@ static int imx_mu_startup(struct mbox_chan *chan)
> {
> struct imx_mu_priv *priv = to_imx_mu_priv(chan->mbox);
> struct imx_mu_con_priv *cp = chan->con_priv;
> - unsigned long irq_flag = IRQF_SHARED;
> + unsigned long irq_flag = 0;
> + int irq;
> int ret;
>
> pm_runtime_get_sync(priv->dev);
> @@ -551,11 +555,16 @@ static int imx_mu_startup(struct mbox_chan *chan)
> if (!priv->dev->pm_domain)
> irq_flag |= IRQF_NO_SUSPEND;
>
> - ret = request_irq(priv->irq[0], imx_mu_isr, irq_flag,
> - cp->irq_desc, chan);
> + if (priv->dcfg->type & IMX_MU_V2_IRQ) {
> + irq = priv->irq[cp->type];
> + } else {
> + irq = priv->irq[0];
>
Please use some verbose define instead of the magic 0.

Thanks.

2022-03-08 17:18:55

by Peng Fan

[permalink] [raw]
Subject: RE: [PATCH V6 4/5] mailbox: imx: support dual interrupts

> Subject: Re: [PATCH V6 4/5] mailbox: imx: support dual interrupts
>
> Hi,
>
> On Tue, Mar 1, 2022 at 8:23 PM Peng Fan (OSS) <[email protected]>
> wrote:
> >
> > From: Peng Fan <[email protected]>
> >
> > i.MX93 S401 MU support two interrupts: tx empty and rx full.
> >
> > - Introduce a new flag IMX_MU_V2_IRQ for the dual interrupt case
> > - Update author and Copyright
> >
> Copyright update is fair.
> However, I am not sure adding an extra interrupt warrants co-authorship,
> otherwise people submit far bigger changes to drivers.

I just thought I did lots of changes to this driver and just add my authorship
here. That's fine, I'll drop.

> And you didn't even CC the original author Oleksij Rempel. At least please
> seek his ACK.

I just use scripts/get_maintainers script, will add Oleksij.

>
> > diff --git a/drivers/mailbox/imx-mailbox.c
> > b/drivers/mailbox/imx-mailbox.c index 03699843a6fd..4bc59a6cad20
> > 100644
> > --- a/drivers/mailbox/imx-mailbox.c
> > +++ b/drivers/mailbox/imx-mailbox.c
> ....
> >
> > +/* Please not change TX & RX */
> > enum imx_mu_chan_type {
> > IMX_MU_TYPE_TX, /* Tx */
> > IMX_MU_TYPE_RX, /* Rx */
> >
> You want to hard-code the values to make it clearer
> IMX_MU_TYPE_TX = 0,
> IMX_MU_TYPE_RX = 1,
>
>
> > @@ -536,7 +539,8 @@ static int imx_mu_startup(struct mbox_chan *chan)
> > {
> > struct imx_mu_priv *priv = to_imx_mu_priv(chan->mbox);
> > struct imx_mu_con_priv *cp = chan->con_priv;
> > - unsigned long irq_flag = IRQF_SHARED;
> > + unsigned long irq_flag = 0;
> > + int irq;
> > int ret;
> >
> > pm_runtime_get_sync(priv->dev); @@ -551,11 +555,16 @@
> static
> > int imx_mu_startup(struct mbox_chan *chan)
> > if (!priv->dev->pm_domain)
> > irq_flag |= IRQF_NO_SUSPEND;
> >
> > - ret = request_irq(priv->irq[0], imx_mu_isr, irq_flag,
> > - cp->irq_desc, chan);
> > + if (priv->dcfg->type & IMX_MU_V2_IRQ) {
> > + irq = priv->irq[cp->type];
> > + } else {
> > + irq = priv->irq[0];
> >
> Please use some verbose define instead of the magic 0.

Fix in V7.

Thanks,
Peng.

>
> Thanks.