2020-12-01 22:42:01

by mark gross

[permalink] [raw]
Subject: [PATCH 02/22] dt-bindings: Add bindings for Keem Bay IPC driver

From: Daniele Alessandrelli <[email protected]>

Add DT binding documentation for the Intel Keem Bay IPC driver, which
enables communication between the Computing Sub-System (CSS) and the
Multimedia Sub-System (MSS) of the Intel Movidius SoC code named Keem
Bay.

Cc: [email protected]
Reviewed-by: Mark Gross <[email protected]>
Signed-off-by: Daniele Alessandrelli <[email protected]>
---
.../bindings/soc/intel/intel,keembay-ipc.yaml | 63 +++++++++++++++++++
1 file changed, 63 insertions(+)
create mode 100644 Documentation/devicetree/bindings/soc/intel/intel,keembay-ipc.yaml

diff --git a/Documentation/devicetree/bindings/soc/intel/intel,keembay-ipc.yaml b/Documentation/devicetree/bindings/soc/intel/intel,keembay-ipc.yaml
new file mode 100644
index 000000000000..6e21c54d8f34
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/intel/intel,keembay-ipc.yaml
@@ -0,0 +1,63 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+# Copyright (C) 2020 Intel Corporation
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/soc/intel/intel,keembay-ipc.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: Keem Bay IPC
+
+maintainers:
+ - Daniele Alessandrelli <[email protected]>
+
+description:
+ The Keem Bay IPC driver enables Inter-Processor Communication (IPC) with the
+ Visual Processor Unit (VPU) embedded in the Intel Movidius SoC code named
+ Keem Bay.
+
+properties:
+ compatible:
+ const: intel,keembay-ipc
+
+ reg:
+ items:
+ - description: The CSS (CPU) FIFO registers
+ - description: The MSS (VPU) FIFO registers
+
+ reg-names:
+ items:
+ - const: css_fifo
+ - const: mss_fifo
+
+ interrupts:
+ items:
+ - description: CSS FIFO not-empty interrupt
+
+ interrupt-controller: true
+
+ memory-region:
+ items:
+ - description: Reserved memory region used for CSS IPC buffers
+ - description: Reserved memory region used for MSS IPC buffers
+
+required:
+ - compatible
+ - reg
+ - reg-names
+ - interrupts
+ - memory-region
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/irq.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ ipc@203300f0 {
+ compatible = "intel,keembay-ipc";
+ reg = <0x203300f0 0x310>, /* CPU TIM FIFO */
+ <0x208200f0 0x310>; /* VPU TIM FIFO */
+ reg-names = "css_fifo", "mss_fifo";
+ interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
+ memory-region = <&css_ipc_reserved>, <&mss_ipc_reserved>;
+ };
--
2.17.1


2020-12-07 16:04:37

by Rob Herring

[permalink] [raw]
Subject: Re: [PATCH 02/22] dt-bindings: Add bindings for Keem Bay IPC driver

On Tue, Dec 01, 2020 at 02:34:51PM -0800, [email protected] wrote:
> From: Daniele Alessandrelli <[email protected]>
>
> Add DT binding documentation for the Intel Keem Bay IPC driver, which
> enables communication between the Computing Sub-System (CSS) and the
> Multimedia Sub-System (MSS) of the Intel Movidius SoC code named Keem
> Bay.
>
> Cc: [email protected]
> Reviewed-by: Mark Gross <[email protected]>
> Signed-off-by: Daniele Alessandrelli <[email protected]>
> ---
> .../bindings/soc/intel/intel,keembay-ipc.yaml | 63 +++++++++++++++++++
> 1 file changed, 63 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/soc/intel/intel,keembay-ipc.yaml
>
> diff --git a/Documentation/devicetree/bindings/soc/intel/intel,keembay-ipc.yaml b/Documentation/devicetree/bindings/soc/intel/intel,keembay-ipc.yaml
> new file mode 100644
> index 000000000000..6e21c54d8f34
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/soc/intel/intel,keembay-ipc.yaml
> @@ -0,0 +1,63 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +# Copyright (C) 2020 Intel Corporation
> +%YAML 1.2
> +---
> +$id: "http://devicetree.org/schemas/soc/intel/intel,keembay-ipc.yaml#"
> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
> +
> +title: Keem Bay IPC
> +
> +maintainers:
> + - Daniele Alessandrelli <[email protected]>
> +
> +description:
> + The Keem Bay IPC driver enables Inter-Processor Communication (IPC) with the
> + Visual Processor Unit (VPU) embedded in the Intel Movidius SoC code named
> + Keem Bay.

Sounds like a mailbox.

What's the relationship between this and the xlink thing?

> +
> +properties:
> + compatible:
> + const: intel,keembay-ipc
> +
> + reg:
> + items:
> + - description: The CSS (CPU) FIFO registers
> + - description: The MSS (VPU) FIFO registers
> +
> + reg-names:
> + items:
> + - const: css_fifo
> + - const: mss_fifo
> +
> + interrupts:
> + items:
> + - description: CSS FIFO not-empty interrupt
> +
> + interrupt-controller: true
> +
> + memory-region:
> + items:
> + - description: Reserved memory region used for CSS IPC buffers
> + - description: Reserved memory region used for MSS IPC buffers
> +
> +required:
> + - compatible
> + - reg
> + - reg-names
> + - interrupts
> + - memory-region
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/interrupt-controller/irq.h>
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + ipc@203300f0 {
> + compatible = "intel,keembay-ipc";
> + reg = <0x203300f0 0x310>, /* CPU TIM FIFO */
> + <0x208200f0 0x310>; /* VPU TIM FIFO */
> + reg-names = "css_fifo", "mss_fifo";
> + interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
> + memory-region = <&css_ipc_reserved>, <&mss_ipc_reserved>;
> + };
> --
> 2.17.1
>

2020-12-07 18:27:29

by mark gross

[permalink] [raw]
Subject: Re: [PATCH 02/22] dt-bindings: Add bindings for Keem Bay IPC driver

On Mon, Dec 07, 2020 at 10:01:52AM -0600, Rob Herring wrote:
> On Tue, Dec 01, 2020 at 02:34:51PM -0800, [email protected] wrote:
> > From: Daniele Alessandrelli <[email protected]>
> >
> > Add DT binding documentation for the Intel Keem Bay IPC driver, which
> > enables communication between the Computing Sub-System (CSS) and the
> > Multimedia Sub-System (MSS) of the Intel Movidius SoC code named Keem
> > Bay.
> >
> > Cc: [email protected]
> > Reviewed-by: Mark Gross <[email protected]>
> > Signed-off-by: Daniele Alessandrelli <[email protected]>
> > ---
> > .../bindings/soc/intel/intel,keembay-ipc.yaml | 63 +++++++++++++++++++
> > 1 file changed, 63 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/soc/intel/intel,keembay-ipc.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/soc/intel/intel,keembay-ipc.yaml b/Documentation/devicetree/bindings/soc/intel/intel,keembay-ipc.yaml
> > new file mode 100644
> > index 000000000000..6e21c54d8f34
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/soc/intel/intel,keembay-ipc.yaml
> > @@ -0,0 +1,63 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +# Copyright (C) 2020 Intel Corporation
> > +%YAML 1.2
> > +---
> > +$id: "http://devicetree.org/schemas/soc/intel/intel,keembay-ipc.yaml#"
> > +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
> > +
> > +title: Keem Bay IPC
> > +
> > +maintainers:
> > + - Daniele Alessandrelli <[email protected]>
> > +
> > +description:
> > + The Keem Bay IPC driver enables Inter-Processor Communication (IPC) with the
> > + Visual Processor Unit (VPU) embedded in the Intel Movidius SoC code named
> > + Keem Bay.
>
> Sounds like a mailbox.
Its a multi-channel mailbox like thing with priority channel support.

>
> What's the relationship between this and the xlink thing?
Xlink is a SW abstraction to allow multiple user access to the VPU as well as
enabling use cases where a Keem Bay is used as an accelerator add in card as
well as a simple SBC type of design. The xlink stuff sits on top of the IPC
stuff.

--mark

2020-12-07 18:47:31

by Daniele Alessandrelli

[permalink] [raw]
Subject: Re: [PATCH 02/22] dt-bindings: Add bindings for Keem Bay IPC driver

Hi Rob,

Thanks for the feedback.

On Mon, 2020-12-07 at 10:01 -0600, Rob Herring wrote:
> On Tue, Dec 01, 2020 at 02:34:51PM -0800, [email protected] wrote:
> > From: Daniele Alessandrelli <[email protected]>
> >
> > Add DT binding documentation for the Intel Keem Bay IPC driver, which
> > enables communication between the Computing Sub-System (CSS) and the
> > Multimedia Sub-System (MSS) of the Intel Movidius SoC code named Keem
> > Bay.
> >

[cut]

> > +
> > +description:
> > + The Keem Bay IPC driver enables Inter-Processor Communication (IPC) with the
> > + Visual Processor Unit (VPU) embedded in the Intel Movidius SoC code named
> > + Keem Bay.
>
> Sounds like a mailbox.

We did consider using the mailbox framework, but eventually decided
against it; mainly because of the following two reasons:

1. The channel concept in the Mailbox framework is different than the
channel concept in Keem Bay IPC:

a. My understanding is that Mailbox channels are meant to be SW
representation of physical HW channels, while in Keem Bay IPC
channels are software abstractions to achieve communication
multiplexing over a single HW link

b. Additionally, Keem Bay IPC has two different classes of channels
(high-speed channels and general-purpose channels) that need to
access the same HW link with different priorities.

2. The blocking / non-blocking TX behavior of mailbox channels is
defined at channel creation time (by the tx_block value of the
mailbox client passed to mbox_request_channel(); my understanding
is that the tx_block value cannot be modified after the channel is
created), while in Keem Bay IPC the same channel can be used for
both blocking and non-blocking TX (behavior is controlled by the
timeout argument passed to keembay_ipc_send()).

Having said that, I guess that it could be possible to create a Mailbox
driver implementing the core communication mechanism used by the Keem
Bay IPC and then build our API around it (basically having two
drivers). But I'm not sure that would make the code simpler or easier
to maintain. Any thoughts on this?


>
>
> What's the relationship between this and the xlink thing?
>

xLink internally uses Keem Bay IPC to communicate with the VPU.
Basically, Keem Bay IPC is the lowest layer of the xLink stack.




2020-12-07 20:35:55

by Jassi Brar

[permalink] [raw]
Subject: Re: [PATCH 02/22] dt-bindings: Add bindings for Keem Bay IPC driver

On Mon, Dec 7, 2020 at 12:43 PM Daniele Alessandrelli
<[email protected]> wrote:
>
> Hi Rob,
>
> Thanks for the feedback.
>
> On Mon, 2020-12-07 at 10:01 -0600, Rob Herring wrote:
> > On Tue, Dec 01, 2020 at 02:34:51PM -0800, [email protected] wrote:
> > > From: Daniele Alessandrelli <[email protected]>
> > >
> > > Add DT binding documentation for the Intel Keem Bay IPC driver, which
> > > enables communication between the Computing Sub-System (CSS) and the
> > > Multimedia Sub-System (MSS) of the Intel Movidius SoC code named Keem
> > > Bay.
> > >
>
> [cut]
>
> > > +
> > > +description:
> > > + The Keem Bay IPC driver enables Inter-Processor Communication (IPC) with the
> > > + Visual Processor Unit (VPU) embedded in the Intel Movidius SoC code named
> > > + Keem Bay.
> >
> > Sounds like a mailbox.
>
> We did consider using the mailbox framework, but eventually decided
> against it; mainly because of the following two reasons:
>
> 1. The channel concept in the Mailbox framework is different than the
> channel concept in Keem Bay IPC:
>
> a. My understanding is that Mailbox channels are meant to be SW
> representation of physical HW channels, while in Keem Bay IPC
> channels are software abstractions to achieve communication
> multiplexing over a single HW link
>
In mailbox api, that would be a physical channel shared between various clients.

> b. Additionally, Keem Bay IPC has two different classes of channels
> (high-speed channels and general-purpose channels) that need to
> access the same HW link with different priorities.
>
If the priorities are hard (programmed into some register), you could
do that via dt during channel population.
If they are soft, that would be handled in the shared channel implementation.

> 2. The blocking / non-blocking TX behavior of mailbox channels is
> defined at channel creation time (by the tx_block value of the
> mailbox client passed to mbox_request_channel();
>
No, that is checked at mbox_send_message()

> my understanding
> is that the tx_block value cannot be modified after the channel is
> created),
>
Again no. If you don't queue more than one message at any time you can
change it between transfers. To be safe you can always change it
between channel release - request calls.

> while in Keem Bay IPC the same channel can be used for
> both blocking and non-blocking TX (behavior is controlled by the
> timeout argument passed to keembay_ipc_send()).
>
> Having said that, I guess that it could be possible to create a Mailbox
> driver implementing the core communication mechanism used by the Keem
> Bay IPC and then build our API around it (basically having two
> drivers). But I'm not sure that would make the code simpler or easier
> to maintain. Any thoughts on this?
>
I think so. Most of KeemBay specific behaviour would be implemented in
the shared channel above the mailbox api.

cheers!

2020-12-09 00:17:04

by mark gross

[permalink] [raw]
Subject: Re: [PATCH 02/22] dt-bindings: Add bindings for Keem Bay IPC driver

On Mon, Dec 07, 2020 at 02:31:37PM -0600, Jassi Brar wrote:
> On Mon, Dec 7, 2020 at 12:43 PM Daniele Alessandrelli
> <[email protected]> wrote:
> >
> > Hi Rob,
> >
> > Thanks for the feedback.
> >
> > On Mon, 2020-12-07 at 10:01 -0600, Rob Herring wrote:
> > > On Tue, Dec 01, 2020 at 02:34:51PM -0800, [email protected] wrote:
> > > > From: Daniele Alessandrelli <[email protected]>
> > > >
> > > > Add DT binding documentation for the Intel Keem Bay IPC driver, which
> > > > enables communication between the Computing Sub-System (CSS) and the
> > > > Multimedia Sub-System (MSS) of the Intel Movidius SoC code named Keem
> > > > Bay.
> > > >
> >
> > [cut]
> >
> > > > +
> > > > +description:
> > > > + The Keem Bay IPC driver enables Inter-Processor Communication (IPC) with the
> > > > + Visual Processor Unit (VPU) embedded in the Intel Movidius SoC code named
> > > > + Keem Bay.
> > >
> > > Sounds like a mailbox.
> >
> > We did consider using the mailbox framework, but eventually decided
> > against it; mainly because of the following two reasons:
> >
> > 1. The channel concept in the Mailbox framework is different than the
> > channel concept in Keem Bay IPC:
> >
> > a. My understanding is that Mailbox channels are meant to be SW
> > representation of physical HW channels, while in Keem Bay IPC
> > channels are software abstractions to achieve communication
> > multiplexing over a single HW link
> >
> In mailbox api, that would be a physical channel shared between various clients.
>
> > b. Additionally, Keem Bay IPC has two different classes of channels
> > (high-speed channels and general-purpose channels) that need to
> > access the same HW link with different priorities.
> >
> If the priorities are hard (programmed into some register), you could
> do that via dt during channel population.
> If they are soft, that would be handled in the shared channel implementation.
>
> > 2. The blocking / non-blocking TX behavior of mailbox channels is
> > defined at channel creation time (by the tx_block value of the
> > mailbox client passed to mbox_request_channel();
> >
> No, that is checked at mbox_send_message()
>
> > my understanding
> > is that the tx_block value cannot be modified after the channel is
> > created),
> >
> Again no. If you don't queue more than one message at any time you can
> change it between transfers. To be safe you can always change it
> between channel release - request calls.
>
> > while in Keem Bay IPC the same channel can be used for
> > both blocking and non-blocking TX (behavior is controlled by the
> > timeout argument passed to keembay_ipc_send()).
> >
> > Having said that, I guess that it could be possible to create a Mailbox
> > driver implementing the core communication mechanism used by the Keem
> > Bay IPC and then build our API around it (basically having two
> > drivers). But I'm not sure that would make the code simpler or easier
> > to maintain. Any thoughts on this?
> >
> I think so. Most of KeemBay specific behaviour would be implemented in
> the shared channel above the mailbox api.

Quick question. By "I think so" do you mean that you feel the keem bay IPC
code will be simpler and easier to maintain if we make yet another driver at the
Keem Bay IPC driver sits on top off? Or, the current implementation would be
simpler if we rework the implementation to use the mailbox api?

I'm just now ramping on the common mailbox framework so that may be a dumb
question. I would like to be confident reworking the driver to use the mailbox
api will not lead to blocking issues before we start that.

thanks!

--mark

2020-12-09 16:52:41

by Jassi Brar

[permalink] [raw]
Subject: Re: [PATCH 02/22] dt-bindings: Add bindings for Keem Bay IPC driver

On Tue, Dec 8, 2020 at 6:12 PM mark gross <[email protected]> wrote:
>
> On Mon, Dec 07, 2020 at 02:31:37PM -0600, Jassi Brar wrote:
> > On Mon, Dec 7, 2020 at 12:43 PM Daniele Alessandrelli
> > <[email protected]> wrote:
> > >
> > > Hi Rob,
> > >
> > > Thanks for the feedback.
> > >
> > > On Mon, 2020-12-07 at 10:01 -0600, Rob Herring wrote:
> > > > On Tue, Dec 01, 2020 at 02:34:51PM -0800, [email protected] wrote:
> > > > > From: Daniele Alessandrelli <[email protected]>
> > > > >
> > > > > Add DT binding documentation for the Intel Keem Bay IPC driver, which
> > > > > enables communication between the Computing Sub-System (CSS) and the
> > > > > Multimedia Sub-System (MSS) of the Intel Movidius SoC code named Keem
> > > > > Bay.
> > > > >
> > >
> > > [cut]
> > >
> > > > > +
> > > > > +description:
> > > > > + The Keem Bay IPC driver enables Inter-Processor Communication (IPC) with the
> > > > > + Visual Processor Unit (VPU) embedded in the Intel Movidius SoC code named
> > > > > + Keem Bay.
> > > >
> > > > Sounds like a mailbox.
> > >
> > > We did consider using the mailbox framework, but eventually decided
> > > against it; mainly because of the following two reasons:
> > >
> > > 1. The channel concept in the Mailbox framework is different than the
> > > channel concept in Keem Bay IPC:
> > >
> > > a. My understanding is that Mailbox channels are meant to be SW
> > > representation of physical HW channels, while in Keem Bay IPC
> > > channels are software abstractions to achieve communication
> > > multiplexing over a single HW link
> > >
> > In mailbox api, that would be a physical channel shared between various clients.
> >
> > > b. Additionally, Keem Bay IPC has two different classes of channels
> > > (high-speed channels and general-purpose channels) that need to
> > > access the same HW link with different priorities.
> > >
> > If the priorities are hard (programmed into some register), you could
> > do that via dt during channel population.
> > If they are soft, that would be handled in the shared channel implementation.
> >
> > > 2. The blocking / non-blocking TX behavior of mailbox channels is
> > > defined at channel creation time (by the tx_block value of the
> > > mailbox client passed to mbox_request_channel();
> > >
> > No, that is checked at mbox_send_message()
> >
> > > my understanding
> > > is that the tx_block value cannot be modified after the channel is
> > > created),
> > >
> > Again no. If you don't queue more than one message at any time you can
> > change it between transfers. To be safe you can always change it
> > between channel release - request calls.
> >
> > > while in Keem Bay IPC the same channel can be used for
> > > both blocking and non-blocking TX (behavior is controlled by the
> > > timeout argument passed to keembay_ipc_send()).
> > >
> > > Having said that, I guess that it could be possible to create a Mailbox
> > > driver implementing the core communication mechanism used by the Keem
> > > Bay IPC and then build our API around it (basically having two
> > > drivers). But I'm not sure that would make the code simpler or easier
> > > to maintain. Any thoughts on this?
> > >
> > I think so. Most of KeemBay specific behaviour would be implemented in
> > the shared channel above the mailbox api.
>
> Quick question. By "I think so"
>
From what I have read, it seems it should be doable as a mailbox.

> do you mean that you feel the keem bay IPC
> code will be simpler and easier to maintain if we make yet another driver at the
> Keem Bay IPC driver sits on top off? Or, the current implementation would be
> simpler if we rework the implementation to use the mailbox api?
>
Most of the queue management code would be taken over my mailbox api.
And you'll have
separated out the pure controller driver from protocol assumptions.
So there shouldn't be extra code... just this code reorganised and some reduced.

cheers!

2020-12-09 17:38:29

by Rob Herring

[permalink] [raw]
Subject: Re: [PATCH 02/22] dt-bindings: Add bindings for Keem Bay IPC driver

On Mon, Dec 07, 2020 at 06:42:07PM +0000, Daniele Alessandrelli wrote:
> Hi Rob,
>
> Thanks for the feedback.
>
> On Mon, 2020-12-07 at 10:01 -0600, Rob Herring wrote:
> > On Tue, Dec 01, 2020 at 02:34:51PM -0800, [email protected] wrote:
> > > From: Daniele Alessandrelli <[email protected]>
> > >
> > > Add DT binding documentation for the Intel Keem Bay IPC driver, which
> > > enables communication between the Computing Sub-System (CSS) and the
> > > Multimedia Sub-System (MSS) of the Intel Movidius SoC code named Keem
> > > Bay.
> > >
>
> [cut]
>
> > > +
> > > +description:
> > > + The Keem Bay IPC driver enables Inter-Processor Communication (IPC) with the
> > > + Visual Processor Unit (VPU) embedded in the Intel Movidius SoC code named
> > > + Keem Bay.
> >
> > Sounds like a mailbox.
>
> We did consider using the mailbox framework, but eventually decided
> against it; mainly because of the following two reasons:
>
> 1. The channel concept in the Mailbox framework is different than the
> channel concept in Keem Bay IPC:
>
> a. My understanding is that Mailbox channels are meant to be SW
> representation of physical HW channels, while in Keem Bay IPC
> channels are software abstractions to achieve communication
> multiplexing over a single HW link
>
> b. Additionally, Keem Bay IPC has two different classes of channels
> (high-speed channels and general-purpose channels) that need to
> access the same HW link with different priorities.
>
> 2. The blocking / non-blocking TX behavior of mailbox channels is
> defined at channel creation time (by the tx_block value of the
> mailbox client passed to mbox_request_channel(); my understanding
> is that the tx_block value cannot be modified after the channel is
> created), while in Keem Bay IPC the same channel can be used for
> both blocking and non-blocking TX (behavior is controlled by the
> timeout argument passed to keembay_ipc_send()).
>
> Having said that, I guess that it could be possible to create a Mailbox
> driver implementing the core communication mechanism used by the Keem
> Bay IPC and then build our API around it (basically having two
> drivers). But I'm not sure that would make the code simpler or easier
> to maintain. Any thoughts on this?

The use of the mailbox binding and the kernel's mailbox framework are
independent questions. I'm only concerned with the former (for purposes
of this review).

Rob