From: Jassi Brar <[email protected]>
Document the devicetree bindings for Socionext Milbeaut HDMAC
controller. Controller has upto 8 floating channels, that need
a predefined slave-id to work from a set of slaves.
Signed-off-by: Jassi Brar <[email protected]>
---
.../bindings/dma/milbeaut-m10v-hdmac.txt | 54 +++++++++++++++++++
1 file changed, 54 insertions(+)
create mode 100644 Documentation/devicetree/bindings/dma/milbeaut-m10v-hdmac.txt
diff --git a/Documentation/devicetree/bindings/dma/milbeaut-m10v-hdmac.txt b/Documentation/devicetree/bindings/dma/milbeaut-m10v-hdmac.txt
new file mode 100644
index 000000000000..a104fcb9e73d
--- /dev/null
+++ b/Documentation/devicetree/bindings/dma/milbeaut-m10v-hdmac.txt
@@ -0,0 +1,51 @@
+* Milbeaut AHB DMA Controller
+
+Milbeaut AHB DMA controller has transfer capability bellow.
+ - memory to memory transfer
+ - device to memory transfer
+ - memory to device transfer
+
+Required property:
+- compatible: Should be "socionext,milbeaut-m10v-hdmac"
+- reg: Should contain DMA registers location and length.
+- interrupts: Should contain all of the per-channel DMA interrupts.
+- #dma-cells: Should be 1. Specify the ID of the slave.
+- clocks: Phandle to the clock used by the HDMAC module.
+
+
+Example:
+
+ hdmac1: hdmac@1e110000 {
+ compatible = "socionext,milbeaut-m10v-hdmac";
+ reg = <0x1e110000 0x10000>;
+ interrupts = <0 132 4>,
+ <0 133 4>,
+ <0 134 4>,
+ <0 135 4>,
+ <0 136 4>,
+ <0 137 4>,
+ <0 138 4>,
+ <0 139 4>;
+ #dma-cells = <1>;
+ clocks = <&dummy_clk>;
+ };
+
+* DMA client
+
+Clients have to specify the DMA requests with phandles in a list.
+
+Required properties:
+- dmas: List of one or more DMA request specifiers. One DMA request specifier
+ consists of a phandle to the DMA controller followed by the integer
+ specifying the request line.
+- dma-names: List of string identifiers for the DMA requests. For the correct
+ names, have a look at the specific client driver.
+
+Example:
+
+ sni_spi1: spi@1e800100 {
+ ...
+ dmas = <&hdmac1 22>, <&hdmac1 21>;
+ dma-names = "tx", "rx";
+ ...
+ };
--
2.17.1
On Wed, Jun 12, 2019 at 07:52:37PM -0500, [email protected] wrote:
> From: Jassi Brar <[email protected]>
>
> Document the devicetree bindings for Socionext Milbeaut HDMAC
> controller. Controller has upto 8 floating channels, that need
> a predefined slave-id to work from a set of slaves.
>
> Signed-off-by: Jassi Brar <[email protected]>
> ---
> .../bindings/dma/milbeaut-m10v-hdmac.txt | 54 +++++++++++++++++++
> 1 file changed, 54 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/dma/milbeaut-m10v-hdmac.txt
>
> diff --git a/Documentation/devicetree/bindings/dma/milbeaut-m10v-hdmac.txt b/Documentation/devicetree/bindings/dma/milbeaut-m10v-hdmac.txt
> new file mode 100644
> index 000000000000..a104fcb9e73d
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/dma/milbeaut-m10v-hdmac.txt
> @@ -0,0 +1,51 @@
> +* Milbeaut AHB DMA Controller
> +
> +Milbeaut AHB DMA controller has transfer capability bellow.
> + - memory to memory transfer
> + - device to memory transfer
> + - memory to device transfer
> +
> +Required property:
> +- compatible: Should be "socionext,milbeaut-m10v-hdmac"
> +- reg: Should contain DMA registers location and length.
> +- interrupts: Should contain all of the per-channel DMA interrupts.
How many?
> +- #dma-cells: Should be 1. Specify the ID of the slave.
> +- clocks: Phandle to the clock used by the HDMAC module.
> +
> +
> +Example:
> +
> + hdmac1: hdmac@1e110000 {
dma-controller@...
> + compatible = "socionext,milbeaut-m10v-hdmac";
> + reg = <0x1e110000 0x10000>;
> + interrupts = <0 132 4>,
> + <0 133 4>,
> + <0 134 4>,
> + <0 135 4>,
> + <0 136 4>,
> + <0 137 4>,
> + <0 138 4>,
> + <0 139 4>;
> + #dma-cells = <1>;
> + clocks = <&dummy_clk>;
> + };
> +
> +* DMA client
> +
> +Clients have to specify the DMA requests with phandles in a list.
Nothing specific to this binding here and the client side is already
documented, so drop this section.
> +
> +Required properties:
> +- dmas: List of one or more DMA request specifiers. One DMA request specifier
> + consists of a phandle to the DMA controller followed by the integer
> + specifying the request line.
> +- dma-names: List of string identifiers for the DMA requests. For the correct
> + names, have a look at the specific client driver.
> +
> +Example:
> +
> + sni_spi1: spi@1e800100 {
> + ...
> + dmas = <&hdmac1 22>, <&hdmac1 21>;
> + dma-names = "tx", "rx";
> + ...
> + };
> --
> 2.17.1
>
On Tue, Jul 9, 2019 at 9:34 AM Rob Herring <[email protected]> wrote:
>
> On Wed, Jun 12, 2019 at 07:52:37PM -0500, [email protected] wrote:
> > From: Jassi Brar <[email protected]>
> >
> > Document the devicetree bindings for Socionext Milbeaut HDMAC
> > controller. Controller has upto 8 floating channels, that need
> > a predefined slave-id to work from a set of slaves.
> >
> > Signed-off-by: Jassi Brar <[email protected]>
> > ---
> > .../bindings/dma/milbeaut-m10v-hdmac.txt | 54 +++++++++++++++++++
> > 1 file changed, 54 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/dma/milbeaut-m10v-hdmac.txt
> >
> > diff --git a/Documentation/devicetree/bindings/dma/milbeaut-m10v-hdmac.txt b/Documentation/devicetree/bindings/dma/milbeaut-m10v-hdmac.txt
> > new file mode 100644
> > index 000000000000..a104fcb9e73d
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/dma/milbeaut-m10v-hdmac.txt
> > @@ -0,0 +1,51 @@
> > +* Milbeaut AHB DMA Controller
> > +
> > +Milbeaut AHB DMA controller has transfer capability bellow.
> > + - memory to memory transfer
> > + - device to memory transfer
> > + - memory to device transfer
> > +
> > +Required property:
> > +- compatible: Should be "socionext,milbeaut-m10v-hdmac"
> > +- reg: Should contain DMA registers location and length.
> > +- interrupts: Should contain all of the per-channel DMA interrupts.
>
> How many?
>
Each channel has an IRQ line. And the number of channels is
configurable. So instead of having some explicit property like
'dma-channels', we infer that from the number of irqs registered.
> > +- #dma-cells: Should be 1. Specify the ID of the slave.
> > +- clocks: Phandle to the clock used by the HDMAC module.
> > +
> > +
> > +Example:
> > +
> > + hdmac1: hdmac@1e110000 {
>
> dma-controller@...
>
OK
> > + compatible = "socionext,milbeaut-m10v-hdmac";
> > + reg = <0x1e110000 0x10000>;
> > + interrupts = <0 132 4>,
> > + <0 133 4>,
> > + <0 134 4>,
> > + <0 135 4>,
> > + <0 136 4>,
> > + <0 137 4>,
> > + <0 138 4>,
> > + <0 139 4>;
> > + #dma-cells = <1>;
> > + clocks = <&dummy_clk>;
> > + };
> > +
> > +* DMA client
> > +
> > +Clients have to specify the DMA requests with phandles in a list.
>
> Nothing specific to this binding here and the client side is already
> documented, so drop this section.
>
OK.
Thanks
On Tue, Jul 9, 2019 at 10:12 PM Jassi Brar <[email protected]> wrote:
>
> On Tue, Jul 9, 2019 at 9:34 AM Rob Herring <[email protected]> wrote:
> >
> > On Wed, Jun 12, 2019 at 07:52:37PM -0500, [email protected] wrote:
> > > From: Jassi Brar <[email protected]>
> > >
> > > Document the devicetree bindings for Socionext Milbeaut HDMAC
> > > controller. Controller has upto 8 floating channels, that need
> > > a predefined slave-id to work from a set of slaves.
> > >
> > > Signed-off-by: Jassi Brar <[email protected]>
> > > ---
> > > .../bindings/dma/milbeaut-m10v-hdmac.txt | 54 +++++++++++++++++++
> > > 1 file changed, 54 insertions(+)
> > > create mode 100644 Documentation/devicetree/bindings/dma/milbeaut-m10v-hdmac.txt
> > >
> > > diff --git a/Documentation/devicetree/bindings/dma/milbeaut-m10v-hdmac.txt b/Documentation/devicetree/bindings/dma/milbeaut-m10v-hdmac.txt
> > > new file mode 100644
> > > index 000000000000..a104fcb9e73d
> > > --- /dev/null
> > > +++ b/Documentation/devicetree/bindings/dma/milbeaut-m10v-hdmac.txt
> > > @@ -0,0 +1,51 @@
> > > +* Milbeaut AHB DMA Controller
> > > +
> > > +Milbeaut AHB DMA controller has transfer capability bellow.
> > > + - memory to memory transfer
> > > + - device to memory transfer
> > > + - memory to device transfer
> > > +
> > > +Required property:
> > > +- compatible: Should be "socionext,milbeaut-m10v-hdmac"
> > > +- reg: Should contain DMA registers location and length.
> > > +- interrupts: Should contain all of the per-channel DMA interrupts.
> >
> > How many?
> >
> Each channel has an IRQ line. And the number of channels is
> configurable. So instead of having some explicit property like
> 'dma-channels', we infer that from the number of irqs registered.
Yes, I get that. There's still a range that's valid and you need to
define those constraints. If there's a variable number of channels,
then that implies different SoCs which should also mean different
compatible strings.
Rob