The driver got added back in 45d7b3867a5cabb97fc31f16122cda8540c3a30c,
but the dts never got updated, so here it is!
I’ve added it to the rk3588s because that’s where most of the
definitions are, but I’ve only tested on a rk3588 so maybe there are
subtle changes.
The rk3588 TRM also documents slightly different values (in part 1
section 14.5.3) than the driver, but I’ve left the values alone since I
have no way to determine which one is (more) correct.
Only the CPU is properly mapped, as neither the GPU nor the NPU have
been added to the dts for now, I’ve left some TODOs there.
All of the thermal zones report almost the same value on my rock-5b
board, I’m not sure if this is due to a programming error or if this is
to be expected. For instance, after running for a while, all of the
zones report 44384 m℃, despite having used neither the GPU nor the NPU.
Additionally, the alert and crit temperatures have been arbitrarily
chosen based on other dts files, not based on any knowledge of the
thermal behaviours of this specific SoC.
Emmanuel Gil Peyrot (2):
arm64: dts: rockchip: Add the rk3588 thermal zones
arm64: dts: rockchip: Enable the tsadc on Rock-5B
.../boot/dts/rockchip/rk3588-rock-5b.dts | 4 +
arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 181 ++++++++++++++++++
2 files changed, 185 insertions(+)
--
2.43.0
The driver got added back in 45d7b3867a5cabb97fc31f16122cda8540c3a30c,
but the dts never got updated, so here it is!
I’ve added it to the rk3588s because that’s where most of the
definitions are, but I’ve only tested on a rk3588 so maybe there are
subtle changes.
The rk3588 TRM also documents slightly different values (in part 1
section 14.5.3) than the driver, but I’ve left the values alone since I
have no way to determine which one is (more) correct.
Only the CPU is properly mapped, as neither the GPU nor the NPU have
been added to the dts for now, I’ve left some TODOs there.
All of the thermal zones report almost the same value on my rock-5b
board, I’m not sure if this is due to a programming error or if this is
to be expected. For instance, after running for a while, all of the
zones report 44384 m℃, despite having used neither the GPU nor the NPU.
Additionally, the alert and crit temperatures have been arbitrarily
chosen based on other dts files, not based on any knowledge of the
thermal behaviours of this specific SoC.
Signed-off-by: Emmanuel Gil Peyrot <[email protected]>
---
arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 181 ++++++++++++++++++++++
1 file changed, 181 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
index 36b1b7acfe6a..c7a2078960b7 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
@@ -10,6 +10,7 @@
#include <dt-bindings/reset/rockchip,rk3588-cru.h>
#include <dt-bindings/phy/phy.h>
#include <dt-bindings/ata/ahci.h>
+#include <dt-bindings/thermal/thermal.h>
/ {
compatible = "rockchip,rk3588";
@@ -436,6 +437,186 @@ scmi_shmem: sram@0 {
};
};
+ thermal_zones: thermal-zones {
+ soc-thermal {
+ polling-delay-passive = <250>; /* milliseconds */
+ polling-delay = <1000>; /* milliseconds */
+ thermal-sensors = <&tsadc 0>;
+
+ trips {
+ soc_alert: trip-alert {
+ temperature = <80000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+ soc_crit: trip-crit {
+ temperature = <100000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ cooling-maps {
+ map0 {
+ trip = <&soc_alert>;
+ cooling-device = <&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu_b1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu_b2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu_b3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu_l0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu_l1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu_l2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu_l3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
+ };
+
+ cluster1-thermal {
+ polling-delay-passive = <250>; /* milliseconds */
+ polling-delay = <1000>; /* milliseconds */
+ thermal-sensors = <&tsadc 1>;
+
+ trips {
+ cluster1_alert: trip-alert {
+ temperature = <80000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+ cluster1_crit: trip-crit {
+ temperature = <100000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ cooling-maps {
+ map0 {
+ trip = <&cluster1_alert>;
+ cooling-device = <&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu_b1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
+ };
+
+ cluster2-thermal {
+ polling-delay-passive = <250>; /* milliseconds */
+ polling-delay = <1000>; /* milliseconds */
+ thermal-sensors = <&tsadc 2>;
+
+ trips {
+ cluster2_alert: trip-alert {
+ temperature = <80000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+ cluster2_crit: trip-crit {
+ temperature = <100000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ cooling-maps {
+ map0 {
+ trip = <&cluster2_alert>;
+ cooling-device = <&cpu_b2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu_b3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
+ };
+
+ cluster0-thermal {
+ polling-delay-passive = <250>; /* milliseconds */
+ polling-delay = <1000>; /* milliseconds */
+ thermal-sensors = <&tsadc 3>;
+
+ trips {
+ cluster0_alert: trip-alert {
+ temperature = <80000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+ cluster0_crit: trip-crit {
+ temperature = <100000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ cooling-maps {
+ map0 {
+ trip = <&cluster0_alert>;
+ cooling-device = <&cpu_l0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu_l1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu_l2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu_l3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
+ };
+
+ center-thermal {
+ polling-delay-passive = <250>; /* milliseconds */
+ polling-delay = <1000>; /* milliseconds */
+ thermal-sensors = <&tsadc 4>;
+
+ trips {
+ center_alert: trip-alert {
+ temperature = <80000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+ center_crit: trip-crit {
+ temperature = <100000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ cooling-maps {
+ /* TODO: what exactly is "center"? */
+ };
+ };
+
+ gpu-thermal {
+ polling-delay-passive = <250>; /* milliseconds */
+ polling-delay = <1000>; /* milliseconds */
+ thermal-sensors = <&tsadc 5>;
+
+ trips {
+ gpu_alert: trip-alert {
+ temperature = <80000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+ gpu_crit: trip-crit {
+ temperature = <100000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ cooling-maps {
+ /* TODO: Add the GPU here once it is supported. */
+ };
+ };
+
+ npu-thermal {
+ polling-delay-passive = <250>; /* milliseconds */
+ polling-delay = <1000>; /* milliseconds */
+ thermal-sensors = <&tsadc 6>;
+
+ trips {
+ npu_alert: trip-alert {
+ temperature = <80000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+ npu_crit: trip-crit {
+ temperature = <100000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ cooling-maps {
+ /* TODO: Add the NPU here once it is supported. */
+ };
+ };
+ };
+
usb_host0_ehci: usb@fc800000 {
compatible = "rockchip,rk3588-ehci", "generic-ehci";
reg = <0x0 0xfc800000 0x0 0x40000>;
--
2.43.0
This is the board I’ve tested the previous commit on.
Signed-off-by: Emmanuel Gil Peyrot <[email protected]>
---
arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
index a0e303c3a1dc..2c6e55f0a5fa 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
@@ -731,6 +731,10 @@ regulator-state-mem {
};
};
+&tsadc {
+ status = "okay";
+};
+
&uart2 {
pinctrl-0 = <&uart2m0_xfer>;
status = "okay";
--
2.43.0
Hi Emmanuel,
please sync up with Alexey Charkov (added in Cc) who is doing a similar
configuration [1] which was reviewed.
Thanks
-- Daniel
[1]
https://lore.kernel.org/all/CABjd4YyL1ZwNOJrWPwZtc7=e4h18a9tQOnuKP6soy=iTHv-WEA@mail.gmail.com/
On 22/01/2024 21:34, Emmanuel Gil Peyrot wrote:
> The driver got added back in 45d7b3867a5cabb97fc31f16122cda8540c3a30c,
> but the dts never got updated, so here it is!
>
> I’ve added it to the rk3588s because that’s where most of the
> definitions are, but I’ve only tested on a rk3588 so maybe there are
> subtle changes.
>
> The rk3588 TRM also documents slightly different values (in part 1
> section 14.5.3) than the driver, but I’ve left the values alone since I
> have no way to determine which one is (more) correct.
>
> Only the CPU is properly mapped, as neither the GPU nor the NPU have
> been added to the dts for now, I’ve left some TODOs there.
>
> All of the thermal zones report almost the same value on my rock-5b
> board, I’m not sure if this is due to a programming error or if this is
> to be expected. For instance, after running for a while, all of the
> zones report 44384 m℃, despite having used neither the GPU nor the NPU.
>
> Additionally, the alert and crit temperatures have been arbitrarily
> chosen based on other dts files, not based on any knowledge of the
> thermal behaviours of this specific SoC.
>
> Signed-off-by: Emmanuel Gil Peyrot <[email protected]>
> ---
> arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 181 ++++++++++++++++++++++
> 1 file changed, 181 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
> index 36b1b7acfe6a..c7a2078960b7 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
> @@ -10,6 +10,7 @@
> #include <dt-bindings/reset/rockchip,rk3588-cru.h>
> #include <dt-bindings/phy/phy.h>
> #include <dt-bindings/ata/ahci.h>
> +#include <dt-bindings/thermal/thermal.h>
>
> / {
> compatible = "rockchip,rk3588";
> @@ -436,6 +437,186 @@ scmi_shmem: sram@0 {
> };
> };
>
> + thermal_zones: thermal-zones {
> + soc-thermal {
> + polling-delay-passive = <250>; /* milliseconds */
> + polling-delay = <1000>; /* milliseconds */
> + thermal-sensors = <&tsadc 0>;
> +
> + trips {
> + soc_alert: trip-alert {
> + temperature = <80000>;
> + hysteresis = <2000>;
> + type = "passive";
> + };
> + soc_crit: trip-crit {
> + temperature = <100000>;
> + hysteresis = <2000>;
> + type = "critical";
> + };
> + };
> + cooling-maps {
> + map0 {
> + trip = <&soc_alert>;
> + cooling-device = <&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> + <&cpu_b1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> + <&cpu_b2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> + <&cpu_b3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> + <&cpu_l0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> + <&cpu_l1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> + <&cpu_l2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> + <&cpu_l3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> + };
> + };
> + };
> +
> + cluster1-thermal {
> + polling-delay-passive = <250>; /* milliseconds */
> + polling-delay = <1000>; /* milliseconds */
> + thermal-sensors = <&tsadc 1>;
> +
> + trips {
> + cluster1_alert: trip-alert {
> + temperature = <80000>;
> + hysteresis = <2000>;
> + type = "passive";
> + };
> + cluster1_crit: trip-crit {
> + temperature = <100000>;
> + hysteresis = <2000>;
> + type = "critical";
> + };
> + };
> + cooling-maps {
> + map0 {
> + trip = <&cluster1_alert>;
> + cooling-device = <&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> + <&cpu_b1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> + };
> + };
> + };
> +
> + cluster2-thermal {
> + polling-delay-passive = <250>; /* milliseconds */
> + polling-delay = <1000>; /* milliseconds */
> + thermal-sensors = <&tsadc 2>;
> +
> + trips {
> + cluster2_alert: trip-alert {
> + temperature = <80000>;
> + hysteresis = <2000>;
> + type = "passive";
> + };
> + cluster2_crit: trip-crit {
> + temperature = <100000>;
> + hysteresis = <2000>;
> + type = "critical";
> + };
> + };
> + cooling-maps {
> + map0 {
> + trip = <&cluster2_alert>;
> + cooling-device = <&cpu_b2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> + <&cpu_b3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> + };
> + };
> + };
> +
> + cluster0-thermal {
> + polling-delay-passive = <250>; /* milliseconds */
> + polling-delay = <1000>; /* milliseconds */
> + thermal-sensors = <&tsadc 3>;
> +
> + trips {
> + cluster0_alert: trip-alert {
> + temperature = <80000>;
> + hysteresis = <2000>;
> + type = "passive";
> + };
> + cluster0_crit: trip-crit {
> + temperature = <100000>;
> + hysteresis = <2000>;
> + type = "critical";
> + };
> + };
> + cooling-maps {
> + map0 {
> + trip = <&cluster0_alert>;
> + cooling-device = <&cpu_l0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> + <&cpu_l1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> + <&cpu_l2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> + <&cpu_l3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> + };
> + };
> + };
> +
> + center-thermal {
> + polling-delay-passive = <250>; /* milliseconds */
> + polling-delay = <1000>; /* milliseconds */
> + thermal-sensors = <&tsadc 4>;
> +
> + trips {
> + center_alert: trip-alert {
> + temperature = <80000>;
> + hysteresis = <2000>;
> + type = "passive";
> + };
> + center_crit: trip-crit {
> + temperature = <100000>;
> + hysteresis = <2000>;
> + type = "critical";
> + };
> + };
> + cooling-maps {
> + /* TODO: what exactly is "center"? */
> + };
> + };
> +
> + gpu-thermal {
> + polling-delay-passive = <250>; /* milliseconds */
> + polling-delay = <1000>; /* milliseconds */
> + thermal-sensors = <&tsadc 5>;
> +
> + trips {
> + gpu_alert: trip-alert {
> + temperature = <80000>;
> + hysteresis = <2000>;
> + type = "passive";
> + };
> + gpu_crit: trip-crit {
> + temperature = <100000>;
> + hysteresis = <2000>;
> + type = "critical";
> + };
> + };
> + cooling-maps {
> + /* TODO: Add the GPU here once it is supported. */
> + };
> + };
> +
> + npu-thermal {
> + polling-delay-passive = <250>; /* milliseconds */
> + polling-delay = <1000>; /* milliseconds */
> + thermal-sensors = <&tsadc 6>;
> +
> + trips {
> + npu_alert: trip-alert {
> + temperature = <80000>;
> + hysteresis = <2000>;
> + type = "passive";
> + };
> + npu_crit: trip-crit {
> + temperature = <100000>;
> + hysteresis = <2000>;
> + type = "critical";
> + };
> + };
> + cooling-maps {
> + /* TODO: Add the NPU here once it is supported. */
> + };
> + };
> + };
> +
> usb_host0_ehci: usb@fc800000 {
> compatible = "rockchip,rk3588-ehci", "generic-ehci";
> reg = <0x0 0xfc800000 0x0 0x40000>;
--
<http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs
Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog
On Mon, Jan 22, 2024 at 09:52:10PM +0100, Daniel Lezcano wrote:
>
> Hi Emmanuel,
Hi Daniel,
>
> please sync up with Alexey Charkov (added in Cc) who is doing a similar
> configuration [1] which was reviewed.
Oh, I wasn’t aware of this work, it seems there is nothing this series
add over Alexey’s so I will drop it.
Is there a document tracking your upstreaming work? I was planning on
sending a series enabling the VEPU121 hardware encoders next, but if
you’re also working on it I can drop it too (although I don’t see any
series from a quick search). I’ve now subscribed to the linux-rockchip
mailing list so I shouldn’t miss any new series.
>
> Thanks
> -- Daniel
>
> [1] https://lore.kernel.org/all/CABjd4YyL1ZwNOJrWPwZtc7=e4h18a9tQOnuKP6soy=iTHv-WEA@mail.gmail.com/
>
> On 22/01/2024 21:34, Emmanuel Gil Peyrot wrote:
[…]
>
> --
> <http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs
>
> Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
> <http://twitter.com/#!/linaroorg> Twitter |
> <http://www.linaro.org/linaro-blog/> Blog
>
Thanks,
--
Link Mauve
On Tue, Jan 23, 2024 at 2:09 AM Emmanuel Gil Peyrot
<[email protected]> wrote:
>
> On Mon, Jan 22, 2024 at 09:52:10PM +0100, Daniel Lezcano wrote:
> >
> > Hi Emmanuel,
>
> Hi Daniel,
>
> >
> > please sync up with Alexey Charkov (added in Cc) who is doing a similar
> > configuration [1] which was reviewed.
>
> Oh, I wasn’t aware of this work, it seems there is nothing this series
> add over Alexey’s so I will drop it.
>
> Is there a document tracking your upstreaming work? I was planning on
> sending a series enabling the VEPU121 hardware encoders next, but if
> you’re also working on it I can drop it too (although I don’t see any
> series from a quick search). I’ve now subscribed to the linux-rockchip
> mailing list so I shouldn’t miss any new series.
Hi Emmanuel!
I'm currently in a rather more ad-hoc contribution mode, so there is
no tracking document. Here are the things I have in the making:
- Wire up the GPIO pin that drives WLAN enable signal in the M.2 key
E slot as an rfkill device to make WiFi modules usable on Rock 5B.
Applied locally, tested, submitted [1], not yet reviewed or applied
upstream
- Add thermal zones managed by the TSADC to RK3588 (the series Daniel
referred to). Applied locally, tested, submitted [2], working on v3 to
incorporate the feedback
- Wire up the PWM fan as an active cooling device managed by the
thermal code. Applied locally, tested, will submit as part of v3
thermal zones code
- Add OPP data for CPUs on RK3588 to enable runtime CPU frequency
scaling. Applied locally, testing now, not yet submitted
I also wanted to wire up the display outputs for Rock 5B, given that
VOP support has been recently enabled on RK3588, but haven't yet
started on that one. I haven't touched the hardware encoders either,
so please go ahead with sending those :-)
Best regards,
Alexey
[1] https://lore.kernel.org/linux-rockchip/[email protected]/
[2] https://lore.kernel.org/linux-rockchip/[email protected]/