2019-01-23 23:08:09

by Vijay Khemka

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Subject: [PATCH 1/2] ARM: dts: aspeed: Add peci and lpc for Facebook

Added lpc control for enabling lpc clock, peci for cpu sensors and lpc
snoop devices to Facebook Tiogapass device tree.

Signed-off-by: Vijay Khemka <[email protected]>
---
.../arm/boot/dts/aspeed-bmc-facebook-tiogapass.dts | 14 ++++++++++++++
1 file changed, 14 insertions(+)

diff --git a/arch/arm/boot/dts/aspeed-bmc-facebook-tiogapass.dts b/arch/arm/boot/dts/aspeed-bmc-facebook-tiogapass.dts
index 73e58a821613..d60dbb019f82 100644
--- a/arch/arm/boot/dts/aspeed-bmc-facebook-tiogapass.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-facebook-tiogapass.dts
@@ -54,6 +54,16 @@
};
};

+&lpc_snoop {
+ status = "okay";
+ snoop-ports = <0x80>;
+};
+
+&lpc_ctrl {
+ // Enable lpc clock
+ status = "okay";
+};
+
&uart1 {
// Host Console
status = "okay";
@@ -67,6 +77,10 @@
status = "okay";
};

+&peci0 {
+ status = "okay";
+};
+
&kcs2 {
// BMC KCS channel 2
status = "okay";
--
2.17.1



2019-01-23 23:08:54

by Vijay Khemka

[permalink] [raw]
Subject: [PATCH 2/2] ARM: dts: aspeed: Add uarts for SoL in Facebook

Added uart2 and uart3 in Facebook Tiogapass for routing serial input
from Host to BMC for SoL via LPC.

Signed-off-by: Vijay Khemka <[email protected]>
---
arch/arm/boot/dts/aspeed-bmc-facebook-tiogapass.dts | 10 ++++++++++
1 file changed, 10 insertions(+)

diff --git a/arch/arm/boot/dts/aspeed-bmc-facebook-tiogapass.dts b/arch/arm/boot/dts/aspeed-bmc-facebook-tiogapass.dts
index d60dbb019f82..42e0d7a8e8d0 100644
--- a/arch/arm/boot/dts/aspeed-bmc-facebook-tiogapass.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-facebook-tiogapass.dts
@@ -72,6 +72,16 @@
&pinctrl_rxd1_default>;
};

+&uart2 {
+ // SoL Host Console
+ status = "okay";
+};
+
+&uart3 {
+ // SoL BMC Console
+ status = "okay";
+};
+
&uart5 {
// BMC Console
status = "okay";
--
2.17.1


2019-01-30 03:28:34

by Joel Stanley

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Subject: Re: [PATCH 2/2] ARM: dts: aspeed: Add uarts for SoL in Facebook

On Thu, 24 Jan 2019 at 10:07, Vijay Khemka <[email protected]> wrote:
>
> Added uart2 and uart3 in Facebook Tiogapass for routing serial input
> from Host to BMC for SoL via LPC.
>
> Signed-off-by: Vijay Khemka <[email protected]>

Applied for 5.1.

Cheers,

Joel

2019-01-30 03:29:22

by Joel Stanley

[permalink] [raw]
Subject: Re: [PATCH 1/2] ARM: dts: aspeed: Add peci and lpc for Facebook

On Thu, 24 Jan 2019 at 10:07, Vijay Khemka <[email protected]> wrote:

> index 73e58a821613..d60dbb019f82 100644
> --- a/arch/arm/boot/dts/aspeed-bmc-facebook-tiogapass.dts
> +++ b/arch/arm/boot/dts/aspeed-bmc-facebook-tiogapass.dts

>
> +&peci0 {
> + status = "okay";
> +};

I don't think we have an upstream tree that contains a node called
peci0. Therefore this does not build.

I have dropped this hunk from your patch. Please make sure you test
before sending patches.

Cheers,

Joel

2019-01-30 18:04:41

by Vijay Khemka

[permalink] [raw]
Subject: Re: [PATCH 1/2] ARM: dts: aspeed: Add peci and lpc for Facebook



On 1/29/19, 7:27 PM, "Joel Stanley" <[email protected]> wrote:

On Thu, 24 Jan 2019 at 10:07, Vijay Khemka <[email protected]> wrote:

> index 73e58a821613..d60dbb019f82 100644
> --- a/arch/arm/boot/dts/aspeed-bmc-facebook-tiogapass.dts
> +++ b/arch/arm/boot/dts/aspeed-bmc-facebook-tiogapass.dts

>
> +&peci0 {
> + status = "okay";
> +};

I don't think we have an upstream tree that contains a node called
peci0. Therefore this does not build.

I have dropped this hunk from your patch. Please make sure you test
before sending patches.
Thanks Joel, I will be careful.

Cheers,

Joel