The interrupt status bits are cleared by writing 1, we should force a
write to clear the interrupt without checking if the value has changed.
Fixes: 04f605906ff0 ("irqchip: Add Aspeed SCU interrupt controller")
Signed-off-by: Billy Tsai <[email protected]>
---
drivers/irqchip/irq-aspeed-scu-ic.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/irqchip/irq-aspeed-scu-ic.c b/drivers/irqchip/irq-aspeed-scu-ic.c
index f3c6855a4cef..18b77c3e6db4 100644
--- a/drivers/irqchip/irq-aspeed-scu-ic.c
+++ b/drivers/irqchip/irq-aspeed-scu-ic.c
@@ -76,8 +76,8 @@ static void aspeed_scu_ic_irq_handler(struct irq_desc *desc)
generic_handle_domain_irq(scu_ic->irq_domain,
bit - scu_ic->irq_shift);
- regmap_update_bits(scu_ic->scu, scu_ic->reg, mask,
- BIT(bit + ASPEED_SCU_IC_STATUS_SHIFT));
+ regmap_write_bits(scu_ic->scu, scu_ic->reg, mask,
+ BIT(bit + ASPEED_SCU_IC_STATUS_SHIFT));
}
chained_irq_exit(chip, desc);
--
2.25.1
On Wed, 24 Nov 2021 at 09:43, Billy Tsai <[email protected]> wrote:
>
> The interrupt status bits are cleared by writing 1, we should force a
> write to clear the interrupt without checking if the value has changed.
>
> Fixes: 04f605906ff0 ("irqchip: Add Aspeed SCU interrupt controller")
> Signed-off-by: Billy Tsai <[email protected]>
Good catch. This should go to stable too.
Reviewed-by: Joel Stanley <[email protected]>
Is there any reason to use the regmap abstraction in this driver?
AFAICT the registers aren't shared, so we could replace the regmap
calls with readl/writel. Such a cleanup probably wouldn't be
backported, so this patch is still useful.
> ---
> drivers/irqchip/irq-aspeed-scu-ic.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/irqchip/irq-aspeed-scu-ic.c b/drivers/irqchip/irq-aspeed-scu-ic.c
> index f3c6855a4cef..18b77c3e6db4 100644
> --- a/drivers/irqchip/irq-aspeed-scu-ic.c
> +++ b/drivers/irqchip/irq-aspeed-scu-ic.c
> @@ -76,8 +76,8 @@ static void aspeed_scu_ic_irq_handler(struct irq_desc *desc)
> generic_handle_domain_irq(scu_ic->irq_domain,
> bit - scu_ic->irq_shift);
>
> - regmap_update_bits(scu_ic->scu, scu_ic->reg, mask,
> - BIT(bit + ASPEED_SCU_IC_STATUS_SHIFT));
> + regmap_write_bits(scu_ic->scu, scu_ic->reg, mask,
> + BIT(bit + ASPEED_SCU_IC_STATUS_SHIFT));
> }
>
> chained_irq_exit(chip, desc);
> --
> 2.25.1
>
The following commit has been merged into the irq/irqchip-fixes branch of irqchip:
Commit-ID: 8958389681b929fcc7301e7dc5f0da12e4a256a0
Gitweb: https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/8958389681b929fcc7301e7dc5f0da12e4a256a0
Author: Billy Tsai <[email protected]>
AuthorDate: Wed, 24 Nov 2021 17:43:48 +08:00
Committer: Marc Zyngier <[email protected]>
CommitterDate: Thu, 25 Nov 2021 16:50:44
irqchip/aspeed-scu: Replace update_bits with write_bits.
The interrupt status bits are cleared by writing 1, we should force a
write to clear the interrupt without checking if the value has changed.
Fixes: 04f605906ff0 ("irqchip: Add Aspeed SCU interrupt controller")
Signed-off-by: Billy Tsai <[email protected]>
Reviewed-by: Joel Stanley <[email protected]>
Signed-off-by: Marc Zyngier <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Cc: [email protected]
---
drivers/irqchip/irq-aspeed-scu-ic.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/irqchip/irq-aspeed-scu-ic.c b/drivers/irqchip/irq-aspeed-scu-ic.c
index f3c6855..18b77c3 100644
--- a/drivers/irqchip/irq-aspeed-scu-ic.c
+++ b/drivers/irqchip/irq-aspeed-scu-ic.c
@@ -76,8 +76,8 @@ static void aspeed_scu_ic_irq_handler(struct irq_desc *desc)
generic_handle_domain_irq(scu_ic->irq_domain,
bit - scu_ic->irq_shift);
- regmap_update_bits(scu_ic->scu, scu_ic->reg, mask,
- BIT(bit + ASPEED_SCU_IC_STATUS_SHIFT));
+ regmap_write_bits(scu_ic->scu, scu_ic->reg, mask,
+ BIT(bit + ASPEED_SCU_IC_STATUS_SHIFT));
}
chained_irq_exit(chip, desc);