This is a patches separated from one sent earlier [1] with just the
removal of any hard-coded reg addresses from Dove pinctrl stub. This
is a required step for Dove to leave mach-dove, hop into mach-mvebu,
and become part of multi_v7.
In the meantime, support for new Armada 375/38x was added that also
contain patches for pinctrl [2]. The cleanup patches [3] split off from
the original patch set take care of pinctrl-related changes for Armada
375/38x. Since this patch set now already depends on Armada 375/38x
pinctrl through those cleanup patches, we take care of Armada 375/38x
binding updates here, too.
For Dove, this patch set removes all hardcoded addresses from
pinctrl-dove by either requesting additional resources or a syscon
provided regmap for global config registers. As this changes existing
driver to DT binding relationship, all additional resources are probed
in a backward compatible way. If the corresponding resource cannot be
found, we derive it from the existing pinctrl resource and warn about
the old DTB firmware.
Patches 1-2 add or update binding documentation for dove, global config
syscon, and pinctrl-dove. Patch 2 also documents missing reg property
requirement for other mvebu pinctrl nodes, including new Armada 375/38x.
Patch 3 and 4 add the new pinctrl reg property values and global config
register syscon to exisiting dove.dtsi.
Patches 5-6 request either additional reg ranges or the syscon regmap
in a DT-backward compatible way. If any resource cannot be derived from
DT node, we warn about an old DTB firmware.
Patches 7-10 finally remove any hardcoded addresses from Dove SoC
pinctrl driver and use the iomap/regmap resources instead.
DT and binding related patches have also been sent to DT maintainers
and corresponding lists, additional pinctrl related patches have been
sent to pinctrl/mvebu maintainers and LAKML only.
This patch set is based on v3.14-rc1 and depends on some cleanup patches
that will go into v3.15. We have a lot of stuff for v3.15 already in
mvebu, so I am okay with postponing this and/or the following dove-to-
mvebu patches for v3.16. As Jason prepares mvebu pinctrl PRs for LinusW,
it is up to him when to take it with LinusW's Acked-by.
Nevertheless, there is an *unstable* branch based on v3.14-rc1, with
mvebu/pinctrl-3xx and mvebu/pinctrl merged in at (still named -for-3.15)
https://github.com/shesselba/linux-dove.git unstable/dove-pinctrl-for-3.15_v1
[1] http://www.spinics.net/lists/arm-kernel/msg303496.html
[2] http://www.spinics.net/lists/arm-kernel/msg306409.html
[3] http://lkml.org/lkml/2014/2/23/43
Sebastian Hesselbarth (10):
devicetree: bindings: add missing Marvell Dove SoC documentation
devicetree: bindings: update MVEBU pinctrl binding documentation
ARM: dove: add additional pinctrl registers
ARM: dove: add global-config register node
pinctrl: mvebu: dove: request additional resources
pinctrl: mvebu: dove: request syscon regmap for global registers
pinctrl: mvebu: dove: use remapped mpp base registers
pinctrl: mvebu: dove: use remapped mpp4 register
pinctrl: mvebu: dove: use remapped pmu_mpp registers
pinctrl: mvebu: dove: use global register regmap
.../devicetree/bindings/arm/marvell,dove.txt | 22 ++
.../pinctrl/marvell,armada-370-pinctrl.txt | 1 +
.../pinctrl/marvell,armada-375-pinctrl.txt | 1 +
.../pinctrl/marvell,armada-38x-pinctrl.txt | 1 +
.../bindings/pinctrl/marvell,armada-xp-pinctrl.txt | 1 +
.../bindings/pinctrl/marvell,dove-pinctrl.txt | 1 +
.../bindings/pinctrl/marvell,kirkwood-pinctrl.txt | 1 +
.../bindings/pinctrl/marvell,mvebu-pinctrl.txt | 2 +-
arch/arm/boot/dts/dove.dtsi | 10 +-
drivers/pinctrl/mvebu/Kconfig | 1 +
drivers/pinctrl/mvebu/pinctrl-dove.c | 286 +++++++++++++--------
11 files changed, 213 insertions(+), 114 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/marvell,dove.txt
---
Cc: Rob Herring <[email protected]>
Cc: Pawel Moll <[email protected]>
Cc: Mark Rutland <[email protected]>
Cc: Ian Campbell <[email protected]>
Cc: Kumar Gala <[email protected]>
Cc: Rob Landley <[email protected]>
Cc: Linus Walleij <[email protected]>
Cc: Russell King <[email protected]>
Cc: Jason Cooper <[email protected]>
Cc: Andrew Lunn <[email protected]>
Cc: Gregory Clement <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
--
1.8.5.3
Now that we have a regmap for global registers, get rid of the last
remaining hardcoded physical addresses. While at it, also remove
DOVE_ prefix from those macros.
Signed-off-by: Sebastian Hesselbarth <[email protected]>
Acked-by: Linus Walleij <[email protected]>
---
Cc: Linus Walleij <[email protected]>
Cc: Jason Cooper <[email protected]>
Cc: Andrew Lunn <[email protected]>
Cc: Gregory Clement <[email protected]>
Cc: [email protected]
Cc: [email protected]
---
drivers/pinctrl/mvebu/pinctrl-dove.c | 124 ++++++++++++++++-------------------
1 file changed, 58 insertions(+), 66 deletions(-)
diff --git a/drivers/pinctrl/mvebu/pinctrl-dove.c b/drivers/pinctrl/mvebu/pinctrl-dove.c
index b1a2e5b828c1..9e7ff651c018 100644
--- a/drivers/pinctrl/mvebu/pinctrl-dove.c
+++ b/drivers/pinctrl/mvebu/pinctrl-dove.c
@@ -30,21 +30,6 @@
#define PMU_REGS_OFFS 0xd802c
#define GC_REGS_OFFS 0xe802c
-#define DOVE_SB_REGS_VIRT_BASE IOMEM(0xfde00000)
-#define DOVE_GLOBAL_CONFIG_1 (DOVE_SB_REGS_VIRT_BASE + 0xe802C)
-#define DOVE_GLOBAL_CONFIG_1 (DOVE_SB_REGS_VIRT_BASE + 0xe802C)
-#define DOVE_TWSI_ENABLE_OPTION1 BIT(7)
-#define DOVE_GLOBAL_CONFIG_2 (DOVE_SB_REGS_VIRT_BASE + 0xe8030)
-#define DOVE_TWSI_ENABLE_OPTION2 BIT(20)
-#define DOVE_TWSI_ENABLE_OPTION3 BIT(21)
-#define DOVE_TWSI_OPTION3_GPIO BIT(22)
-#define DOVE_SSP_CTRL_STATUS_1 (DOVE_SB_REGS_VIRT_BASE + 0xe8034)
-#define DOVE_SSP_ON_AU1 BIT(0)
-#define DOVE_MPP_GENERAL_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE + 0xe803c)
-#define DOVE_AU1_SPDIFO_GPIO_EN BIT(1)
-#define DOVE_NAND_GPIO_EN BIT(0)
-#define DOVE_GPIO_LO_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE + 0xd0400)
-
/* MPP Base registers */
#define PMU_MPP_GENERAL_CTRL 0x10
#define AU0_AC97_SEL BIT(16)
@@ -61,6 +46,19 @@
#define PMU_SIGNAL_SELECT_0 0x00
#define PMU_SIGNAL_SELECT_1 0x04
+/* Global Config regmap registers */
+#define GLOBAL_CONFIG_1 0x00
+#define TWSI_ENABLE_OPTION1 BIT(7)
+#define GLOBAL_CONFIG_2 0x04
+#define TWSI_ENABLE_OPTION2 BIT(20)
+#define TWSI_ENABLE_OPTION3 BIT(21)
+#define TWSI_OPTION3_GPIO BIT(22)
+#define SSP_CTRL_STATUS_1 0x08
+#define SSP_ON_AU1 BIT(0)
+#define MPP_GENERAL_CONFIG 0x10
+#define AU1_SPDIFO_GPIO_EN BIT(1)
+#define NAND_GPIO_EN BIT(0)
+
#define CONFIG_PMU BIT(4)
static void __iomem *mpp_base;
@@ -182,23 +180,19 @@ static int dove_mpp4_ctrl_set(unsigned pid, unsigned long config)
static int dove_nand_ctrl_get(unsigned pid, unsigned long *config)
{
- unsigned long gmpp = readl(DOVE_MPP_GENERAL_VIRT_BASE);
+ unsigned int gmpp;
- *config = ((gmpp & DOVE_NAND_GPIO_EN) != 0);
+ regmap_read(gconfmap, MPP_GENERAL_CONFIG, &gmpp);
+ *config = ((gmpp & NAND_GPIO_EN) != 0);
return 0;
}
static int dove_nand_ctrl_set(unsigned pid, unsigned long config)
{
- unsigned long gmpp = readl(DOVE_MPP_GENERAL_VIRT_BASE);
-
- gmpp &= ~DOVE_NAND_GPIO_EN;
- if (config)
- gmpp |= DOVE_NAND_GPIO_EN;
-
- writel(gmpp, DOVE_MPP_GENERAL_VIRT_BASE);
-
+ regmap_update_bits(gconfmap, MPP_GENERAL_CONFIG,
+ NAND_GPIO_EN,
+ (config) ? NAND_GPIO_EN : 0);
return 0;
}
@@ -226,18 +220,22 @@ static int dove_audio0_ctrl_set(unsigned pid, unsigned long config)
static int dove_audio1_ctrl_get(unsigned pid, unsigned long *config)
{
unsigned int mpp4 = readl(mpp4_base);
- unsigned long sspc1 = readl(DOVE_SSP_CTRL_STATUS_1);
- unsigned long gmpp = readl(DOVE_MPP_GENERAL_VIRT_BASE);
- unsigned long gcfg2 = readl(DOVE_GLOBAL_CONFIG_2);
+ unsigned int sspc1;
+ unsigned int gmpp;
+ unsigned int gcfg2;
+
+ regmap_read(gconfmap, SSP_CTRL_STATUS_1, &sspc1);
+ regmap_read(gconfmap, MPP_GENERAL_CONFIG, &gmpp);
+ regmap_read(gconfmap, GLOBAL_CONFIG_2, &gcfg2);
*config = 0;
if (mpp4 & AU1_GPIO_SEL)
*config |= BIT(3);
- if (sspc1 & DOVE_SSP_ON_AU1)
+ if (sspc1 & SSP_ON_AU1)
*config |= BIT(2);
- if (gmpp & DOVE_AU1_SPDIFO_GPIO_EN)
+ if (gmpp & AU1_SPDIFO_GPIO_EN)
*config |= BIT(1);
- if (gcfg2 & DOVE_TWSI_OPTION3_GPIO)
+ if (gcfg2 & TWSI_OPTION3_GPIO)
*config |= BIT(0);
/* SSP/TWSI only if I2S1 not set*/
@@ -252,31 +250,21 @@ static int dove_audio1_ctrl_get(unsigned pid, unsigned long *config)
static int dove_audio1_ctrl_set(unsigned pid, unsigned long config)
{
unsigned int mpp4 = readl(mpp4_base);
- unsigned long sspc1 = readl(DOVE_SSP_CTRL_STATUS_1);
- unsigned long gmpp = readl(DOVE_MPP_GENERAL_VIRT_BASE);
- unsigned long gcfg2 = readl(DOVE_GLOBAL_CONFIG_2);
- /*
- * clear all audio1 related bits before configure
- */
- gcfg2 &= ~DOVE_TWSI_OPTION3_GPIO;
- gmpp &= ~DOVE_AU1_SPDIFO_GPIO_EN;
- sspc1 &= ~DOVE_SSP_ON_AU1;
mpp4 &= ~AU1_GPIO_SEL;
-
- if (config & BIT(0))
- gcfg2 |= DOVE_TWSI_OPTION3_GPIO;
- if (config & BIT(1))
- gmpp |= DOVE_AU1_SPDIFO_GPIO_EN;
- if (config & BIT(2))
- sspc1 |= DOVE_SSP_ON_AU1;
if (config & BIT(3))
mpp4 |= AU1_GPIO_SEL;
-
writel(mpp4, mpp4_base);
- writel(sspc1, DOVE_SSP_CTRL_STATUS_1);
- writel(gmpp, DOVE_MPP_GENERAL_VIRT_BASE);
- writel(gcfg2, DOVE_GLOBAL_CONFIG_2);
+
+ regmap_update_bits(gconfmap, SSP_CTRL_STATUS_1,
+ SSP_ON_AU1,
+ (config & BIT(2)) ? SSP_ON_AU1 : 0);
+ regmap_update_bits(gconfmap, MPP_GENERAL_CONFIG,
+ AU1_SPDIFO_GPIO_EN,
+ (config & BIT(1)) ? AU1_SPDIFO_GPIO_EN : 0);
+ regmap_update_bits(gconfmap, GLOBAL_CONFIG_2,
+ TWSI_OPTION3_GPIO,
+ (config & BIT(0)) ? TWSI_OPTION3_GPIO : 0);
return 0;
}
@@ -322,15 +310,18 @@ static int dove_audio1_ctrl_gpio_dir(unsigned pid, bool input)
static int dove_twsi_ctrl_get(unsigned pid, unsigned long *config)
{
- unsigned long gcfg1 = readl(DOVE_GLOBAL_CONFIG_1);
- unsigned long gcfg2 = readl(DOVE_GLOBAL_CONFIG_2);
+ unsigned int gcfg1;
+ unsigned int gcfg2;
+
+ regmap_read(gconfmap, GLOBAL_CONFIG_1, &gcfg1);
+ regmap_read(gconfmap, GLOBAL_CONFIG_2, &gcfg2);
*config = 0;
- if (gcfg1 & DOVE_TWSI_ENABLE_OPTION1)
+ if (gcfg1 & TWSI_ENABLE_OPTION1)
*config = 1;
- else if (gcfg2 & DOVE_TWSI_ENABLE_OPTION2)
+ else if (gcfg2 & TWSI_ENABLE_OPTION2)
*config = 2;
- else if (gcfg2 & DOVE_TWSI_ENABLE_OPTION3)
+ else if (gcfg2 & TWSI_ENABLE_OPTION3)
*config = 3;
return 0;
@@ -338,26 +329,27 @@ static int dove_twsi_ctrl_get(unsigned pid, unsigned long *config)
static int dove_twsi_ctrl_set(unsigned pid, unsigned long config)
{
- unsigned long gcfg1 = readl(DOVE_GLOBAL_CONFIG_1);
- unsigned long gcfg2 = readl(DOVE_GLOBAL_CONFIG_2);
-
- gcfg1 &= ~DOVE_TWSI_ENABLE_OPTION1;
- gcfg2 &= ~(DOVE_TWSI_ENABLE_OPTION2 | DOVE_TWSI_ENABLE_OPTION3);
+ unsigned int gcfg1 = 0;
+ unsigned int gcfg2 = 0;
switch (config) {
case 1:
- gcfg1 |= DOVE_TWSI_ENABLE_OPTION1;
+ gcfg1 = TWSI_ENABLE_OPTION1;
break;
case 2:
- gcfg2 |= DOVE_TWSI_ENABLE_OPTION2;
+ gcfg2 = TWSI_ENABLE_OPTION2;
break;
case 3:
- gcfg2 |= DOVE_TWSI_ENABLE_OPTION3;
+ gcfg2 = TWSI_ENABLE_OPTION3;
break;
}
- writel(gcfg1, DOVE_GLOBAL_CONFIG_1);
- writel(gcfg2, DOVE_GLOBAL_CONFIG_2);
+ regmap_update_bits(gconfmap, GLOBAL_CONFIG_1,
+ TWSI_ENABLE_OPTION1,
+ gcfg1);
+ regmap_update_bits(gconfmap, GLOBAL_CONFIG_2,
+ TWSI_ENABLE_OPTION2 | TWSI_ENABLE_OPTION3,
+ gcfg2);
return 0;
}
--
1.8.5.3
Dove pinctrl also requires additional registers to control all pins.
This patch requests resources for mpp4 and pmu-mpp register ranges.
As this changes DT to driver requirements, fallback to hardcoded
resources, if the corresponding DT regs have not been set.
Also, WARN about old DT binding usage to encourage users to update
their DTBs.
Signed-off-by: Sebastian Hesselbarth <[email protected]>
Acked-by: Linus Walleij <[email protected]>
---
Cc: Linus Walleij <[email protected]>
Cc: Jason Cooper <[email protected]>
Cc: Andrew Lunn <[email protected]>
Cc: Gregory Clement <[email protected]>
Cc: [email protected]
Cc: [email protected]
---
drivers/pinctrl/mvebu/pinctrl-dove.c | 45 +++++++++++++++++++++++++++++++++---
1 file changed, 42 insertions(+), 3 deletions(-)
diff --git a/drivers/pinctrl/mvebu/pinctrl-dove.c b/drivers/pinctrl/mvebu/pinctrl-dove.c
index da9ca26360fd..8d57d4bc1f0c 100644
--- a/drivers/pinctrl/mvebu/pinctrl-dove.c
+++ b/drivers/pinctrl/mvebu/pinctrl-dove.c
@@ -22,6 +22,11 @@
#include "pinctrl-mvebu.h"
+/* Internal registers can be configured at any 1 MiB aligned address */
+#define INT_REGS_MASK ~(SZ_1M - 1)
+#define MPP4_REGS_OFFS 0xd0440
+#define PMU_REGS_OFFS 0xd802c
+
#define DOVE_SB_REGS_VIRT_BASE IOMEM(0xfde00000)
#define DOVE_MPP_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE + 0xd0200)
#define DOVE_PMU_MPP_GENERAL_CTRL (DOVE_MPP_VIRT_BASE + 0x10)
@@ -52,6 +57,8 @@
#define CONFIG_PMU BIT(4)
static void __iomem *mpp_base;
+static void __iomem *mpp4_base;
+static void __iomem *pmu_base;
static int dove_mpp_ctrl_get(unsigned pid, unsigned long *config)
{
@@ -751,7 +758,8 @@ static struct of_device_id dove_pinctrl_of_match[] = {
static int dove_pinctrl_probe(struct platform_device *pdev)
{
- struct resource *res;
+ struct resource *res, *mpp_res;
+ struct resource fb_res;
const struct of_device_id *match =
of_match_device(dove_pinctrl_of_match, &pdev->dev);
pdev->dev.platform_data = (void *)match->data;
@@ -767,11 +775,42 @@ static int dove_pinctrl_probe(struct platform_device *pdev)
}
clk_prepare_enable(clk);
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- mpp_base = devm_ioremap_resource(&pdev->dev, res);
+ mpp_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ mpp_base = devm_ioremap_resource(&pdev->dev, mpp_res);
if (IS_ERR(mpp_base))
return PTR_ERR(mpp_base);
+ /* prepare fallback resource */
+ memcpy(&fb_res, mpp_res, sizeof(struct resource));
+ fb_res.start = 0;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
+ if (!res) {
+ dev_warn(&pdev->dev, "falling back to hardcoded MPP4 resource\n");
+ adjust_resource(&fb_res,
+ (mpp_res->start & INT_REGS_MASK) + MPP4_REGS_OFFS, 0x4);
+ res = &fb_res;
+ }
+
+ mpp4_base = devm_ioremap_resource(&pdev->dev, res);
+ if (IS_ERR(mpp4_base))
+ return PTR_ERR(mpp4_base);
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 2);
+ if (!res) {
+ dev_warn(&pdev->dev, "falling back to hardcoded PMU resource\n");
+ adjust_resource(&fb_res,
+ (mpp_res->start & INT_REGS_MASK) + PMU_REGS_OFFS, 0x8);
+ res = &fb_res;
+ }
+
+ pmu_base = devm_ioremap_resource(&pdev->dev, res);
+ if (IS_ERR(pmu_base))
+ return PTR_ERR(pmu_base);
+
+ /* Warn on any missing DT resource */
+ WARN(fb_res.start, FW_BUG "Missing pinctrl regs in DTB. Please update your firmware.\n");
+
return mvebu_pinctrl_probe(pdev);
}
--
1.8.5.3
Marvell Dove SoC binding was not documented, yet. Add the documentation
and also describe Global Configuration register node in it.
Signed-off-by: Sebastian Hesselbarth <[email protected]>
---
Cc: Rob Herring <[email protected]>
Cc: Pawel Moll <[email protected]>
Cc: Mark Rutland <[email protected]>
Cc: Ian Campbell <[email protected]>
Cc: Kumar Gala <[email protected]>
Cc: Rob Landley <[email protected]>
Cc: Linus Walleij <[email protected]>
Cc: Jason Cooper <[email protected]>
Cc: Andrew Lunn <[email protected]>
Cc: Gregory Clement <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
---
.../devicetree/bindings/arm/marvell,dove.txt | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
create mode 100644 Documentation/devicetree/bindings/arm/marvell,dove.txt
diff --git a/Documentation/devicetree/bindings/arm/marvell,dove.txt b/Documentation/devicetree/bindings/arm/marvell,dove.txt
new file mode 100644
index 000000000000..aaaf64c56e44
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/marvell,dove.txt
@@ -0,0 +1,22 @@
+Marvell Dove Platforms Device Tree Bindings
+-----------------------------------------------
+
+Boards with a Marvell Dove SoC shall have the following properties:
+
+Required root node property:
+- compatible: must contain "marvell,dove";
+
+* Global Configuration registers
+
+Global Configuration registers of Dove SoC are shared by a syscon node.
+
+Required properties:
+- compatible: must contain "marvell,dove-global-config" and "syscon".
+- reg: base address and size of the Global Configuration registers.
+
+Example:
+
+gconf: global-config@e802c {
+ compatible = "marvell,dove-global-config", "syscon";
+ reg = <0xe802c 0x14>;
+};
--
1.8.5.3
Dove pinctrl binding now requires three different reg properties. This
updates corresponding binding and example accordingly. While at it, also
document reg property as required for the other MVEBU SoC pinctrl nodes.
Signed-off-by: Sebastian Hesselbarth <[email protected]>
---
Cc: Rob Herring <[email protected]>
Cc: Pawel Moll <[email protected]>
Cc: Mark Rutland <[email protected]>
Cc: Ian Campbell <[email protected]>
Cc: Kumar Gala <[email protected]>
Cc: Rob Landley <[email protected]>
Cc: Linus Walleij <[email protected]>
Cc: Jason Cooper <[email protected]>
Cc: Andrew Lunn <[email protected]>
Cc: Gregory Clement <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
---
.../devicetree/bindings/pinctrl/marvell,armada-370-pinctrl.txt | 1 +
.../devicetree/bindings/pinctrl/marvell,armada-375-pinctrl.txt | 1 +
.../devicetree/bindings/pinctrl/marvell,armada-38x-pinctrl.txt | 1 +
Documentation/devicetree/bindings/pinctrl/marvell,armada-xp-pinctrl.txt | 1 +
Documentation/devicetree/bindings/pinctrl/marvell,dove-pinctrl.txt | 1 +
Documentation/devicetree/bindings/pinctrl/marvell,kirkwood-pinctrl.txt | 1 +
Documentation/devicetree/bindings/pinctrl/marvell,mvebu-pinctrl.txt | 2 +-
7 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/marvell,armada-370-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/marvell,armada-370-pinctrl.txt
index 01ef408e205f..adda2a8d1d52 100644
--- a/Documentation/devicetree/bindings/pinctrl/marvell,armada-370-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/marvell,armada-370-pinctrl.txt
@@ -5,6 +5,7 @@ part and usage.
Required properties:
- compatible: "marvell,88f6710-pinctrl"
+- reg: register specifier of MPP registers
Available mpp pins/groups and functions:
Note: brackets (x) are not part of the mpp name for marvell,function and given
diff --git a/Documentation/devicetree/bindings/pinctrl/marvell,armada-375-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/marvell,armada-375-pinctrl.txt
index 2ede59dffe1b..7de0cda4a379 100644
--- a/Documentation/devicetree/bindings/pinctrl/marvell,armada-375-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/marvell,armada-375-pinctrl.txt
@@ -5,6 +5,7 @@ part and usage.
Required properties:
- compatible: "marvell,88f6720-pinctrl"
+- reg: register specifier of MPP registers
Available mpp pins/groups and functions:
Note: brackets (x) are not part of the mpp name for marvell,function and given
diff --git a/Documentation/devicetree/bindings/pinctrl/marvell,armada-38x-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/marvell,armada-38x-pinctrl.txt
index 1d45f9d62346..b17c96849fc9 100644
--- a/Documentation/devicetree/bindings/pinctrl/marvell,armada-38x-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/marvell,armada-38x-pinctrl.txt
@@ -7,6 +7,7 @@ Required properties:
- compatible: "marvell,88f6810-pinctrl", "marvell,88f6820-pinctrl" or
"marvell,88f6828-pinctrl" depending on the specific variant of the
SoC being used.
+- reg: register specifier of MPP registers
Available mpp pins/groups and functions:
Note: brackets (x) are not part of the mpp name for marvell,function and given
diff --git a/Documentation/devicetree/bindings/pinctrl/marvell,armada-xp-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/marvell,armada-xp-pinctrl.txt
index bfa0a2e5e0cb..373dbccd7ab0 100644
--- a/Documentation/devicetree/bindings/pinctrl/marvell,armada-xp-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/marvell,armada-xp-pinctrl.txt
@@ -6,6 +6,7 @@ part and usage.
Required properties:
- compatible: "marvell,mv78230-pinctrl", "marvell,mv78260-pinctrl",
"marvell,mv78460-pinctrl"
+- reg: register specifier of MPP registers
This driver supports all Armada XP variants, i.e. mv78230, mv78260, and mv78460.
diff --git a/Documentation/devicetree/bindings/pinctrl/marvell,dove-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/marvell,dove-pinctrl.txt
index 50ec3512a292..cf52477cc7ee 100644
--- a/Documentation/devicetree/bindings/pinctrl/marvell,dove-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/marvell,dove-pinctrl.txt
@@ -6,6 +6,7 @@ part and usage.
Required properties:
- compatible: "marvell,dove-pinctrl"
- clocks: (optional) phandle of pdma clock
+- reg: register specifiers of MPP, MPP4, and PMU MPP registers
Available mpp pins/groups and functions:
Note: brackets (x) are not part of the mpp name for marvell,function and given
diff --git a/Documentation/devicetree/bindings/pinctrl/marvell,kirkwood-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/marvell,kirkwood-pinctrl.txt
index 95daf6335c37..730444a9a4de 100644
--- a/Documentation/devicetree/bindings/pinctrl/marvell,kirkwood-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/marvell,kirkwood-pinctrl.txt
@@ -8,6 +8,7 @@ Required properties:
"marvell,88f6190-pinctrl", "marvell,88f6192-pinctrl",
"marvell,88f6281-pinctrl", "marvell,88f6282-pinctrl"
"marvell,98dx4122-pinctrl"
+- reg: register specifier of MPP registers
This driver supports all kirkwood variants, i.e. 88f6180, 88f619x, and 88f628x.
It also support the 88f6281-based variant in the 98dx412x Bobcat SoCs.
diff --git a/Documentation/devicetree/bindings/pinctrl/marvell,mvebu-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/marvell,mvebu-pinctrl.txt
index 0a26c3aa4e6d..0c09f4eb2af0 100644
--- a/Documentation/devicetree/bindings/pinctrl/marvell,mvebu-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/marvell,mvebu-pinctrl.txt
@@ -37,7 +37,7 @@ uart1: serial@12100 {
pinctrl: pinctrl@d0200 {
compatible = "marvell,dove-pinctrl";
- reg = <0xd0200 0x20>;
+ reg = <0xd0200 0x14>, <0xd0440 0x04>, <0xd802c 0x08>;
pmx_uart1_sw: pmx-uart1-sw {
marvell,pins = "mpp_uart1";
--
1.8.5.3
We share global config registers by syscon node, add it to dove.dtsi.
Signed-off-by: Sebastian Hesselbarth <[email protected]>
---
Cc: Rob Herring <[email protected]>
Cc: Pawel Moll <[email protected]>
Cc: Mark Rutland <[email protected]>
Cc: Ian Campbell <[email protected]>
Cc: Kumar Gala <[email protected]>
Cc: Rob Landley <[email protected]>
Cc: Linus Walleij <[email protected]>
Cc: Russell King <[email protected]>
Cc: Jason Cooper <[email protected]>
Cc: Andrew Lunn <[email protected]>
Cc: Gregory Clement <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
---
arch/arm/boot/dts/dove.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/dove.dtsi b/arch/arm/boot/dts/dove.dtsi
index c5e90f0287b9..eeb08edb67ac 100644
--- a/arch/arm/boot/dts/dove.dtsi
+++ b/arch/arm/boot/dts/dove.dtsi
@@ -616,6 +616,12 @@
interrupts = <5>;
};
+ gconf: global-config@e802c {
+ compatible = "marvell,dove-global-config",
+ "syscon";
+ reg = <0xe802c 0x14>;
+ };
+
gpio2: gpio-ctrl@e8400 {
compatible = "marvell,orion-gpio";
#gpio-cells = <2>;
--
1.8.5.3
Dove pinctrl uses some global config registers to control pins.
This patch requests a syscon regmap for those registers. As this
changes DT to driver requirements, fallback to a self-registered
regmap with hardcoded resources, if the corresponding syscon DT
node is missing. Also, WARN about old DT binding usage to encourage
users to update their DTBs.
Signed-off-by: Sebastian Hesselbarth <[email protected]>
Acked-by: Linus Walleij <[email protected]>
---
Cc: Linus Walleij <[email protected]>
Cc: Jason Cooper <[email protected]>
Cc: Andrew Lunn <[email protected]>
Cc: Gregory Clement <[email protected]>
Cc: [email protected]
Cc: [email protected]
---
drivers/pinctrl/mvebu/Kconfig | 1 +
drivers/pinctrl/mvebu/pinctrl-dove.c | 27 +++++++++++++++++++++++++++
2 files changed, 28 insertions(+)
diff --git a/drivers/pinctrl/mvebu/Kconfig b/drivers/pinctrl/mvebu/Kconfig
index a22b0302922d..cc298fade93a 100644
--- a/drivers/pinctrl/mvebu/Kconfig
+++ b/drivers/pinctrl/mvebu/Kconfig
@@ -8,6 +8,7 @@ config PINCTRL_MVEBU
config PINCTRL_DOVE
bool
select PINCTRL_MVEBU
+ select MFD_SYSCON
config PINCTRL_KIRKWOOD
bool
diff --git a/drivers/pinctrl/mvebu/pinctrl-dove.c b/drivers/pinctrl/mvebu/pinctrl-dove.c
index 8d57d4bc1f0c..e4f954a78b15 100644
--- a/drivers/pinctrl/mvebu/pinctrl-dove.c
+++ b/drivers/pinctrl/mvebu/pinctrl-dove.c
@@ -18,7 +18,9 @@
#include <linux/clk.h>
#include <linux/of.h>
#include <linux/of_device.h>
+#include <linux/mfd/syscon.h>
#include <linux/pinctrl/pinctrl.h>
+#include <linux/regmap.h>
#include "pinctrl-mvebu.h"
@@ -26,6 +28,7 @@
#define INT_REGS_MASK ~(SZ_1M - 1)
#define MPP4_REGS_OFFS 0xd0440
#define PMU_REGS_OFFS 0xd802c
+#define GC_REGS_OFFS 0xe802c
#define DOVE_SB_REGS_VIRT_BASE IOMEM(0xfde00000)
#define DOVE_MPP_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE + 0xd0200)
@@ -59,6 +62,7 @@
static void __iomem *mpp_base;
static void __iomem *mpp4_base;
static void __iomem *pmu_base;
+static struct regmap *gconfmap;
static int dove_mpp_ctrl_get(unsigned pid, unsigned long *config)
{
@@ -756,6 +760,13 @@ static struct of_device_id dove_pinctrl_of_match[] = {
{ }
};
+static struct regmap_config gc_regmap_config = {
+ .reg_bits = 32,
+ .val_bits = 32,
+ .reg_stride = 4,
+ .max_register = 5,
+};
+
static int dove_pinctrl_probe(struct platform_device *pdev)
{
struct resource *res, *mpp_res;
@@ -808,6 +819,22 @@ static int dove_pinctrl_probe(struct platform_device *pdev)
if (IS_ERR(pmu_base))
return PTR_ERR(pmu_base);
+ gconfmap = syscon_regmap_lookup_by_compatible("marvell,dove-global-config");
+ if (IS_ERR(gconfmap)) {
+ void __iomem *gc_base;
+
+ dev_warn(&pdev->dev, "falling back to hardcoded global registers\n");
+ adjust_resource(&fb_res,
+ (mpp_res->start & INT_REGS_MASK) + GC_REGS_OFFS, 0x14);
+ gc_base = devm_ioremap_resource(&pdev->dev, &fb_res);
+ if (IS_ERR(gc_base))
+ return PTR_ERR(gc_base);
+ gconfmap = devm_regmap_init_mmio(&pdev->dev,
+ gc_base, &gc_regmap_config);
+ if (IS_ERR(gconfmap))
+ return PTR_ERR(gconfmap);
+ }
+
/* Warn on any missing DT resource */
WARN(fb_res.start, FW_BUG "Missing pinctrl regs in DTB. Please update your firmware.\n");
--
1.8.5.3
Now that we have an ioremapped mpp4 register, get rid of hardcoded
physical addresses. While at it, also remove DOVE_ prefix from those
macros.
Signed-off-by: Sebastian Hesselbarth <[email protected]>
Acked-by: Linus Walleij <[email protected]>
---
Cc: Linus Walleij <[email protected]>
Cc: Jason Cooper <[email protected]>
Cc: Andrew Lunn <[email protected]>
Cc: Gregory Clement <[email protected]>
Cc: [email protected]
Cc: [email protected]
---
drivers/pinctrl/mvebu/pinctrl-dove.c | 53 ++++++++++++++++++------------------
1 file changed, 27 insertions(+), 26 deletions(-)
diff --git a/drivers/pinctrl/mvebu/pinctrl-dove.c b/drivers/pinctrl/mvebu/pinctrl-dove.c
index 902c18f11b94..d48db53957e0 100644
--- a/drivers/pinctrl/mvebu/pinctrl-dove.c
+++ b/drivers/pinctrl/mvebu/pinctrl-dove.c
@@ -46,18 +46,19 @@
#define DOVE_AU1_SPDIFO_GPIO_EN BIT(1)
#define DOVE_NAND_GPIO_EN BIT(0)
#define DOVE_GPIO_LO_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE + 0xd0400)
-#define DOVE_MPP_CTRL4_VIRT_BASE (DOVE_GPIO_LO_VIRT_BASE + 0x40)
-#define DOVE_SPI_GPIO_SEL BIT(5)
-#define DOVE_UART1_GPIO_SEL BIT(4)
-#define DOVE_AU1_GPIO_SEL BIT(3)
-#define DOVE_CAM_GPIO_SEL BIT(2)
-#define DOVE_SD1_GPIO_SEL BIT(1)
-#define DOVE_SD0_GPIO_SEL BIT(0)
/* MPP Base registers */
#define PMU_MPP_GENERAL_CTRL 0x10
#define AU0_AC97_SEL BIT(16)
+/* MPP Control 4 register */
+#define SPI_GPIO_SEL BIT(5)
+#define UART1_GPIO_SEL BIT(4)
+#define AU1_GPIO_SEL BIT(3)
+#define CAM_GPIO_SEL BIT(2)
+#define SD1_GPIO_SEL BIT(1)
+#define SD0_GPIO_SEL BIT(0)
+
#define CONFIG_PMU BIT(4)
static void __iomem *mpp_base;
@@ -115,24 +116,24 @@ static int dove_pmu_mpp_ctrl_set(unsigned pid, unsigned long config)
static int dove_mpp4_ctrl_get(unsigned pid, unsigned long *config)
{
- unsigned long mpp4 = readl(DOVE_MPP_CTRL4_VIRT_BASE);
+ unsigned long mpp4 = readl(mpp4_base);
unsigned long mask;
switch (pid) {
case 24: /* mpp_camera */
- mask = DOVE_CAM_GPIO_SEL;
+ mask = CAM_GPIO_SEL;
break;
case 40: /* mpp_sdio0 */
- mask = DOVE_SD0_GPIO_SEL;
+ mask = SD0_GPIO_SEL;
break;
case 46: /* mpp_sdio1 */
- mask = DOVE_SD1_GPIO_SEL;
+ mask = SD1_GPIO_SEL;
break;
case 58: /* mpp_spi0 */
- mask = DOVE_SPI_GPIO_SEL;
+ mask = SPI_GPIO_SEL;
break;
case 62: /* mpp_uart1 */
- mask = DOVE_UART1_GPIO_SEL;
+ mask = UART1_GPIO_SEL;
break;
default:
return -EINVAL;
@@ -145,24 +146,24 @@ static int dove_mpp4_ctrl_get(unsigned pid, unsigned long *config)
static int dove_mpp4_ctrl_set(unsigned pid, unsigned long config)
{
- unsigned long mpp4 = readl(DOVE_MPP_CTRL4_VIRT_BASE);
+ unsigned long mpp4 = readl(mpp4_base);
unsigned long mask;
switch (pid) {
case 24: /* mpp_camera */
- mask = DOVE_CAM_GPIO_SEL;
+ mask = CAM_GPIO_SEL;
break;
case 40: /* mpp_sdio0 */
- mask = DOVE_SD0_GPIO_SEL;
+ mask = SD0_GPIO_SEL;
break;
case 46: /* mpp_sdio1 */
- mask = DOVE_SD1_GPIO_SEL;
+ mask = SD1_GPIO_SEL;
break;
case 58: /* mpp_spi0 */
- mask = DOVE_SPI_GPIO_SEL;
+ mask = SPI_GPIO_SEL;
break;
case 62: /* mpp_uart1 */
- mask = DOVE_UART1_GPIO_SEL;
+ mask = UART1_GPIO_SEL;
break;
default:
return -EINVAL;
@@ -172,7 +173,7 @@ static int dove_mpp4_ctrl_set(unsigned pid, unsigned long config)
if (config)
mpp4 |= mask;
- writel(mpp4, DOVE_MPP_CTRL4_VIRT_BASE);
+ writel(mpp4, mpp4_base);
return 0;
}
@@ -222,13 +223,13 @@ static int dove_audio0_ctrl_set(unsigned pid, unsigned long config)
static int dove_audio1_ctrl_get(unsigned pid, unsigned long *config)
{
- unsigned long mpp4 = readl(DOVE_MPP_CTRL4_VIRT_BASE);
+ unsigned int mpp4 = readl(mpp4_base);
unsigned long sspc1 = readl(DOVE_SSP_CTRL_STATUS_1);
unsigned long gmpp = readl(DOVE_MPP_GENERAL_VIRT_BASE);
unsigned long gcfg2 = readl(DOVE_GLOBAL_CONFIG_2);
*config = 0;
- if (mpp4 & DOVE_AU1_GPIO_SEL)
+ if (mpp4 & AU1_GPIO_SEL)
*config |= BIT(3);
if (sspc1 & DOVE_SSP_ON_AU1)
*config |= BIT(2);
@@ -248,7 +249,7 @@ static int dove_audio1_ctrl_get(unsigned pid, unsigned long *config)
static int dove_audio1_ctrl_set(unsigned pid, unsigned long config)
{
- unsigned long mpp4 = readl(DOVE_MPP_CTRL4_VIRT_BASE);
+ unsigned int mpp4 = readl(mpp4_base);
unsigned long sspc1 = readl(DOVE_SSP_CTRL_STATUS_1);
unsigned long gmpp = readl(DOVE_MPP_GENERAL_VIRT_BASE);
unsigned long gcfg2 = readl(DOVE_GLOBAL_CONFIG_2);
@@ -259,7 +260,7 @@ static int dove_audio1_ctrl_set(unsigned pid, unsigned long config)
gcfg2 &= ~DOVE_TWSI_OPTION3_GPIO;
gmpp &= ~DOVE_AU1_SPDIFO_GPIO_EN;
sspc1 &= ~DOVE_SSP_ON_AU1;
- mpp4 &= ~DOVE_AU1_GPIO_SEL;
+ mpp4 &= ~AU1_GPIO_SEL;
if (config & BIT(0))
gcfg2 |= DOVE_TWSI_OPTION3_GPIO;
@@ -268,9 +269,9 @@ static int dove_audio1_ctrl_set(unsigned pid, unsigned long config)
if (config & BIT(2))
sspc1 |= DOVE_SSP_ON_AU1;
if (config & BIT(3))
- mpp4 |= DOVE_AU1_GPIO_SEL;
+ mpp4 |= AU1_GPIO_SEL;
- writel(mpp4, DOVE_MPP_CTRL4_VIRT_BASE);
+ writel(mpp4, mpp4_base);
writel(sspc1, DOVE_SSP_CTRL_STATUS_1);
writel(gmpp, DOVE_MPP_GENERAL_VIRT_BASE);
writel(gcfg2, DOVE_GLOBAL_CONFIG_2);
--
1.8.5.3
Dove pinctrl uses additional registers to control MPPs. This patch first
increases existing pinctrl reg property by one register, and then adds
two new ranges for MPP4 and PMU MPP registers.
Signed-off-by: Sebastian Hesselbarth <[email protected]>
---
Cc: Rob Herring <[email protected]>
Cc: Pawel Moll <[email protected]>
Cc: Mark Rutland <[email protected]>
Cc: Ian Campbell <[email protected]>
Cc: Kumar Gala <[email protected]>
Cc: Rob Landley <[email protected]>
Cc: Linus Walleij <[email protected]>
Cc: Russell King <[email protected]>
Cc: Jason Cooper <[email protected]>
Cc: Andrew Lunn <[email protected]>
Cc: Gregory Clement <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
---
arch/arm/boot/dts/dove.dtsi | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/dove.dtsi b/arch/arm/boot/dts/dove.dtsi
index 2b76524f4aa7..c5e90f0287b9 100644
--- a/arch/arm/boot/dts/dove.dtsi
+++ b/arch/arm/boot/dts/dove.dtsi
@@ -390,7 +390,9 @@
pinctrl: pin-ctrl@d0200 {
compatible = "marvell,dove-pinctrl";
- reg = <0xd0200 0x10>;
+ reg = <0xd0200 0x14>,
+ <0xd0440 0x04>,
+ <0xd802c 0x08>;
clocks = <&gate_clk 22>;
pmx_gpio_0: pmx-gpio-0 {
--
1.8.5.3
Now that we have ioremapped pmu_mpp registers, get rid of hardcoded
physical addresses. While at it, also remove DOVE_ prefix from those
macros.
Signed-off-by: Sebastian Hesselbarth <[email protected]>
Acked-by: Linus Walleij <[email protected]>
---
Cc: Linus Walleij <[email protected]>
Cc: Jason Cooper <[email protected]>
Cc: Andrew Lunn <[email protected]>
Cc: Gregory Clement <[email protected]>
Cc: [email protected]
Cc: [email protected]
---
drivers/pinctrl/mvebu/pinctrl-dove.c | 12 +++++++-----
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/drivers/pinctrl/mvebu/pinctrl-dove.c b/drivers/pinctrl/mvebu/pinctrl-dove.c
index d48db53957e0..b1a2e5b828c1 100644
--- a/drivers/pinctrl/mvebu/pinctrl-dove.c
+++ b/drivers/pinctrl/mvebu/pinctrl-dove.c
@@ -31,8 +31,6 @@
#define GC_REGS_OFFS 0xe802c
#define DOVE_SB_REGS_VIRT_BASE IOMEM(0xfde00000)
-#define DOVE_PMU_SIGNAL_SELECT_0 (DOVE_SB_REGS_VIRT_BASE + 0xd802C)
-#define DOVE_PMU_SIGNAL_SELECT_1 (DOVE_SB_REGS_VIRT_BASE + 0xd8030)
#define DOVE_GLOBAL_CONFIG_1 (DOVE_SB_REGS_VIRT_BASE + 0xe802C)
#define DOVE_GLOBAL_CONFIG_1 (DOVE_SB_REGS_VIRT_BASE + 0xe802C)
#define DOVE_TWSI_ENABLE_OPTION1 BIT(7)
@@ -59,6 +57,10 @@
#define SD1_GPIO_SEL BIT(1)
#define SD0_GPIO_SEL BIT(0)
+/* PMU Signal Select registers */
+#define PMU_SIGNAL_SELECT_0 0x00
+#define PMU_SIGNAL_SELECT_1 0x04
+
#define CONFIG_PMU BIT(4)
static void __iomem *mpp_base;
@@ -86,7 +88,7 @@ static int dove_pmu_mpp_ctrl_get(unsigned pid, unsigned long *config)
if ((pmu & BIT(pid)) == 0)
return default_mpp_ctrl_get(mpp_base, pid, config);
- func = readl(DOVE_PMU_SIGNAL_SELECT_0 + off);
+ func = readl(pmu_base + PMU_SIGNAL_SELECT_0 + off);
*config = (func >> shift) & MVEBU_MPP_MASK;
*config |= CONFIG_PMU;
@@ -106,10 +108,10 @@ static int dove_pmu_mpp_ctrl_set(unsigned pid, unsigned long config)
}
writel(pmu | BIT(pid), mpp_base + PMU_MPP_GENERAL_CTRL);
- func = readl(DOVE_PMU_SIGNAL_SELECT_0 + off);
+ func = readl(pmu_base + PMU_SIGNAL_SELECT_0 + off);
func &= ~(MVEBU_MPP_MASK << shift);
func |= (config & MVEBU_MPP_MASK) << shift;
- writel(func, DOVE_PMU_SIGNAL_SELECT_0 + off);
+ writel(func, pmu_base + PMU_SIGNAL_SELECT_0 + off);
return 0;
}
--
1.8.5.3
Now that we have ioremapped mpp base registers, get rid of hardcoded
physical addresses. While at it, also remove DOVE_ prefix from those
macros.
Signed-off-by: Sebastian Hesselbarth <[email protected]>
Acked-by: Linus Walleij <[email protected]>
---
Cc: Linus Walleij <[email protected]>
Cc: Jason Cooper <[email protected]>
Cc: Andrew Lunn <[email protected]>
Cc: Gregory Clement <[email protected]>
Cc: [email protected]
Cc: [email protected]
---
drivers/pinctrl/mvebu/pinctrl-dove.c | 27 ++++++++++++++-------------
1 file changed, 14 insertions(+), 13 deletions(-)
diff --git a/drivers/pinctrl/mvebu/pinctrl-dove.c b/drivers/pinctrl/mvebu/pinctrl-dove.c
index e4f954a78b15..902c18f11b94 100644
--- a/drivers/pinctrl/mvebu/pinctrl-dove.c
+++ b/drivers/pinctrl/mvebu/pinctrl-dove.c
@@ -31,9 +31,6 @@
#define GC_REGS_OFFS 0xe802c
#define DOVE_SB_REGS_VIRT_BASE IOMEM(0xfde00000)
-#define DOVE_MPP_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE + 0xd0200)
-#define DOVE_PMU_MPP_GENERAL_CTRL (DOVE_MPP_VIRT_BASE + 0x10)
-#define DOVE_AU0_AC97_SEL BIT(16)
#define DOVE_PMU_SIGNAL_SELECT_0 (DOVE_SB_REGS_VIRT_BASE + 0xd802C)
#define DOVE_PMU_SIGNAL_SELECT_1 (DOVE_SB_REGS_VIRT_BASE + 0xd8030)
#define DOVE_GLOBAL_CONFIG_1 (DOVE_SB_REGS_VIRT_BASE + 0xe802C)
@@ -57,6 +54,10 @@
#define DOVE_SD1_GPIO_SEL BIT(1)
#define DOVE_SD0_GPIO_SEL BIT(0)
+/* MPP Base registers */
+#define PMU_MPP_GENERAL_CTRL 0x10
+#define AU0_AC97_SEL BIT(16)
+
#define CONFIG_PMU BIT(4)
static void __iomem *mpp_base;
@@ -78,7 +79,7 @@ static int dove_pmu_mpp_ctrl_get(unsigned pid, unsigned long *config)
{
unsigned off = (pid / MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS;
unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS;
- unsigned long pmu = readl(DOVE_PMU_MPP_GENERAL_CTRL);
+ unsigned long pmu = readl(mpp_base + PMU_MPP_GENERAL_CTRL);
unsigned long func;
if ((pmu & BIT(pid)) == 0)
@@ -95,15 +96,15 @@ static int dove_pmu_mpp_ctrl_set(unsigned pid, unsigned long config)
{
unsigned off = (pid / MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS;
unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS;
- unsigned long pmu = readl(DOVE_PMU_MPP_GENERAL_CTRL);
+ unsigned long pmu = readl(mpp_base + PMU_MPP_GENERAL_CTRL);
unsigned long func;
if ((config & CONFIG_PMU) == 0) {
- writel(pmu & ~BIT(pid), DOVE_PMU_MPP_GENERAL_CTRL);
+ writel(pmu & ~BIT(pid), mpp_base + PMU_MPP_GENERAL_CTRL);
return default_mpp_ctrl_set(mpp_base, pid, config);
}
- writel(pmu | BIT(pid), DOVE_PMU_MPP_GENERAL_CTRL);
+ writel(pmu | BIT(pid), mpp_base + PMU_MPP_GENERAL_CTRL);
func = readl(DOVE_PMU_SIGNAL_SELECT_0 + off);
func &= ~(MVEBU_MPP_MASK << shift);
func |= (config & MVEBU_MPP_MASK) << shift;
@@ -200,21 +201,21 @@ static int dove_nand_ctrl_set(unsigned pid, unsigned long config)
static int dove_audio0_ctrl_get(unsigned pid, unsigned long *config)
{
- unsigned long pmu = readl(DOVE_PMU_MPP_GENERAL_CTRL);
+ unsigned long pmu = readl(mpp_base + PMU_MPP_GENERAL_CTRL);
- *config = ((pmu & DOVE_AU0_AC97_SEL) != 0);
+ *config = ((pmu & AU0_AC97_SEL) != 0);
return 0;
}
static int dove_audio0_ctrl_set(unsigned pid, unsigned long config)
{
- unsigned long pmu = readl(DOVE_PMU_MPP_GENERAL_CTRL);
+ unsigned long pmu = readl(mpp_base + PMU_MPP_GENERAL_CTRL);
- pmu &= ~DOVE_AU0_AC97_SEL;
+ pmu &= ~AU0_AC97_SEL;
if (config)
- pmu |= DOVE_AU0_AC97_SEL;
- writel(pmu, DOVE_PMU_MPP_GENERAL_CTRL);
+ pmu |= AU0_AC97_SEL;
+ writel(pmu, mpp_base + PMU_MPP_GENERAL_CTRL);
return 0;
}
--
1.8.5.3
On Mon, Feb 24, 2014 at 9:42 AM, Sebastian Hesselbarth
<[email protected]> wrote:
> This is a patches separated from one sent earlier [1] with just the
> removal of any hard-coded reg addresses from Dove pinctrl stub.
OK let's queue this a while later on top of the other stuff (that I'm working
on applying right now).
> In the meantime, support for new Armada 375/38x was added that also
> contain patches for pinctrl [2].
I applied these first. Please look at the result once I push out the
pinctrl tree with the 375/38x + your v4 series in combination
(let's see how big mess it will be...)
I'm sorry for not applying the nice patches earlier, forcing you to work
on many parallel series like this, hopefully I'll be able to attend to
them this week.
Yours,
Linus Walleij
On 02/24/14 11:17, Linus Walleij wrote:
> On Mon, Feb 24, 2014 at 9:42 AM, Sebastian Hesselbarth
> <[email protected]> wrote:
>
>> This is a patches separated from one sent earlier [1] with just the
>> removal of any hard-coded reg addresses from Dove pinctrl stub.
>
> OK let's queue this a while later on top of the other stuff (that I'm working
> on applying right now).
Ok.
>> In the meantime, support for new Armada 375/38x was added that also
>> contain patches for pinctrl [2].
>
> I applied these first. Please look at the result once I push out the
> pinctrl tree with the 375/38x + your v4 series in combination
> (let's see how big mess it will be...)
>
> I'm sorry for not applying the nice patches earlier, forcing you to work
> on many parallel series like this, hopefully I'll be able to attend to
> them this week.
It's okay, I don't expect you to jump on every patch set we sent
immediately.
Although, I guess instead of applying them separately, it would have
been better to pull them from Jason's stable topic branch. But that is
also up to you and Jason may give valuable hints on how to proceed in
the future.
Thanks anyway!
Sebastian
On Mon, Feb 24, 2014 at 11:20 AM, Sebastian Hesselbarth
<[email protected]> wrote:
> Although, I guess instead of applying them separately, it would have
> been better to pull them from Jason's stable topic branch. But that is
> also up to you and Jason may give valuable hints on how to proceed in
> the future.
Yeah I concluded that I should take a branch pull instead, so I'm
just waiting for an indication of which branch to pull in.
Yours,
Linus Walleij
Sebastian, Linus,
I've now created mvebu/pinctrl-dove for this series. It's based on
v3.14-rc1, and depends on mvebu/pinctrl (which depends on
mvebu/pinctrl-3xx).
I've kept this series in a separate branch in case we encounter an
unforeseen problem with something in here. Then this branch can be
dropped, and /pinctrl-3xx and /pinctrl will still make it in.
So, all patches except 3 and 4 are in mvebu/pinctrl-dove. 3 and 4 are
in mvebu/dt.
thx,
Jason.
On Mon, Feb 24, 2014 at 09:42:52AM +0100, Sebastian Hesselbarth wrote:
> This is a patches separated from one sent earlier [1] with just the
> removal of any hard-coded reg addresses from Dove pinctrl stub. This
> is a required step for Dove to leave mach-dove, hop into mach-mvebu,
> and become part of multi_v7.
>
> In the meantime, support for new Armada 375/38x was added that also
> contain patches for pinctrl [2]. The cleanup patches [3] split off from
> the original patch set take care of pinctrl-related changes for Armada
> 375/38x. Since this patch set now already depends on Armada 375/38x
> pinctrl through those cleanup patches, we take care of Armada 375/38x
> binding updates here, too.
>
> For Dove, this patch set removes all hardcoded addresses from
> pinctrl-dove by either requesting additional resources or a syscon
> provided regmap for global config registers. As this changes existing
> driver to DT binding relationship, all additional resources are probed
> in a backward compatible way. If the corresponding resource cannot be
> found, we derive it from the existing pinctrl resource and warn about
> the old DTB firmware.
>
> Patches 1-2 add or update binding documentation for dove, global config
> syscon, and pinctrl-dove. Patch 2 also documents missing reg property
> requirement for other mvebu pinctrl nodes, including new Armada 375/38x.
>
> Patch 3 and 4 add the new pinctrl reg property values and global config
> register syscon to exisiting dove.dtsi.
>
> Patches 5-6 request either additional reg ranges or the syscon regmap
> in a DT-backward compatible way. If any resource cannot be derived from
> DT node, we warn about an old DTB firmware.
>
> Patches 7-10 finally remove any hardcoded addresses from Dove SoC
> pinctrl driver and use the iomap/regmap resources instead.
>
> DT and binding related patches have also been sent to DT maintainers
> and corresponding lists, additional pinctrl related patches have been
> sent to pinctrl/mvebu maintainers and LAKML only.
>
> This patch set is based on v3.14-rc1 and depends on some cleanup patches
> that will go into v3.15. We have a lot of stuff for v3.15 already in
> mvebu, so I am okay with postponing this and/or the following dove-to-
> mvebu patches for v3.16. As Jason prepares mvebu pinctrl PRs for LinusW,
> it is up to him when to take it with LinusW's Acked-by.
>
> Nevertheless, there is an *unstable* branch based on v3.14-rc1, with
> mvebu/pinctrl-3xx and mvebu/pinctrl merged in at (still named -for-3.15)
>
> https://github.com/shesselba/linux-dove.git unstable/dove-pinctrl-for-3.15_v1
>
> [1] http://www.spinics.net/lists/arm-kernel/msg303496.html
> [2] http://www.spinics.net/lists/arm-kernel/msg306409.html
> [3] http://lkml.org/lkml/2014/2/23/43
>
> Sebastian Hesselbarth (10):
> devicetree: bindings: add missing Marvell Dove SoC documentation
> devicetree: bindings: update MVEBU pinctrl binding documentation
> ARM: dove: add additional pinctrl registers
> ARM: dove: add global-config register node
> pinctrl: mvebu: dove: request additional resources
> pinctrl: mvebu: dove: request syscon regmap for global registers
> pinctrl: mvebu: dove: use remapped mpp base registers
> pinctrl: mvebu: dove: use remapped mpp4 register
> pinctrl: mvebu: dove: use remapped pmu_mpp registers
> pinctrl: mvebu: dove: use global register regmap
>
> .../devicetree/bindings/arm/marvell,dove.txt | 22 ++
> .../pinctrl/marvell,armada-370-pinctrl.txt | 1 +
> .../pinctrl/marvell,armada-375-pinctrl.txt | 1 +
> .../pinctrl/marvell,armada-38x-pinctrl.txt | 1 +
> .../bindings/pinctrl/marvell,armada-xp-pinctrl.txt | 1 +
> .../bindings/pinctrl/marvell,dove-pinctrl.txt | 1 +
> .../bindings/pinctrl/marvell,kirkwood-pinctrl.txt | 1 +
> .../bindings/pinctrl/marvell,mvebu-pinctrl.txt | 2 +-
> arch/arm/boot/dts/dove.dtsi | 10 +-
> drivers/pinctrl/mvebu/Kconfig | 1 +
> drivers/pinctrl/mvebu/pinctrl-dove.c | 286 +++++++++++++--------
> 11 files changed, 213 insertions(+), 114 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/arm/marvell,dove.txt
>
> ---
> Cc: Rob Herring <[email protected]>
> Cc: Pawel Moll <[email protected]>
> Cc: Mark Rutland <[email protected]>
> Cc: Ian Campbell <[email protected]>
> Cc: Kumar Gala <[email protected]>
> Cc: Rob Landley <[email protected]>
> Cc: Linus Walleij <[email protected]>
> Cc: Russell King <[email protected]>
> Cc: Jason Cooper <[email protected]>
> Cc: Andrew Lunn <[email protected]>
> Cc: Gregory Clement <[email protected]>
> Cc: [email protected]
> Cc: [email protected]
> Cc: [email protected]
> Cc: [email protected]
> --
> 1.8.5.3
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> [email protected]
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
On Mon, Feb 24, 2014 at 7:10 PM, Jason Cooper <[email protected]> wrote:
> Sebastian, Linus,
>
> I've now created mvebu/pinctrl-dove for this series. It's based on
> v3.14-rc1, and depends on mvebu/pinctrl (which depends on
> mvebu/pinctrl-3xx).
>
> I've kept this series in a separate branch in case we encounter an
> unforeseen problem with something in here. Then this branch can be
> dropped, and /pinctrl-3xx and /pinctrl will still make it in.
>
> So, all patches except 3 and 4 are in mvebu/pinctrl-dove. 3 and 4 are
> in mvebu/dt.
OK so what should I be pulling in first now?
Yours,
Linus Walleij
On Tue, Feb 25, 2014 at 10:36:54AM +0100, Linus Walleij wrote:
> On Mon, Feb 24, 2014 at 7:10 PM, Jason Cooper <[email protected]> wrote:
>
> > Sebastian, Linus,
> >
> > I've now created mvebu/pinctrl-dove for this series. It's based on
> > v3.14-rc1, and depends on mvebu/pinctrl (which depends on
> > mvebu/pinctrl-3xx).
> >
> > I've kept this series in a separate branch in case we encounter an
> > unforeseen problem with something in here. Then this branch can be
> > dropped, and /pinctrl-3xx and /pinctrl will still make it in.
> >
> > So, all patches except 3 and 4 are in mvebu/pinctrl-dove. 3 and 4 are
> > in mvebu/dt.
>
> OK so what should I be pulling in first now?
Of course I woke up this morning not happy with this :-/ Here's what it
looks like currently:
/v3.14-rc1
|
--+---+---+---+---+ mvebu/pinctrl-3xx
| \
|---+---+---+---+---+---+---+ mvebu/pinctrl
\ \
\---------------------------+---+---+---+ mvebu/pinctrl-dove
Not to scale.
I would prefer to do:
/v3.14-rc1
|
--+---+---+---+---+ mvebu/pinctrl-cleanup
| \
|----------------+--+---+---+ mvebu/pinctrl-3xx
\ \
\----------------+---+---+--+---+---+---+ mvebu/pinctrl-dove
But this would mean moving some patches to branches other than what they
were sent with. The advantage is that /pinctrl-3xx and /pinctrl-dove
don't depend on each other, and only depend on -cleanup. Which is great
if there is something wrong in either branch.
Sebastian, I can cherry-pick the patches around, but you know the code
better than any of us, do you foresee any problems with this scenario?
thx,
Jason.
On 02/25/14 16:16, Jason Cooper wrote:
> On Tue, Feb 25, 2014 at 10:36:54AM +0100, Linus Walleij wrote:
>> On Mon, Feb 24, 2014 at 7:10 PM, Jason Cooper <[email protected]> wrote:
>>> I've now created mvebu/pinctrl-dove for this series. It's based on
>>> v3.14-rc1, and depends on mvebu/pinctrl (which depends on
>>> mvebu/pinctrl-3xx).
>>>
>>> I've kept this series in a separate branch in case we encounter an
>>> unforeseen problem with something in here. Then this branch can be
>>> dropped, and /pinctrl-3xx and /pinctrl will still make it in.
>>>
>>> So, all patches except 3 and 4 are in mvebu/pinctrl-dove. 3 and 4 are
>>> in mvebu/dt.
>>
>> OK so what should I be pulling in first now?
>
> Of course I woke up this morning not happy with this :-/ Here's what it
> looks like currently:
>
> /v3.14-rc1
> |
> --+---+---+---+---+ mvebu/pinctrl-3xx
> | \
> |---+---+---+---+---+---+---+ mvebu/pinctrl
> \ \
> \---------------------------+---+---+---+ mvebu/pinctrl-dove
>
> Not to scale.
>
>
> I would prefer to do:
>
> /v3.14-rc1
> |
> --+---+---+---+---+ mvebu/pinctrl-cleanup
> | \
> |----------------+--+---+---+ mvebu/pinctrl-3xx
> \ \
> \----------------+---+---+--+---+---+---+ mvebu/pinctrl-dove
>
> But this would mean moving some patches to branches other than what they
> were sent with. The advantage is that /pinctrl-3xx and /pinctrl-dove
> don't depend on each other, and only depend on -cleanup. Which is great
> if there is something wrong in either branch.
>
> Sebastian, I can cherry-pick the patches around, but you know the code
> better than any of us, do you foresee any problems with this scenario?
If Thomas agrees, I can rework Armada 375/38x pinctrl stubs to fit on
mvebu/pinctrl. That should allow you to have mvebu/pinctrl-dove
independent of mvebu/pinctrl-3xx.
Not a big deal, I'd just pick 375/38x patches from mvebu/pinctrl and
squash them into mvebu/pinctrl-3xx. The only "issue" is that DT
documentation update patches from mvebu/pinctrl-dove have to be split
too.
I'll prepare the three new branches for you and Thomas to look at
today.
Sebastian
On Tue, Feb 25, 2014 at 04:30:45PM +0100, Sebastian Hesselbarth wrote:
> On 02/25/14 16:16, Jason Cooper wrote:
> >On Tue, Feb 25, 2014 at 10:36:54AM +0100, Linus Walleij wrote:
> >>On Mon, Feb 24, 2014 at 7:10 PM, Jason Cooper <[email protected]> wrote:
> >>>I've now created mvebu/pinctrl-dove for this series. It's based on
> >>>v3.14-rc1, and depends on mvebu/pinctrl (which depends on
> >>>mvebu/pinctrl-3xx).
> >>>
> >>>I've kept this series in a separate branch in case we encounter an
> >>>unforeseen problem with something in here. Then this branch can be
> >>>dropped, and /pinctrl-3xx and /pinctrl will still make it in.
> >>>
> >>>So, all patches except 3 and 4 are in mvebu/pinctrl-dove. 3 and 4 are
> >>>in mvebu/dt.
> >>
> >>OK so what should I be pulling in first now?
> >
> >Of course I woke up this morning not happy with this :-/ Here's what it
> >looks like currently:
> >
> > /v3.14-rc1
> > |
> >--+---+---+---+---+ mvebu/pinctrl-3xx
> > | \
> > |---+---+---+---+---+---+---+ mvebu/pinctrl
> > \ \
> > \---------------------------+---+---+---+ mvebu/pinctrl-dove
> >
> >Not to scale.
> >
> >
> >I would prefer to do:
> >
> > /v3.14-rc1
> > |
> >--+---+---+---+---+ mvebu/pinctrl-cleanup
> > | \
> > |----------------+--+---+---+ mvebu/pinctrl-3xx
> > \ \
> > \----------------+---+---+--+---+---+---+ mvebu/pinctrl-dove
> >
> >But this would mean moving some patches to branches other than what they
> >were sent with. The advantage is that /pinctrl-3xx and /pinctrl-dove
> >don't depend on each other, and only depend on -cleanup. Which is great
> >if there is something wrong in either branch.
> >
> >Sebastian, I can cherry-pick the patches around, but you know the code
> >better than any of us, do you foresee any problems with this scenario?
>
> If Thomas agrees, I can rework Armada 375/38x pinctrl stubs to fit on
> mvebu/pinctrl. That should allow you to have mvebu/pinctrl-dove
> independent of mvebu/pinctrl-3xx.
>
> Not a big deal, I'd just pick 375/38x patches from mvebu/pinctrl and
> squash them into mvebu/pinctrl-3xx. The only "issue" is that DT
> documentation update patches from mvebu/pinctrl-dove have to be split
> too.
>
> I'll prepare the three new branches for you and Thomas to look at
> today.
Ok, great. Thanks Sebastian!
thx,
Jason.
[Cooked down Cc list to relevant people and added Ezequiel who agreed
to test on Armada 375/38x.]
On 02/25/2014 04:43 PM, Jason Cooper wrote:
> On Tue, Feb 25, 2014 at 04:30:45PM +0100, Sebastian Hesselbarth wrote:
>> On 02/25/14 16:16, Jason Cooper wrote:
>>> On Tue, Feb 25, 2014 at 10:36:54AM +0100, Linus Walleij wrote:
>>>> On Mon, Feb 24, 2014 at 7:10 PM, Jason Cooper <[email protected]> wrote:
>>>>> I've now created mvebu/pinctrl-dove for this series. It's based on
>>>>> v3.14-rc1, and depends on mvebu/pinctrl (which depends on
>>>>> mvebu/pinctrl-3xx).
>>>>>
>>>>> I've kept this series in a separate branch in case we encounter an
>>>>> unforeseen problem with something in here. Then this branch can be
>>>>> dropped, and /pinctrl-3xx and /pinctrl will still make it in.
>>>>>
>>>>> So, all patches except 3 and 4 are in mvebu/pinctrl-dove. 3 and 4 are
>>>>> in mvebu/dt.
>>>>
>>>> OK so what should I be pulling in first now?
>>>
>>> Of course I woke up this morning not happy with this :-/ Here's what it
>>> looks like currently:
>>>
>>> /v3.14-rc1
>>> |
>>> --+---+---+---+---+ mvebu/pinctrl-3xx
>>> | \
>>> |---+---+---+---+---+---+---+ mvebu/pinctrl
>>> \ \
>>> \---------------------------+---+---+---+ mvebu/pinctrl-dove
>>>
>>> Not to scale.
>>>
>>>
>>> I would prefer to do:
>>>
>>> /v3.14-rc1
>>> |
>>> --+---+---+---+---+ mvebu/pinctrl-cleanup
>>> | \
>>> |----------------+--+---+---+ mvebu/pinctrl-3xx
>>> \ \
>>> \----------------+---+---+--+---+---+---+ mvebu/pinctrl-dove
>>>
>>> But this would mean moving some patches to branches other than what they
>>> were sent with. The advantage is that /pinctrl-3xx and /pinctrl-dove
>>> don't depend on each other, and only depend on -cleanup. Which is great
>>> if there is something wrong in either branch.
>>>
>>> Sebastian, I can cherry-pick the patches around, but you know the code
>>> better than any of us, do you foresee any problems with this scenario?
>>
>> If Thomas agrees, I can rework Armada 375/38x pinctrl stubs to fit on
>> mvebu/pinctrl. That should allow you to have mvebu/pinctrl-dove
>> independent of mvebu/pinctrl-3xx.
>>
>> Not a big deal, I'd just pick 375/38x patches from mvebu/pinctrl and
>> squash them into mvebu/pinctrl-3xx. The only "issue" is that DT
>> documentation update patches from mvebu/pinctrl-dove have to be split
>> too.
>>
>> I'll prepare the three new branches for you and Thomas to look at
>> today.
>
> Ok, great. Thanks Sebastian!
Ok, branches based on v3.14-rc1 with above dependencies can be found on:
https://github.com/shesselba/linux-dove.git for-mvebu/pinctrl-cleanup
https://github.com/shesselba/linux-dove.git for-mvebu/pinctrl-3xx
https://github.com/shesselba/linux-dove.git for-mvebu/pinctrl-dove
and an a-i-o branch to ease testing:
https://github.com/shesselba/linux-dove.git for-mvebu/all-merged-in
@Jason: I guess we should resend all three branches as individual
patches on list somehow.
Sebastian
Sebastian,
On Tue, Feb 25, 2014 at 08:23:35PM +0100, Sebastian Hesselbarth wrote:
> [Cooked down Cc list to relevant people and added Ezequiel who agreed
> to test on Armada 375/38x.]
>
> On 02/25/2014 04:43 PM, Jason Cooper wrote:
> >On Tue, Feb 25, 2014 at 04:30:45PM +0100, Sebastian Hesselbarth wrote:
> >>On 02/25/14 16:16, Jason Cooper wrote:
> >>>On Tue, Feb 25, 2014 at 10:36:54AM +0100, Linus Walleij wrote:
> >>>>On Mon, Feb 24, 2014 at 7:10 PM, Jason Cooper <[email protected]> wrote:
> >>>>>I've now created mvebu/pinctrl-dove for this series. It's based on
> >>>>>v3.14-rc1, and depends on mvebu/pinctrl (which depends on
> >>>>>mvebu/pinctrl-3xx).
> >>>>>
> >>>>>I've kept this series in a separate branch in case we encounter an
> >>>>>unforeseen problem with something in here. Then this branch can be
> >>>>>dropped, and /pinctrl-3xx and /pinctrl will still make it in.
> >>>>>
> >>>>>So, all patches except 3 and 4 are in mvebu/pinctrl-dove. 3 and 4 are
> >>>>>in mvebu/dt.
> >>>>
> >>>>OK so what should I be pulling in first now?
> >>>
> >>>Of course I woke up this morning not happy with this :-/ Here's what it
> >>>looks like currently:
> >>>
> >>> /v3.14-rc1
> >>> |
> >>>--+---+---+---+---+ mvebu/pinctrl-3xx
> >>> | \
> >>> |---+---+---+---+---+---+---+ mvebu/pinctrl
> >>> \ \
> >>> \---------------------------+---+---+---+ mvebu/pinctrl-dove
> >>>
> >>>Not to scale.
> >>>
> >>>
> >>>I would prefer to do:
> >>>
> >>> /v3.14-rc1
> >>> |
> >>>--+---+---+---+---+ mvebu/pinctrl-cleanup
> >>> | \
> >>> |----------------+--+---+---+ mvebu/pinctrl-3xx
> >>> \ \
> >>> \----------------+---+---+--+---+---+---+ mvebu/pinctrl-dove
> >>>
> >>>But this would mean moving some patches to branches other than what they
> >>>were sent with. The advantage is that /pinctrl-3xx and /pinctrl-dove
> >>>don't depend on each other, and only depend on -cleanup. Which is great
> >>>if there is something wrong in either branch.
> >>>
> >>>Sebastian, I can cherry-pick the patches around, but you know the code
> >>>better than any of us, do you foresee any problems with this scenario?
> >>
> >>If Thomas agrees, I can rework Armada 375/38x pinctrl stubs to fit on
> >>mvebu/pinctrl. That should allow you to have mvebu/pinctrl-dove
> >>independent of mvebu/pinctrl-3xx.
> >>
> >>Not a big deal, I'd just pick 375/38x patches from mvebu/pinctrl and
> >>squash them into mvebu/pinctrl-3xx. The only "issue" is that DT
> >>documentation update patches from mvebu/pinctrl-dove have to be split
> >>too.
> >>
> >>I'll prepare the three new branches for you and Thomas to look at
> >>today.
> >
> >Ok, great. Thanks Sebastian!
>
> Ok, branches based on v3.14-rc1 with above dependencies can be found on:
>
> https://github.com/shesselba/linux-dove.git for-mvebu/pinctrl-cleanup
> https://github.com/shesselba/linux-dove.git for-mvebu/pinctrl-3xx
> https://github.com/shesselba/linux-dove.git for-mvebu/pinctrl-dove
>
> and an a-i-o branch to ease testing:
>
> https://github.com/shesselba/linux-dove.git for-mvebu/all-merged-in
>
> @Jason: I guess we should resend all three branches as individual
> patches on list somehow.
Damn! So close!
$ git diff mvebu/pinctrl-dove shesselba/for-mvebu/all-merged-in
diff --git a/arch/arm/boot/dts/dove.dtsi b/arch/arm/boot/dts/dove.dtsi
index 2b76524f4aa7..eeb08edb67ac 100644
--- a/arch/arm/boot/dts/dove.dtsi
+++ b/arch/arm/boot/dts/dove.dtsi
@@ -390,7 +390,9 @@
pinctrl: pin-ctrl@d0200 {
compatible = "marvell,dove-pinctrl";
- reg = <0xd0200 0x10>;
+ reg = <0xd0200 0x14>,
+ <0xd0440 0x04>,
+ <0xd802c 0x08>;
clocks = <&gate_clk 22>;
pmx_gpio_0: pmx-gpio-0 {
@@ -614,6 +616,12 @@
interrupts = <5>;
};
+ gconf: global-config@e802c {
+ compatible = "marvell,dove-global-config",
+ "syscon";
+ reg = <0xe802c 0x14>;
+ };
+
gpio2: gpio-ctrl@e8400 {
compatible = "marvell,orion-gpio";
#gpio-cells = <2>;
diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-38x.c b/drivers/pinctrl/mvebu/pinctrl-armada-38x.c
index 322ca8cb63eb..1049f82fb62f 100644
--- a/drivers/pinctrl/mvebu/pinctrl-armada-38x.c
+++ b/drivers/pinctrl/mvebu/pinctrl-armada-38x.c
@@ -428,7 +428,6 @@ static int armada_38x_pinctrl_probe(struct platform_device *pdev)
return PTR_ERR(mpp_base);
soc->variant = (unsigned) match->data & 0xff;
-
soc->controls = armada_38x_mpp_controls;
soc->ncontrols = ARRAY_SIZE(armada_38x_mpp_controls);
soc->gpioranges = armada_38x_mpp_gpio_ranges;
If you can drop the dtsi changes (I have them in mvebu/dt), and fix the
whitespace change, then we can merge them as is.
Thanks a ton for handling this!
thx,
Jason.
On 02/25/2014 09:04 PM, Jason Cooper wrote:
> Sebastian,
>
> On Tue, Feb 25, 2014 at 08:23:35PM +0100, Sebastian Hesselbarth wrote:
>> [Cooked down Cc list to relevant people and added Ezequiel who agreed
>> to test on Armada 375/38x.]
>>
>> On 02/25/2014 04:43 PM, Jason Cooper wrote:
>>> On Tue, Feb 25, 2014 at 04:30:45PM +0100, Sebastian Hesselbarth wrote:
>>>> On 02/25/14 16:16, Jason Cooper wrote:
>>>>> On Tue, Feb 25, 2014 at 10:36:54AM +0100, Linus Walleij wrote:
>>>>>> On Mon, Feb 24, 2014 at 7:10 PM, Jason Cooper <[email protected]> wrote:
>>>>>>> I've now created mvebu/pinctrl-dove for this series. It's based on
>>>>>>> v3.14-rc1, and depends on mvebu/pinctrl (which depends on
>>>>>>> mvebu/pinctrl-3xx).
>>>>>>>
>>>>>>> I've kept this series in a separate branch in case we encounter an
>>>>>>> unforeseen problem with something in here. Then this branch can be
>>>>>>> dropped, and /pinctrl-3xx and /pinctrl will still make it in.
>>>>>>>
>>>>>>> So, all patches except 3 and 4 are in mvebu/pinctrl-dove. 3 and 4 are
>>>>>>> in mvebu/dt.
>>>>>>
>>>>>> OK so what should I be pulling in first now?
>>>>>
>>>>> Of course I woke up this morning not happy with this :-/ Here's what it
>>>>> looks like currently:
>>>>>
>>>>> /v3.14-rc1
>>>>> |
>>>>> --+---+---+---+---+ mvebu/pinctrl-3xx
>>>>> | \
>>>>> |---+---+---+---+---+---+---+ mvebu/pinctrl
>>>>> \ \
>>>>> \---------------------------+---+---+---+ mvebu/pinctrl-dove
>>>>>
>>>>> Not to scale.
>>>>>
>>>>>
>>>>> I would prefer to do:
>>>>>
>>>>> /v3.14-rc1
>>>>> |
>>>>> --+---+---+---+---+ mvebu/pinctrl-cleanup
>>>>> | \
>>>>> |----------------+--+---+---+ mvebu/pinctrl-3xx
>>>>> \ \
>>>>> \----------------+---+---+--+---+---+---+ mvebu/pinctrl-dove
>>>>>
>>>>> But this would mean moving some patches to branches other than what they
>>>>> were sent with. The advantage is that /pinctrl-3xx and /pinctrl-dove
>>>>> don't depend on each other, and only depend on -cleanup. Which is great
>>>>> if there is something wrong in either branch.
>>>>>
>>>>> Sebastian, I can cherry-pick the patches around, but you know the code
>>>>> better than any of us, do you foresee any problems with this scenario?
>>>>
>>>> If Thomas agrees, I can rework Armada 375/38x pinctrl stubs to fit on
>>>> mvebu/pinctrl. That should allow you to have mvebu/pinctrl-dove
>>>> independent of mvebu/pinctrl-3xx.
>>>>
>>>> Not a big deal, I'd just pick 375/38x patches from mvebu/pinctrl and
>>>> squash them into mvebu/pinctrl-3xx. The only "issue" is that DT
>>>> documentation update patches from mvebu/pinctrl-dove have to be split
>>>> too.
>>>>
>>>> I'll prepare the three new branches for you and Thomas to look at
>>>> today.
>>>
>>> Ok, great. Thanks Sebastian!
>>
>> Ok, branches based on v3.14-rc1 with above dependencies can be found on:
>>
>> https://github.com/shesselba/linux-dove.git for-mvebu/pinctrl-cleanup
>> https://github.com/shesselba/linux-dove.git for-mvebu/pinctrl-3xx
>> https://github.com/shesselba/linux-dove.git for-mvebu/pinctrl-dove
>>
>> and an a-i-o branch to ease testing:
>>
>> https://github.com/shesselba/linux-dove.git for-mvebu/all-merged-in
>>
>> @Jason: I guess we should resend all three branches as individual
>> patches on list somehow.
>
> Damn! So close!
>
> $ git diff mvebu/pinctrl-dove shesselba/for-mvebu/all-merged-in
> diff --git a/arch/arm/boot/dts/dove.dtsi b/arch/arm/boot/dts/dove.dtsi
> index 2b76524f4aa7..eeb08edb67ac 100644
> --- a/arch/arm/boot/dts/dove.dtsi
> +++ b/arch/arm/boot/dts/dove.dtsi
> @@ -390,7 +390,9 @@
>
> pinctrl: pin-ctrl@d0200 {
> compatible = "marvell,dove-pinctrl";
> - reg = <0xd0200 0x10>;
> + reg = <0xd0200 0x14>,
> + <0xd0440 0x04>,
> + <0xd802c 0x08>;
> clocks = <&gate_clk 22>;
>
> pmx_gpio_0: pmx-gpio-0 {
> @@ -614,6 +616,12 @@
> interrupts = <5>;
> };
>
> + gconf: global-config@e802c {
> + compatible = "marvell,dove-global-config",
> + "syscon";
> + reg = <0xe802c 0x14>;
> + };
> +
> gpio2: gpio-ctrl@e8400 {
> compatible = "marvell,orion-gpio";
> #gpio-cells = <2>;
> diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-38x.c b/drivers/pinctrl/mvebu/pinctrl-armada-38x.c
> index 322ca8cb63eb..1049f82fb62f 100644
> --- a/drivers/pinctrl/mvebu/pinctrl-armada-38x.c
> +++ b/drivers/pinctrl/mvebu/pinctrl-armada-38x.c
> @@ -428,7 +428,6 @@ static int armada_38x_pinctrl_probe(struct platform_device *pdev)
> return PTR_ERR(mpp_base);
>
> soc->variant = (unsigned) match->data & 0xff;
> -
> soc->controls = armada_38x_mpp_controls;
> soc->ncontrols = ARRAY_SIZE(armada_38x_mpp_controls);
> soc->gpioranges = armada_38x_mpp_gpio_ranges;
>
>
> If you can drop the dtsi changes (I have them in mvebu/dt), and fix the
> whitespace change, then we can merge them as is.
Done.
> Thanks a ton for handling this!
No problem, thanks for resolving the dependencies :)
Sebastian
Linus,
On Tue, Feb 25, 2014 at 10:36:54AM +0100, Linus Walleij wrote:
> On Mon, Feb 24, 2014 at 7:10 PM, Jason Cooper <[email protected]> wrote:
>
> > Sebastian, Linus,
> >
> > I've now created mvebu/pinctrl-dove for this series. It's based on
> > v3.14-rc1, and depends on mvebu/pinctrl (which depends on
> > mvebu/pinctrl-3xx).
> >
> > I've kept this series in a separate branch in case we encounter an
> > unforeseen problem with something in here. Then this branch can be
> > dropped, and /pinctrl-3xx and /pinctrl will still make it in.
> >
> > So, all patches except 3 and 4 are in mvebu/pinctrl-dove. 3 and 4 are
> > in mvebu/dt.
>
> OK so what should I be pulling in first now?
Sebastian has now re-organized the branches as I asked, and I confirmed
that the final result is the exact same as mine (diff is null).
Usually when I submit pull requests to arm-soc, they like to see the
branches. That way if there is an error in one of them, they just drop
the one branch and the others remain.
Would you like them the same way? If so, I'll send the pulls to you
tomorrow. Otherwise, I'll wait a few more days to let things shake out
and then send you one request with the branches merged.
thx,
Jason.
On Wed, Feb 26, 2014 at 1:09 AM, Jason Cooper <[email protected]> wrote:
> Sebastian has now re-organized the branches as I asked, and I confirmed
> that the final result is the exact same as mine (diff is null).
Okay!
> Usually when I submit pull requests to arm-soc, they like to see the
> branches. That way if there is an error in one of them, they just drop
> the one branch and the others remain.
>
> Would you like them the same way? If so, I'll send the pulls to you
> tomorrow.
Send me one big branch with everything on it. Actually, I'd prefer
to pull it in, rebase and sign off each patch individually in my tree
if that is not causing you problems. That way it is visible that the
patches were funneled through pin control.
Yours,
Linus Walleij
On Wed, Feb 26, 2014 at 10:43:45AM +0100, Linus Walleij wrote:
> On Wed, Feb 26, 2014 at 1:09 AM, Jason Cooper <[email protected]> wrote:
>
> > Sebastian has now re-organized the branches as I asked, and I confirmed
> > that the final result is the exact same as mine (diff is null).
>
> Okay!
>
> > Usually when I submit pull requests to arm-soc, they like to see the
> > branches. That way if there is an error in one of them, they just drop
> > the one branch and the others remain.
> >
> > Would you like them the same way? If so, I'll send the pulls to you
> > tomorrow.
>
> Send me one big branch with everything on it.
Sure.
> Actually, I'd prefer to pull it in, rebase and sign off each patch
> individually in my tree if that is not causing you problems.
Actually, that would mess us up pretty badly. :( One of the reasons we
take the effort to base off of -rc1 and create stable topic branches is
so that the commit IDs don't change. This way, all the patches needed
to boot the new mvebu SoCs (code intended for v3.15) can be boot tested
from the mvebu/for-next branch, which is merge-tested and randconfig
tested in linux-next. This all happens _before_ the merge window for
v3.15.
There have been huge benefits since we started doing this. In fact,
just yesterday I committed three patches to fix issues discovered as a
result of this process:
edd9d3cffc90 watchdog: orion_wdt: Use %pa to print 'phys_addr_t'
1b82af4f1749 ARM: kirkwood: select dtbs based on SoC
a02dd0271d01 ARM: mvebu: select dtbs from MACH_ARMADA_*
The first was discovered by Olof's autobuilder, and the last two were
discovered by Kevin's boot farm.
If you rebase the branch, I'll have to drop it from our for-next tree to
prevent conflicts in linux-next with your -next branch. Which means no
one will be able to boot test the new SoCs without going through a lot
of hunting to re-collect all the branches.
The advantage of having mvebu/for-next in addition to linux-next is that
should there be a boot failure, we can quickly determine whether it is a
result of the mvebu code (mvebu/for-next fails) or something outside of
mvebu (only linux-next fails).
By keeping the commit IDs the same, the same branch can be in multiple
trees all getting merged into linux-next. Currently, mvebu does this
with arm-soc, clk, and irqchip. In those cases, those maintainers are
the ones who send the pull requests to Linus, not us.
> That way it is visible that the patches were funneled through pin
> control.
I'm a little confused by this. Once you merge the branch into one of
yours, that merge commit is a part of the history. In fact, the branch
is still intact for eternity. So by merging the branch, adding other
patches, and signing the tip of the result, it should be clear it came
through pinctrl, no?
thx,
Jason.
On Tue, Feb 25, 2014 at 03:04:47PM -0500, Jason Cooper wrote:
> On Tue, Feb 25, 2014 at 08:23:35PM +0100, Sebastian Hesselbarth wrote:
> > [Cooked down Cc list to relevant people and added Ezequiel who agreed
> > to test on Armada 375/38x.]
> >
[..]
>
> If you can drop the dtsi changes (I have them in mvebu/dt), and fix the
> whitespace change, then we can merge them as is.
>
Tested for-next on Armada 375 and Armada 385 development boards. The
pinctrl debugfs looks correct.
I've been using for-next for a couple days now, without issues.
--
Ezequiel García, Free Electrons
Embedded Linux, Kernel and Android Engineering
http://free-electrons.com
On Thu, Feb 27, 2014 at 10:38:32AM -0300, Ezequiel Garcia wrote:
> On Tue, Feb 25, 2014 at 03:04:47PM -0500, Jason Cooper wrote:
> > On Tue, Feb 25, 2014 at 08:23:35PM +0100, Sebastian Hesselbarth wrote:
> > > [Cooked down Cc list to relevant people and added Ezequiel who agreed
> > > to test on Armada 375/38x.]
> > >
> [..]
> >
> > If you can drop the dtsi changes (I have them in mvebu/dt), and fix the
> > whitespace change, then we can merge them as is.
> >
>
> Tested for-next on Armada 375 and Armada 385 development boards. The
> pinctrl debugfs looks correct.
>
> I've been using for-next for a couple days now, without issues.
Great! Thanks, Ezequiel!
thx,
Jason.