The family of PCF857x-compatible chips describe 8-bit i2c i/o expanders.
Allow the user to specify names for the 8 gpio lines.
Signed-off-by: Trevor Woerner <[email protected]>
---
Documentation/devicetree/bindings/gpio/nxp,pcf8575.yaml | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/gpio/nxp,pcf8575.yaml b/Documentation/devicetree/bindings/gpio/nxp,pcf8575.yaml
index f0ff66c4c74e..81b825a4353c 100644
--- a/Documentation/devicetree/bindings/gpio/nxp,pcf8575.yaml
+++ b/Documentation/devicetree/bindings/gpio/nxp,pcf8575.yaml
@@ -39,6 +39,10 @@ properties:
reg:
maxItems: 1
+ gpio-line-names:
+ minItems: 1
+ maxItems: 8
+
gpio-controller: true
'#gpio-cells':
--
2.36.0.rc2.17.g4027e30c53
The family of PCF857x-compatible chips describe 8-bit i2c i/o expanders.
Allow the user to specify names for the 8 gpio lines.
Signed-off-by: Trevor Woerner <[email protected]>
---
changes in v2:
- the original said [PATCH 1/2], there is no 2/2
---
Documentation/devicetree/bindings/gpio/nxp,pcf8575.yaml | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/gpio/nxp,pcf8575.yaml b/Documentation/devicetree/bindings/gpio/nxp,pcf8575.yaml
index f0ff66c4c74e..81b825a4353c 100644
--- a/Documentation/devicetree/bindings/gpio/nxp,pcf8575.yaml
+++ b/Documentation/devicetree/bindings/gpio/nxp,pcf8575.yaml
@@ -39,6 +39,10 @@ properties:
reg:
maxItems: 1
+ gpio-line-names:
+ minItems: 1
+ maxItems: 8
+
gpio-controller: true
'#gpio-cells':
--
2.36.0.rc2.17.g4027e30c53
On 09/02/2023 05:31, Trevor Woerner wrote:
> The family of PCF857x-compatible chips describe 8-bit i2c i/o expanders.
> Allow the user to specify names for the 8 gpio lines.
PCA9675 is 16-bit and has 16 outputs/
Best regards,
Krzysztof
The devices described in this binding represent 8-bit and 16-bit i2c i/o
expanders. Allow the user to specify names for up to 16 gpio lines.
Signed-off-by: Trevor Woerner <[email protected]>
---
changes since v2:
- expand maxItems to 16 to accommodate that some of the io expanders
covered in this schema are 16-bit (e.g. PCA9675)
changes since v1:
- the original said [PATCH 1/2], there is no 2/2
(or at least there wasn't back then)
---
Documentation/devicetree/bindings/gpio/nxp,pcf8575.yaml | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/gpio/nxp,pcf8575.yaml b/Documentation/devicetree/bindings/gpio/nxp,pcf8575.yaml
index f0ff66c4c74e..3718103e966a 100644
--- a/Documentation/devicetree/bindings/gpio/nxp,pcf8575.yaml
+++ b/Documentation/devicetree/bindings/gpio/nxp,pcf8575.yaml
@@ -39,6 +39,10 @@ properties:
reg:
maxItems: 1
+ gpio-line-names:
+ minItems: 1
+ maxItems: 16
+
gpio-controller: true
'#gpio-cells':
--
2.36.0.rc2.17.g4027e30c53
On 10/02/2023 03:51, Trevor Woerner wrote:
> The devices described in this binding represent 8-bit and 16-bit i2c i/o
> expanders. Allow the user to specify names for up to 16 gpio lines.
>
> Signed-off-by: Trevor Woerner <[email protected]>
> ---
> changes since v2:
Acked-by: Krzysztof Kozlowski <[email protected]>
Best regards,
Krzysztof
On Fri, Feb 10, 2023 at 3:51 AM Trevor Woerner <[email protected]> wrote:
> The devices described in this binding represent 8-bit and 16-bit i2c i/o
> expanders. Allow the user to specify names for up to 16 gpio lines.
>
> Signed-off-by: Trevor Woerner <[email protected]>
> ---
> changes since v2:
> - expand maxItems to 16 to accommodate that some of the io expanders
> covered in this schema are 16-bit (e.g. PCA9675)
This v3 patch applied for the next kernel (v6.4).
Don't expect to see it in linux-next until after the merge
window. I applied it so I don't forget about it later.
Yours,
Linus Walleij