Factor out ti-sn65dsi86 edp bridge as a separate dts fragment.
This helps us introduce the second source edp bridge later.
Signed-off-by: Philip Chen <[email protected]>
Reviewed-by: Stephen Boyd <[email protected]>
Reviewed-by: Doug Anderson <[email protected]>
---
Changes in v3:
- Include the bridge dts fragment for homestar
.../boot/dts/qcom/sc7180-trogdor-coachz.dtsi | 1 +
.../dts/qcom/sc7180-trogdor-homestar.dtsi | 1 +
.../boot/dts/qcom/sc7180-trogdor-lazor.dtsi | 1 +
.../boot/dts/qcom/sc7180-trogdor-pompom.dtsi | 1 +
.../arm64/boot/dts/qcom/sc7180-trogdor-r1.dts | 1 +
.../dts/qcom/sc7180-trogdor-ti-sn65dsi86.dtsi | 90 +++++++++++++++++++
arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi | 86 ------------------
7 files changed, 95 insertions(+), 86 deletions(-)
create mode 100644 arch/arm64/boot/dts/qcom/sc7180-trogdor-ti-sn65dsi86.dtsi
diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz.dtsi
index 81098aa9687b..14ed09f30a73 100644
--- a/arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz.dtsi
@@ -11,6 +11,7 @@
ap_h1_spi: &spi0 {};
#include "sc7180-trogdor.dtsi"
+#include "sc7180-trogdor-ti-sn65dsi86.dtsi"
/* Deleted nodes from trogdor.dtsi */
diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar.dtsi
index 382f8c6f1576..4ab890b2a1d4 100644
--- a/arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar.dtsi
@@ -11,6 +11,7 @@
ap_h1_spi: &spi0 {};
#include "sc7180-trogdor.dtsi"
+#include "sc7180-trogdor-ti-sn65dsi86.dtsi"
/ {
/* BOARD-SPECIFIC TOP LEVEL NODES */
diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor.dtsi
index 86c9e750995f..8b79fbb75756 100644
--- a/arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor.dtsi
@@ -11,6 +11,7 @@
ap_h1_spi: &spi0 {};
#include "sc7180-trogdor.dtsi"
+#include "sc7180-trogdor-ti-sn65dsi86.dtsi"
&ap_sar_sensor {
semtech,cs0-ground;
diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom.dtsi
index b7b5264888b7..e90f99ef5323 100644
--- a/arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom.dtsi
@@ -11,6 +11,7 @@
ap_h1_spi: &spi0 {};
#include "sc7180-trogdor.dtsi"
+#include "sc7180-trogdor-ti-sn65dsi86.dtsi"
/ {
thermal-zones {
diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-r1.dts b/arch/arm64/boot/dts/qcom/sc7180-trogdor-r1.dts
index 2b522f9e0d8f..457c25499863 100644
--- a/arch/arm64/boot/dts/qcom/sc7180-trogdor-r1.dts
+++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor-r1.dts
@@ -13,6 +13,7 @@
ap_h1_spi: &spi0 {};
#include "sc7180-trogdor.dtsi"
+#include "sc7180-trogdor-ti-sn65dsi86.dtsi"
/ {
model = "Google Trogdor (rev1+)";
diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-ti-sn65dsi86.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor-ti-sn65dsi86.dtsi
new file mode 100644
index 000000000000..97d5e45abd1d
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor-ti-sn65dsi86.dtsi
@@ -0,0 +1,90 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Google Trogdor dts fragment for the boards with TI sn65dsi86 edp bridge
+ *
+ * Copyright 2021 Google LLC.
+ */
+
+&dsi0_out {
+ remote-endpoint = <&sn65dsi86_in>;
+ data-lanes = <0 1 2 3>;
+};
+
+edp_brij_i2c: &i2c2 {
+ status = "okay";
+ clock-frequency = <400000>;
+
+ sn65dsi86_bridge: bridge@2d {
+ compatible = "ti,sn65dsi86";
+ reg = <0x2d>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&edp_brij_en>, <&edp_brij_irq>;
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-parent = <&tlmm>;
+ interrupts = <11 IRQ_TYPE_LEVEL_HIGH>;
+
+ enable-gpios = <&tlmm 104 GPIO_ACTIVE_HIGH>;
+
+ vpll-supply = <&pp1800_edp_vpll>;
+ vccio-supply = <&pp1800_brij_vccio>;
+ vcca-supply = <&pp1200_brij>;
+ vcc-supply = <&pp1200_brij>;
+
+ clocks = <&rpmhcc RPMH_LN_BB_CLK3>;
+ clock-names = "refclk";
+
+ no-hpd;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ sn65dsi86_in: endpoint {
+ remote-endpoint = <&dsi0_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ sn65dsi86_out: endpoint {
+ data-lanes = <0 1>;
+ remote-endpoint = <&panel_in_edp>;
+ };
+ };
+ };
+
+ aux-bus {
+ panel: panel {
+ /* Compatible will be filled in per-board */
+ power-supply = <&pp3300_dx_edp>;
+ backlight = <&backlight>;
+ hpd-gpios = <&sn65dsi86_bridge 2 GPIO_ACTIVE_HIGH>;
+
+ port {
+ panel_in_edp: endpoint {
+ remote-endpoint = <&sn65dsi86_out>;
+ };
+ };
+ };
+ };
+ };
+};
+
+&tlmm {
+ edp_brij_irq: edp-brij-irq {
+ pinmux {
+ pins = "gpio11";
+ function = "gpio";
+ };
+
+ pinconf {
+ pins = "gpio11";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi
index 4d1561959f37..d4f4441179fc 100644
--- a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi
@@ -601,15 +601,6 @@ &camcc {
&dsi0 {
status = "okay";
vdda-supply = <&vdda_mipi_dsi0_1p2>;
-
- ports {
- port@1 {
- endpoint {
- remote-endpoint = <&sn65dsi86_in>;
- data-lanes = <0 1 2 3>;
- };
- };
- };
};
&dsi_phy {
@@ -617,70 +608,6 @@ &dsi_phy {
vdds-supply = <&vdda_mipi_dsi0_pll>;
};
-edp_brij_i2c: &i2c2 {
- status = "okay";
- clock-frequency = <400000>;
-
- sn65dsi86_bridge: bridge@2d {
- compatible = "ti,sn65dsi86";
- reg = <0x2d>;
- pinctrl-names = "default";
- pinctrl-0 = <&edp_brij_en>, <&edp_brij_irq>;
- gpio-controller;
- #gpio-cells = <2>;
-
- interrupt-parent = <&tlmm>;
- interrupts = <11 IRQ_TYPE_LEVEL_HIGH>;
-
- enable-gpios = <&tlmm 104 GPIO_ACTIVE_HIGH>;
-
- vpll-supply = <&pp1800_edp_vpll>;
- vccio-supply = <&pp1800_brij_vccio>;
- vcca-supply = <&pp1200_brij>;
- vcc-supply = <&pp1200_brij>;
-
- clocks = <&rpmhcc RPMH_LN_BB_CLK3>;
- clock-names = "refclk";
-
- no-hpd;
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
- sn65dsi86_in: endpoint {
- remote-endpoint = <&dsi0_out>;
- };
- };
-
- port@1 {
- reg = <1>;
- sn65dsi86_out: endpoint {
- data-lanes = <0 1>;
- remote-endpoint = <&panel_in_edp>;
- };
- };
- };
-
- aux-bus {
- panel: panel {
- /* Compatible will be filled in per-board */
- power-supply = <&pp3300_dx_edp>;
- backlight = <&backlight>;
- hpd-gpios = <&sn65dsi86_bridge 2 GPIO_ACTIVE_HIGH>;
-
- port {
- panel_in_edp: endpoint {
- remote-endpoint = <&sn65dsi86_out>;
- };
- };
- };
- };
- };
-};
-
ap_sar_sensor_i2c: &i2c5 {
clock-frequency = <400000>;
@@ -1233,19 +1160,6 @@ pinconf {
};
};
- edp_brij_irq: edp-brij-irq {
- pinmux {
- pins = "gpio11";
- function = "gpio";
- };
-
- pinconf {
- pins = "gpio11";
- drive-strength = <2>;
- bias-pull-down;
- };
- };
-
en_pp3300_codec: en-pp3300-codec {
pinmux {
pins = "gpio83";
--
2.33.0.882.g93a45727a2-goog
Add a dts fragment file to support the sc7180 boards with the second
source edp bridge, Parade ps8640.
Signed-off-by: Philip Chen <[email protected]>
---
Changes in v3:
- Set gpio32 active high
- Rename edp-bridge to bridge to align with ti-sn65 dts
- Remove the unused label 'aux_bus'
Changes in v2:
- Add the definition of edp_brij_i2c and some other properties to
ps8640 dts, making it match ti-sn65dsi86 dts better
.../qcom/sc7180-trogdor-parade-ps8640.dtsi | 109 ++++++++++++++++++
1 file changed, 109 insertions(+)
create mode 100644 arch/arm64/boot/dts/qcom/sc7180-trogdor-parade-ps8640.dtsi
diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-parade-ps8640.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor-parade-ps8640.dtsi
new file mode 100644
index 000000000000..a3d69540d4e4
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor-parade-ps8640.dtsi
@@ -0,0 +1,109 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Google Trogdor dts fragment for the boards with Parade ps8640 edp bridge
+ *
+ * Copyright 2021 Google LLC.
+ */
+
+/ {
+ pp3300_brij_ps8640: pp3300-brij-ps8640 {
+ compatible = "regulator-fixed";
+ status = "okay";
+ regulator-name = "pp3300_brij_ps8640";
+
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ gpio = <&tlmm 32 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&en_pp3300_edp_brij_ps8640>;
+
+ vin-supply = <&pp3300_a>;
+ };
+};
+
+&dsi0_out {
+ remote-endpoint = <&ps8640_in>;
+};
+
+edp_brij_i2c: &i2c2 {
+ status = "okay";
+ clock-frequency = <400000>;
+
+ ps8640_bridge: bridge@8 {
+ compatible = "parade,ps8640";
+ reg = <0x8>;
+
+ powerdown-gpios = <&tlmm 104 GPIO_ACTIVE_LOW>;
+ reset-gpios = <&tlmm 11 GPIO_ACTIVE_LOW>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&edp_brij_en>, <&edp_brij_ps8640_rst>;
+
+ vdd12-supply = <&pp1200_brij>;
+ vdd33-supply = <&pp3300_brij_ps8640>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ ps8640_in: endpoint {
+ remote-endpoint = <&dsi0_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ ps8640_out: endpoint {
+ remote-endpoint = <&panel_in_edp>;
+ };
+ };
+ };
+
+ aux-bus {
+ panel: panel {
+ /* Compatible will be filled in per-board */
+ power-supply = <&pp3300_dx_edp>;
+ backlight = <&backlight>;
+
+ port {
+ panel_in_edp: endpoint {
+ remote-endpoint = <&ps8640_out>;
+ };
+ };
+ };
+ };
+ };
+};
+
+&tlmm {
+ edp_brij_ps8640_rst: edp-brij-ps8640-rst {
+ pinmux {
+ pins = "gpio11";
+ function = "gpio";
+ };
+
+ pinconf {
+ pins = "gpio11";
+ drive-strength = <2>;
+ bias-disable;
+ };
+ };
+
+ en_pp3300_edp_brij_ps8640: en-pp3300-edp-brij-ps8640 {
+ pinmux {
+ pins = "gpio32";
+ function = "gpio";
+ };
+
+ pinconf {
+ pins = "gpio32";
+ drive-strength = <2>;
+ bias-disable;
+ };
+ };
+};
--
2.33.0.882.g93a45727a2-goog
Quoting Philip Chen (2021-10-08 11:39:35)
> Add a dts fragment file to support the sc7180 boards with the second
> source edp bridge, Parade ps8640.
>
> Signed-off-by: Philip Chen <[email protected]>
> ---
Reviewed-by: Stephen Boyd <[email protected]>
Hi,
On Fri, Oct 8, 2021 at 11:39 AM Philip Chen <[email protected]> wrote:
>
> Add a dts fragment file to support the sc7180 boards with the second
> source edp bridge, Parade ps8640.
>
> Signed-off-by: Philip Chen <[email protected]>
> ---
>
> Changes in v3:
> - Set gpio32 active high
> - Rename edp-bridge to bridge to align with ti-sn65 dts
> - Remove the unused label 'aux_bus'
>
> Changes in v2:
> - Add the definition of edp_brij_i2c and some other properties to
> ps8640 dts, making it match ti-sn65dsi86 dts better
>
> .../qcom/sc7180-trogdor-parade-ps8640.dtsi | 109 ++++++++++++++++++
> 1 file changed, 109 insertions(+)
Reviewed-by: Douglas Anderson <[email protected]>
I think these two are good to go as long as Bjorn doesn't mind having
this dtsi file in the tree with no users yet. It looks nearly certain
that some trogdor devices will ship with it.
-Doug
Hi Bjorn,
Could you please take a look at this patch series?
On Fri, Oct 8, 2021 at 4:15 PM Doug Anderson <[email protected]> wrote:
>
> Hi,
>
> On Fri, Oct 8, 2021 at 11:39 AM Philip Chen <[email protected]> wrote:
> >
> > Add a dts fragment file to support the sc7180 boards with the second
> > source edp bridge, Parade ps8640.
> >
> > Signed-off-by: Philip Chen <[email protected]>
> > ---
> >
> > Changes in v3:
> > - Set gpio32 active high
> > - Rename edp-bridge to bridge to align with ti-sn65 dts
> > - Remove the unused label 'aux_bus'
> >
> > Changes in v2:
> > - Add the definition of edp_brij_i2c and some other properties to
> > ps8640 dts, making it match ti-sn65dsi86 dts better
> >
> > .../qcom/sc7180-trogdor-parade-ps8640.dtsi | 109 ++++++++++++++++++
> > 1 file changed, 109 insertions(+)
>
> Reviewed-by: Douglas Anderson <[email protected]>
>
> I think these two are good to go as long as Bjorn doesn't mind having
> this dtsi file in the tree with no users yet. It looks nearly certain
> that some trogdor devices will ship with it.
>
> -Doug
On Fri, 8 Oct 2021 11:39:34 -0700, Philip Chen wrote:
> Factor out ti-sn65dsi86 edp bridge as a separate dts fragment.
> This helps us introduce the second source edp bridge later.
>
>
Applied, thanks!
[1/2] arm64: dts: sc7180: Factor out ti-sn65dsi86 support
commit: 4537977a50e6257c6c19db925479298c19822667
[2/2] arm64: dts: sc7180: Support Parade ps8640 edp bridge
commit: 0faf297c427372ad2a02dc28e6d1327825031882
Best regards,
--
Bjorn Andersson <[email protected]>