Cc: Björn Töpel <[email protected]>
Signed-off-by: Xi Wang <[email protected]>
Signed-off-by: Luke Nelson <[email protected]>
---
MAINTAINERS | 13 +++++++++++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 8f27f40d22bb..fdd8b99f18db 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3213,11 +3213,20 @@ L: [email protected]
S: Maintained
F: arch/powerpc/net/
-BPF JIT for RISC-V (RV64G)
+BPF JIT for 32-bit RISC-V (RV32G)
+M: Luke Nelson <[email protected]>
+M: Xi Wang <[email protected]>
+L: [email protected]
+S: Maintained
+F: arch/riscv/net/
+X: arch/riscv/net/bpf_jit_comp.c
+
+BPF JIT for 64-bit RISC-V (RV64G)
M: Björn Töpel <[email protected]>
-L: [email protected]
+L: [email protected]
S: Maintained
F: arch/riscv/net/
+X: arch/riscv/net/bpf_jit_comp32.c
BPF JIT for S390
M: Ilya Leoshkevich <[email protected]>
--
2.20.1
On Tue, 3 Mar 2020 at 01:50, Luke Nelson <[email protected]> wrote:
>
> Cc: Björn Töpel <[email protected]>
> Signed-off-by: Xi Wang <[email protected]>
> Signed-off-by: Luke Nelson <[email protected]>
> ---
> MAINTAINERS | 13 +++++++++++--
> 1 file changed, 11 insertions(+), 2 deletions(-)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 8f27f40d22bb..fdd8b99f18db 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -3213,11 +3213,20 @@ L: [email protected]
> S: Maintained
> F: arch/powerpc/net/
>
> -BPF JIT for RISC-V (RV64G)
> +BPF JIT for 32-bit RISC-V (RV32G)
> +M: Luke Nelson <[email protected]>
> +M: Xi Wang <[email protected]>
> +L: [email protected]
> +S: Maintained
> +F: arch/riscv/net/
> +X: arch/riscv/net/bpf_jit_comp.c
> +
> +BPF JIT for 64-bit RISC-V (RV64G)
> M: Björn Töpel <[email protected]>
> -L: [email protected]
> +L: [email protected]
> S: Maintained
> F: arch/riscv/net/
> +X: arch/riscv/net/bpf_jit_comp32.c
>
Empty commit message body, but maybe that's OK. The removal of netdev
list is following the new guidelines from commit e42da4c62abb
("docs/bpf: Update bpf development Q/A file").
Acked-by: Björn Töpel <[email protected]>
> BPF JIT for S390
> M: Ilya Leoshkevich <[email protected]>
> --
> 2.20.1
>
On Mon, Mar 02, 2020 at 04:50:35PM -0800, Luke Nelson wrote:
Commit message?
> Cc: Bj?rn T?pel <[email protected]>
> Signed-off-by: Xi Wang <[email protected]>
> Signed-off-by: Luke Nelson <[email protected]>
> @@ -3213,11 +3213,20 @@ L: [email protected]
> S: Maintained
> F: arch/powerpc/net/
>
> -BPF JIT for RISC-V (RV64G)
> +BPF JIT for 32-bit RISC-V (RV32G)
> +M: Luke Nelson <[email protected]>
> +M: Xi Wang <[email protected]>
> +L: [email protected]
> +S: Maintained
> +F: arch/riscv/net/
> +X: arch/riscv/net/bpf_jit_comp.c
> +
> +BPF JIT for 64-bit RISC-V (RV64G)
> M: Bj?rn T?pel <[email protected]>
> -L: [email protected]
> +L: [email protected]
> S: Maintained
> F: arch/riscv/net/
> +X: arch/riscv/net/bpf_jit_comp32.c
Obviously this breaks an order. Please, fix.
Hint: run parse-maintainers.pl after the change.
> BPF JIT for S390
> M: Ilya Leoshkevich <[email protected]>
--
With Best Regards,
Andy Shevchenko
On Tue, Mar 3, 2020 at 2:02 AM Andy Shevchenko
<[email protected]> wrote:
> > -BPF JIT for RISC-V (RV64G)
> > +BPF JIT for 32-bit RISC-V (RV32G)
> > +M: Luke Nelson <[email protected]>
> > +M: Xi Wang <[email protected]>
> > +L: [email protected]
> > +S: Maintained
> > +F: arch/riscv/net/
> > +X: arch/riscv/net/bpf_jit_comp.c
> > +
> > +BPF JIT for 64-bit RISC-V (RV64G)
> > M: Björn Töpel <[email protected]>
> > -L: [email protected]
> > +L: [email protected]
> > S: Maintained
> > F: arch/riscv/net/
> > +X: arch/riscv/net/bpf_jit_comp32.c
>
> Obviously this breaks an order. Please, fix.
> Hint: run parse-maintainers.pl after the change.
Hi,
Thanks for the comment!
I'll change the entry names in v5 to be "BPF JIT for RISC-V (32-bit)"
and "BPF JIT for RISC-V (64-bit)", similar to the x86 JIT entries.
This will pass parse-maintainers.pl and the entries are still in
order.
Thanks again,
Luke
On Wed, Mar 4, 2020 at 4:34 AM Luke Nelson <[email protected]> wrote:
> On Tue, Mar 3, 2020 at 2:02 AM Andy Shevchenko
> <[email protected]> wrote:
> > > -BPF JIT for RISC-V (RV64G)
> > > +BPF JIT for 32-bit RISC-V (RV32G)
> > > +M: Luke Nelson <[email protected]>
> > > +M: Xi Wang <[email protected]>
> > > +L: [email protected]
> > > +S: Maintained
> > > +F: arch/riscv/net/
> > > +X: arch/riscv/net/bpf_jit_comp.c
> > > +
> > > +BPF JIT for 64-bit RISC-V (RV64G)
> > > M: Björn Töpel <[email protected]>
> > > -L: [email protected]
> > > +L: [email protected]
> > > S: Maintained
> > > F: arch/riscv/net/
> > > +X: arch/riscv/net/bpf_jit_comp32.c
> >
> > Obviously this breaks an order. Please, fix.
> > Hint: run parse-maintainers.pl after the change.
> Thanks for the comment!
>
> I'll change the entry names in v5 to be "BPF JIT for RISC-V (32-bit)"
> and "BPF JIT for RISC-V (64-bit)", similar to the x86 JIT entries.
> This will pass parse-maintainers.pl and the entries are still in
> order.
Thank you!
--
With Best Regards,
Andy Shevchenko