This patch series add DTS node, dt-bindings document and driver for memory
controller present on Nuvoton NPCM SoCs.
The memory controller supports single bit error correction and double bit
error detection (in-line ECC in which a section 1/8th of the memory device
used to store data is used for ECC storage).
Changes in v16:
- Correct dt-bindings document path in MAINTAINERS.
- Fix wrong indentation in driver.
Changes in v15:
- Move dt-bindings document to memory-controllers directory and remove
superfluous string in content title.
Changes in v14:
- Fix compile warnings.
Changes in v13:
- Support error injection via debugfs.
- Fix coding style issues.
Marvin Lin (3):
Arm: dts: nuvoton: Add node for NPCM memory controller
dt-bindings: edac: nuvoton: Add document for NPCM memory controller
EDAC/npcm: Add NPCM memory controller driver
.../memory-controllers/nuvoton,npcm-mc.yaml | 54 ++
MAINTAINERS | 7 +
arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi | 7 +
drivers/edac/Kconfig | 11 +
drivers/edac/Makefile | 1 +
drivers/edac/npcm_edac.c | 520 ++++++++++++++++++
6 files changed, 600 insertions(+)
create mode 100644 Documentation/devicetree/bindings/memory-controllers/nuvoton,npcm-mc.yaml
create mode 100644 drivers/edac/npcm_edac.c
--
2.34.1
Add node for memory controller present on Nuvoton NPCM SoCs. The
memory controller supports single bit error correction and double bit
error detection.
Signed-off-by: Marvin Lin <[email protected]>
---
arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi b/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi
index c7b5ef15b716..d875e8ac1e09 100644
--- a/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi
+++ b/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi
@@ -179,6 +179,13 @@ fiux: spi@fb001000 {
status = "disabled";
};
+ mc: memory-controller@f0824000 {
+ compatible = "nuvoton,npcm750-memory-controller";
+ reg = <0xf0824000 0x1000>;
+ interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
apb {
#address-cells = <1>;
#size-cells = <1>;
--
2.34.1
On 16/12/2022 08:31, Marvin Lin wrote:
> Add node for memory controller present on Nuvoton NPCM SoCs. The
> memory controller supports single bit error correction and double bit
> error detection.
>
> Signed-off-by: Marvin Lin <[email protected]>
Use subject prefixes matching the subsystem (git log --oneline -- ...).
It's "ARM:"
> ---
> arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi | 7 +++++++
> 1 file changed, 7 insertions(+)
>
Best regards,
Krzysztof
Hi Krzysztof,
> Use subject prefixes matching the subsystem (git log --oneline -- ...).
>
> It's "ARM:"
Will correct the subject prefixes in next patch. Thanks for the review.
Regards,
Marvin